重命名 AX88772C_eeprom/asix.c 为 asix_mac.c

hc

2024-09-20 a36159eec6ca17402b0e146b86efaf76568dc353

 kernel/arch/arm64/boot/dts/hisilicon/hip06.dtsi
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@@ -1,12 +1,8 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /**
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  * dts file for Hisilicon D03 Development Board
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  *
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  * Copyright (C) 2016 Hisilicon Ltd.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * publishhed by the Free Software Foundation.
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- *
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  */
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 #include <dt-bindings/interrupt-controller/arm-gic.h>
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@@ -87,7 +83,7 @@
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 		cpu0: cpu@10000 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10000>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster0_l2>;
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@@ -95,7 +91,7 @@
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 		cpu1: cpu@10001 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10001>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster0_l2>;
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@@ -103,7 +99,7 @@
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 		cpu2: cpu@10002 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10002>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster0_l2>;
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@@ -111,7 +107,7 @@
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 		cpu3: cpu@10003 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10003>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster0_l2>;
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@@ -119,7 +115,7 @@
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 		cpu4: cpu@10100 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10100>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster1_l2>;
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@@ -127,7 +123,7 @@
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 		cpu5: cpu@10101 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10101>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster1_l2>;
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@@ -135,7 +131,7 @@
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 		cpu6: cpu@10102 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10102>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster1_l2>;
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@@ -143,7 +139,7 @@
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 		cpu7: cpu@10103 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10103>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster1_l2>;
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@@ -151,7 +147,7 @@
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 		cpu8: cpu@10200 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10200>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster2_l2>;
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@@ -159,7 +155,7 @@
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 		cpu9: cpu@10201 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10201>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster2_l2>;
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@@ -167,7 +163,7 @@
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 		cpu10: cpu@10202 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10202>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster2_l2>;
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@@ -175,7 +171,7 @@
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 		cpu11: cpu@10203 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10203>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster2_l2>;
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@@ -183,7 +179,7 @@
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 		cpu12: cpu@10300 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10300>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster3_l2>;
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@@ -191,7 +187,7 @@
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 		cpu13: cpu@10301 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10301>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster3_l2>;
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@@ -199,7 +195,7 @@
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 		cpu14: cpu@10302 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10302>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster3_l2>;
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@@ -207,7 +203,7 @@
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 		cpu15: cpu@10303 {
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 			device_type = "cpu";
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-			compatible = "arm,cortex-a57", "arm,armv8";
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+			compatible = "arm,cortex-a57";
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 			reg = <0x10303>;
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 			enable-method = "psci";
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 			next-level-cache = <&cluster3_l2>;