重命名 AX88772C_eeprom/asix.c 为 asix_mac.c

hc

2024-09-20 a36159eec6ca17402b0e146b86efaf76568dc353

 kernel/arch/arm/mach-at91/Kconfig
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@@ -1,3 +1,4 @@
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+# SPDX-License-Identifier: GPL-2.0-only
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 menuconfig ARCH_AT91
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 	bool "AT91/Microchip SoCs"
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 	depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V7 || ARM_SINGLE_ARMV7M
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@@ -21,7 +22,6 @@
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 	depends on ARCH_MULTI_V7
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 	select SOC_SAMA5
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 	select CACHE_L2X0
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-	select HAVE_FB_ATMEL
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 	select HAVE_AT91_UTMI
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 	select HAVE_AT91_USB_CLK
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 	select HAVE_AT91_H32MX
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@@ -36,7 +36,6 @@
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 	bool "SAMA5D3 family"
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 	depends on ARCH_MULTI_V7
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 	select SOC_SAMA5
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-	select HAVE_FB_ATMEL
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 	select HAVE_AT91_UTMI
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 	select HAVE_AT91_SMD
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 	select HAVE_AT91_USB_CLK
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@@ -50,7 +49,6 @@
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 	depends on ARCH_MULTI_V7
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 	select SOC_SAMA5
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 	select CACHE_L2X0
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-	select HAVE_FB_ATMEL
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 	select HAVE_AT91_UTMI
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 	select HAVE_AT91_SMD
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 	select HAVE_AT91_USB_CLK
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@@ -107,6 +105,46 @@
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 	    AT91SAM9X35
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 	    AT91SAM9XE
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+config SOC_SAM9X60
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+	bool "SAM9X60"
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+	depends on ARCH_MULTI_V5
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+	select ATMEL_AIC5_IRQ
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+	select ATMEL_PM if PM
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+	select ATMEL_SDRAMC
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+	select CPU_ARM926T
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+	select HAVE_AT91_USB_CLK
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+	select HAVE_AT91_GENERATED_CLK
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+	select HAVE_AT91_SAM9X60_PLL
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+	select MEMORY
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+	select PINCTRL_AT91
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+	select SOC_SAM_V4_V5
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+	select SRAM if PM
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+	help
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+	  Select this if you are using Microchip's SAM9X60 SoC
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+
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+comment "Clocksource driver selection"
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+
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+config ATMEL_CLOCKSOURCE_PIT
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+	bool "Periodic Interval Timer (PIT) support"
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+	depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5
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+	default SOC_AT91SAM9 || SOC_SAMA5
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+	select ATMEL_PIT
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+	help
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+	  Select this to get a clocksource based on the Atmel Periodic Interval
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+	  Timer. It has a relatively low resolution and the TC Block clocksource
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+	  should be preferred.
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+
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+config ATMEL_CLOCKSOURCE_TCB
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+	bool "Timer Counter Blocks (TCB) support"
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+	default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5
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+	select ATMEL_TCB_CLKSRC
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+	help
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+	  Select this to get a high precision clocksource based on a
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+	  TC block with a 5+ MHz base clock rate.
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+	  On platforms with 16-bit counters, two timer channels are combined
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+	  to make a single 32-bit timer.
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+	  It can also be used as a clock event device supporting oneshot mode.
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+
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 config HAVE_AT91_UTMI
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 	bool
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@@ -115,7 +153,6 @@
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 config COMMON_CLK_AT91
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 	bool
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-	select COMMON_CLK
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 	select MFD_SYSCON
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 config HAVE_AT91_SMD
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@@ -133,6 +170,9 @@
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 config HAVE_AT91_I2S_MUX_CLK
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 	bool
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+config HAVE_AT91_SAM9X60_PLL
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+	bool
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+
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 config SOC_SAM_V4_V5
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 	bool
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