hc
2024-09-20 a36159eec6ca17402b0e146b86efaf76568dc353
kernel/arch/arm/include/asm/arch_timer.h
....@@ -4,6 +4,7 @@
44
55 #include <asm/barrier.h>
66 #include <asm/errno.h>
7
+#include <asm/hwcap.h>
78 #include <linux/clocksource.h>
89 #include <linux/init.h>
910 #include <linux/types.h>
....@@ -11,6 +12,10 @@
1112 #include <clocksource/arm_arch_timer.h>
1213
1314 #ifdef CONFIG_ARM_ARCH_TIMER
15
+/* 32bit ARM doesn't know anything about timer errata... */
16
+#define has_erratum_handler(h) (false)
17
+#define erratum_handler(h) (arch_timer_##h)
18
+
1419 int arch_timer_arch_init(void);
1520
1621 /*
....@@ -79,7 +84,7 @@
7984 return val;
8085 }
8186
82
-static inline u64 arch_counter_get_cntpct(void)
87
+static inline u64 __arch_counter_get_cntpct(void)
8388 {
8489 u64 cval;
8590
....@@ -88,13 +93,23 @@
8893 return cval;
8994 }
9095
91
-static inline u64 arch_counter_get_cntvct(void)
96
+static inline u64 __arch_counter_get_cntpct_stable(void)
97
+{
98
+ return __arch_counter_get_cntpct();
99
+}
100
+
101
+static inline u64 __arch_counter_get_cntvct(void)
92102 {
93103 u64 cval;
94104
95105 isb();
96106 asm volatile("mrrc p15, 1, %Q0, %R0, c14" : "=r" (cval));
97107 return cval;
108
+}
109
+
110
+static inline u64 __arch_counter_get_cntvct_stable(void)
111
+{
112
+ return __arch_counter_get_cntvct();
98113 }
99114
100115 static inline u32 arch_timer_get_cntkctl(void)
....@@ -110,6 +125,15 @@
110125 isb();
111126 }
112127
128
+static inline void arch_timer_set_evtstrm_feature(void)
129
+{
130
+ elf_hwcap |= HWCAP_EVTSTRM;
131
+}
132
+
133
+static inline bool arch_timer_have_evtstrm_feature(void)
134
+{
135
+ return elf_hwcap & HWCAP_EVTSTRM;
136
+}
113137 #endif
114138
115139 #endif