hc
2024-09-20 a36159eec6ca17402b0e146b86efaf76568dc353
kernel/arch/arm/boot/dts/qcom-msm8660.dtsi
....@@ -1,14 +1,14 @@
11 // SPDX-License-Identifier: GPL-2.0
22 /dts-v1/;
33
4
-/include/ "skeleton.dtsi"
5
-
64 #include <dt-bindings/interrupt-controller/irq.h>
75 #include <dt-bindings/interrupt-controller/arm-gic.h>
86 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
97 #include <dt-bindings/soc/qcom,gsbi.h>
108
119 / {
10
+ #address-cells = <1>;
11
+ #size-cells = <1>;
1212 model = "Qualcomm MSM8660";
1313 compatible = "qcom,msm8660";
1414 interrupt-parent = <&intc>;
....@@ -37,6 +37,11 @@
3737 compatible = "cache";
3838 cache-level = <2>;
3939 };
40
+ };
41
+
42
+ memory {
43
+ device_type = "memory";
44
+ reg = <0x0 0x0>;
4045 };
4146
4247 cpu-pmu {
....@@ -110,6 +115,7 @@
110115 reg = <0x800000 0x4000>;
111116
112117 gpio-controller;
118
+ gpio-ranges = <&tlmm 0 0 173>;
113119 #gpio-cells = <2>;
114120 interrupts = <0 16 0x4>;
115121 interrupt-controller;
....@@ -133,6 +139,7 @@
133139 #address-cells = <1>;
134140 #size-cells = <1>;
135141 ranges;
142
+ status = "disabled";
136143
137144 syscon-tcsr = <&tcsr>;
138145
....@@ -140,7 +147,7 @@
140147 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
141148 reg = <0x16540000 0x1000>,
142149 <0x16500000 0x1000>;
143
- interrupts = <GIC_SPI 156 IRQ_TYPE_NONE>;
150
+ interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
144151 clocks = <&gcc GSBI6_UART_CLK>, <&gcc GSBI6_H_CLK>;
145152 clock-names = "core", "iface";
146153 status = "disabled";
....@@ -149,7 +156,7 @@
149156 gsbi6_i2c: i2c@16580000 {
150157 compatible = "qcom,i2c-qup-v1.1.1";
151158 reg = <0x16580000 0x1000>;
152
- interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
159
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
153160 clocks = <&gcc GSBI6_QUP_CLK>, <&gcc GSBI6_H_CLK>;
154161 clock-names = "core", "iface";
155162 #address-cells = <1>;
....@@ -167,6 +174,7 @@
167174 #address-cells = <1>;
168175 #size-cells = <1>;
169176 ranges;
177
+ status = "disabled";
170178
171179 syscon-tcsr = <&tcsr>;
172180
....@@ -174,7 +182,7 @@
174182 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
175183 reg = <0x16640000 0x1000>,
176184 <0x16600000 0x1000>;
177
- interrupts = <GIC_SPI 158 IRQ_TYPE_NONE>;
185
+ interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
178186 clocks = <&gcc GSBI7_UART_CLK>, <&gcc GSBI7_H_CLK>;
179187 clock-names = "core", "iface";
180188 status = "disabled";
....@@ -183,7 +191,7 @@
183191 gsbi7_i2c: i2c@16680000 {
184192 compatible = "qcom,i2c-qup-v1.1.1";
185193 reg = <0x16680000 0x1000>;
186
- interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
194
+ interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
187195 clocks = <&gcc GSBI7_QUP_CLK>, <&gcc GSBI7_H_CLK>;
188196 clock-names = "core", "iface";
189197 #address-cells = <1>;
....@@ -207,7 +215,7 @@
207215 gsbi8_i2c: i2c@19880000 {
208216 compatible = "qcom,i2c-qup-v1.1.1";
209217 reg = <0x19880000 0x1000>;
210
- interrupts = <GIC_SPI 161 IRQ_TYPE_NONE>;
218
+ interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
211219 clocks = <&gcc GSBI8_QUP_CLK>, <&gcc GSBI8_H_CLK>;
212220 clock-names = "core", "iface";
213221 #address-cells = <1>;
....@@ -232,7 +240,7 @@
232240 compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
233241 reg = <0x19c40000 0x1000>,
234242 <0x19c00000 0x1000>;
235
- interrupts = <0 195 IRQ_TYPE_NONE>;
243
+ interrupts = <0 195 IRQ_TYPE_LEVEL_HIGH>;
236244 clocks = <&gcc GSBI12_UART_CLK>, <&gcc GSBI12_H_CLK>;
237245 clock-names = "core", "iface";
238246 status = "disabled";
....@@ -241,7 +249,7 @@
241249 gsbi12_i2c: i2c@19c80000 {
242250 compatible = "qcom,i2c-qup-v1.1.1";
243251 reg = <0x19c80000 0x1000>;
244
- interrupts = <0 196 IRQ_TYPE_NONE>;
252
+ interrupts = <0 196 IRQ_TYPE_LEVEL_HIGH>;
245253 clocks = <&gcc GSBI12_QUP_CLK>, <&gcc GSBI12_H_CLK>;
246254 clock-names = "core", "iface";
247255 #address-cells = <1>;
....@@ -285,52 +293,10 @@
285293 compatible = "qcom,pm8058-gpio",
286294 "qcom,ssbi-gpio";
287295 reg = <0x150>;
288
- interrupt-parent = <&pm8058>;
289
- interrupts = <192 IRQ_TYPE_NONE>,
290
- <193 IRQ_TYPE_NONE>,
291
- <194 IRQ_TYPE_NONE>,
292
- <195 IRQ_TYPE_NONE>,
293
- <196 IRQ_TYPE_NONE>,
294
- <197 IRQ_TYPE_NONE>,
295
- <198 IRQ_TYPE_NONE>,
296
- <199 IRQ_TYPE_NONE>,
297
- <200 IRQ_TYPE_NONE>,
298
- <201 IRQ_TYPE_NONE>,
299
- <202 IRQ_TYPE_NONE>,
300
- <203 IRQ_TYPE_NONE>,
301
- <204 IRQ_TYPE_NONE>,
302
- <205 IRQ_TYPE_NONE>,
303
- <206 IRQ_TYPE_NONE>,
304
- <207 IRQ_TYPE_NONE>,
305
- <208 IRQ_TYPE_NONE>,
306
- <209 IRQ_TYPE_NONE>,
307
- <210 IRQ_TYPE_NONE>,
308
- <211 IRQ_TYPE_NONE>,
309
- <212 IRQ_TYPE_NONE>,
310
- <213 IRQ_TYPE_NONE>,
311
- <214 IRQ_TYPE_NONE>,
312
- <215 IRQ_TYPE_NONE>,
313
- <216 IRQ_TYPE_NONE>,
314
- <217 IRQ_TYPE_NONE>,
315
- <218 IRQ_TYPE_NONE>,
316
- <219 IRQ_TYPE_NONE>,
317
- <220 IRQ_TYPE_NONE>,
318
- <221 IRQ_TYPE_NONE>,
319
- <222 IRQ_TYPE_NONE>,
320
- <223 IRQ_TYPE_NONE>,
321
- <224 IRQ_TYPE_NONE>,
322
- <225 IRQ_TYPE_NONE>,
323
- <226 IRQ_TYPE_NONE>,
324
- <227 IRQ_TYPE_NONE>,
325
- <228 IRQ_TYPE_NONE>,
326
- <229 IRQ_TYPE_NONE>,
327
- <230 IRQ_TYPE_NONE>,
328
- <231 IRQ_TYPE_NONE>,
329
- <232 IRQ_TYPE_NONE>,
330
- <233 IRQ_TYPE_NONE>,
331
- <234 IRQ_TYPE_NONE>,
332
- <235 IRQ_TYPE_NONE>;
296
+ interrupt-controller;
297
+ #interrupt-cells = <2>;
333298 gpio-controller;
299
+ gpio-ranges = <&pm8058_gpio 0 0 44>;
334300 #gpio-cells = <2>;
335301
336302 };