forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-09-20 a36159eec6ca17402b0e146b86efaf76568dc353
kernel/arch/arc/kernel/head.S
....@@ -1,11 +1,8 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /*
23 * ARC CPU startup Code
34 *
45 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
5
- *
6
- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
96 *
107 * Vineetg: Dec 2007
118 * -Check if we are running on Simulator or on real hardware
....@@ -17,6 +14,7 @@
1714 #include <asm/entry.h>
1815 #include <asm/arcregs.h>
1916 #include <asm/cache.h>
17
+#include <asm/dsp-impl.h>
2018 #include <asm/irqflags.h>
2119
2220 .macro CPU_EARLY_SETUP
....@@ -54,9 +52,40 @@
5452 ; gcc 7.3.1 (ARC GNU 2018.03) onwards generates unaligned access
5553 ; by default
5654 lr r5, [status32]
55
+#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
5756 bset r5, r5, STATUS_AD_BIT
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- kflag r5
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+#else
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+ ; Although disabled at reset, bootloader might have enabled it
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+ bclr r5, r5, STATUS_AD_BIT
5960 #endif
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+ kflag r5
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+
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+#ifdef CONFIG_ARC_LPB_DISABLE
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+ lr r5, [ARC_REG_LPB_BUILD]
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+ breq r5, 0, 1f ; LPB doesn't exist
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+ mov r5, 1
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+ sr r5, [ARC_REG_LPB_CTRL]
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+1:
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+#endif /* CONFIG_ARC_LPB_DISABLE */
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+
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+ /* On HSDK, CCMs need to remapped super early */
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+#ifdef CONFIG_ARC_SOC_HSDK
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+ mov r6, 0x60000000
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+ lr r5, [ARC_REG_ICCM_BUILD]
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+ breq r5, 0, 1f
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+ sr r6, [ARC_REG_AUX_ICCM]
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+1:
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+ lr r5, [ARC_REG_DCCM_BUILD]
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+ breq r5, 0, 2f
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+ sr r6, [ARC_REG_AUX_DCCM]
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+2:
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+#endif /* CONFIG_ARC_SOC_HSDK */
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+
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+#endif /* CONFIG_ISA_ARCV2 */
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+
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+ ; Config DSP_CTRL properly, so kernel may use integer multiply,
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+ ; multiply-accumulate, and divide operations
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+ DSP_EARLY_INIT
6089 .endm
6190
6291 .section .init.text, "ax",@progbits