add support ota

hc

2023-02-18 a08c8b75ee83d7f62c9aefc23bfb42082aa4076c

 kernel/arch/arm64/boot/dts/rockchip/NK-R36S0.dtsi
..
..
@@ -8,6 +8,7 @@
8
8
 
9
9
 #include <dt-bindings/gpio/gpio.h>
10
10
 #include <dt-bindings/pinctrl/rockchip.h>
11
+#include <dt-bindings/display/media-bus-format.h>
11
12
 #include "rk3568.dtsi"
12
13
 #include "rk3568-evb.dtsi"
13
14
 
..
..
@@ -17,7 +18,7 @@
17
18
 
18
19
 	rk_headset: rk-headset {
19
20
 		compatible = "rockchip_headset";
20
-		headset_gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
21
+		headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
21
22
 		pinctrl-names = "default";
22
23
 		pinctrl-0 = <&hp_det>;
23
24
 	};
..
..
@@ -32,15 +33,6 @@
32
33
 		vin-supply = <&vcc3v3_sys>;
33
34
 	};
34
35
 
35
-	vcc3v3_vga: vcc3v3-vga {
36
-		compatible = "regulator-fixed";
37
-		regulator-name = "vcc3v3_vga";
38
-		regulator-always-on;
39
-		regulator-boot-on;
40
-		gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
41
-		enable-active-high;
42
-		vin-supply = <&vcc3v3_sys>;
43
-	};
44
36
 
45
37
 	pcie30_avdd0v9: pcie30-avdd0v9 {
46
38
 		compatible = "regulator-fixed";
..
..
@@ -67,7 +59,9 @@
67
59
 		regulator-name = "vcc3v3_pcie";
68
60
 		regulator-min-microvolt = <3300000>;
69
61
 		regulator-max-microvolt = <3300000>;
62
+		regulator-always-on;
70
63
 		enable-active-high;
64
+		regulator-boot-on;
71
65
 		gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
72
66
 		startup-delay-us = <5000>;
73
67
 		vin-supply = <&dc_12v>;
..
..
@@ -97,35 +91,65 @@
97
91
 
98
92
 	    nk_io_init {
99
93
                 compatible = "nk_io_control";
100
-				usb_en_oc_gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;  //USB_EN_OC_GPIO0_A5
101
-				lcd_bk_en_gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
102
-				lcd_pwblk_gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
103
94
 				vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
104
95
                 hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
105
96
                 hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
106
-//              hub_host3_5V_rest_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>; 
107
97
                 vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;   //VCC5_IO_EN_GPIO1_A4_3V3
108
98
                 vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
109
99
                 en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
110
100
                 reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
111
101
                 air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
112
102
                 wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
113
-                
114
-				edp_enable_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
115
-                edp_gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>; //7511_GPIO0-GPIO3_D2
116
-				edp_gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>; //7511_GPIO1-GPIO3_D3
117
-				edp_gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; //7511_GPIO2-GPIO3_D4
118
-				edp_gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; //7511_GPIO3-GPIO3_D5
119
-                edp_reset = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
120
-//              tp_reset = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
121
-//              vddio_mipi = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
122
-		
103
+				hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
104
+                spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3			
123
105
 				wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
124
-
106
+//				pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4				
125
107
 				pinctrl-names = "default";
126
-				pinctrl-0 = <&nk_io_gpio>;
127
-				nodka_lvds = <9>;
108
+				pinctrl-0 = <&nk_io_gpio>;				
128
109
         };
110
+		
111
+		panel: panel {
112
+				compatible = "simple-panel";
113
+				backlight = <&backlight>;
114
+				power-supply = <&vcc3v3_lcd0_n>;
115
+				enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
116
+				reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //7511_RST_GPIO3_D1
117
+				edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;  //LCD0_BKLT_EN_3V3
118
+				edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
119
+				bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
120
+				bpc = <8>;
121
+				prepare-delay-ms = <200>;
122
+				enable-delay-ms = <20>;
123
+				lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2 
124
+				lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3 
125
+				lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4 
126
+				lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
127
+				nodka-lvds = <9>;
128
+
129
+				display-timings {
130
+                native-mode = <&timing0>;
131
+                timing0: timing0 {
132
+					clock-frequency = <142300000>;
133
+					hactive = <1920>;
134
+					vactive = <1080>;
135
+					hfront-porch = <48>;
136
+					hsync-len = <32>;
137
+					hback-porch = <100>;
138
+					vfront-porch = <7>;
139
+					vsync-len = <20>;
140
+					vback-porch = <23>;
141
+					hsync-active = <0>;
142
+					vsync-active = <0>;
143
+					de-active = <0>;
144
+					pixelclk-active = <0>;			
145
+					};
146
+				};
147
+				ports {
148
+					panel_in: endpoint {
149
+					remote-endpoint = <&edp_out>;
150
+						};
151
+					};   
152
+				};
129
153
 };
130
154
 
131
155
 &combphy0_us {
..
..
@@ -141,11 +165,11 @@
141
165
 };
142
166
 
143
167
 &csi2_dphy_hw {
144
-	status = "okay";
168
+	status = "disabled";
145
169
 };
146
170
 
147
171
 &csi2_dphy0 {
148
-	status = "okay";
172
+	status = "disabled";
149
173
 
150
174
 	ports {
151
175
 		#address-cells = <1>;
..
..
@@ -188,8 +212,12 @@
188
212
  * video_phy0 needs to be enabled
189
213
  * when dsi0 is enabled
190
214
  */
215
+&video_phy0 {
216
+	status = "disabled";
217
+};
218
+
191
219
 &dsi0 {
192
-	status = "okay";
220
+	status = "disabled";
193
221
 };
194
222
 
195
223
 &dsi0_in_vp0 {
..
..
@@ -197,7 +225,7 @@
197
225
 };
198
226
 
199
227
 &dsi0_in_vp1 {
200
-	status = "okay";
228
+	status = "disabled";
201
229
 };
202
230
 
203
231
 &dsi0_panel {
..
..
@@ -208,6 +236,10 @@
208
236
  * video_phy1 needs to be enabled
209
237
  * when dsi1 is enabled
210
238
  */
239
+ 
240
+&video_phy1 {
241
+	status = "disabled";
242
+}; 
211
243
 &dsi1 {
212
244
 	status = "disabled";
213
245
 };
..
..
@@ -224,22 +256,82 @@
224
256
 	power-supply = <&vcc3v3_lcd1_n>;
225
257
 };
226
258
 
259
+/*
260
+*  edp_start
261
+*/
262
+
227
263
 &edp {
228
-	hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
229
-	status = "okay";
264
+    force-hpd;
265
+    status = "okay";
266
+    ports {
267
+        port@1 {
268
+            reg = <1>;
269
+            edp_out: endpoint {
270
+                remote-endpoint = <&panel_in>;
271
+            };
272
+        };
273
+    };
230
274
 };
231
275
 
232
276
 &edp_phy {
233
-	status = "okay";
277
+    status = "okay";
234
278
 };
235
279
 
236
280
 &edp_in_vp0 {
237
-	status = "okay";
281
+    status = "disabled";
238
282
 };
239
283
 
240
284
 &edp_in_vp1 {
285
+    status = "okay";
286
+};
287
+
288
+&route_edp {
289
+    status = "okay";
290
+    connect = <&vp1_out_edp>;
291
+};
292
+
293
+&route_edp {
294
+	status = "okay";
295
+};
296
+/*
297
+*  edp_end
298
+*/
299
+
300
+/*
301
+*  Hdmi_start
302
+*/
303
+
304
+&hdmi {
305
+	status = "okay";
306
+	rockchip,phy-table =
307
+		<92812500  0x8009 0x0000 0x0270>,
308
+		<165000000 0x800b 0x0000 0x026d>,
309
+		<185625000 0x800b 0x0000 0x01ed>,
310
+		<297000000 0x800b 0x0000 0x01ad>,
311
+		<594000000 0x8029 0x0000 0x0088>,
312
+		<000000000 0x0000 0x0000 0x0000>;
313
+};
314
+
315
+&route_hdmi {
316
+	status = "okay";
317
+	connect = <&vp0_out_hdmi>;
318
+};
319
+
320
+&hdmi_in_vp0 {
321
+	status = "okay";
322
+};
323
+
324
+&hdmi_in_vp1 {
241
325
 	status = "disabled";
242
326
 };
327
+
328
+&hdmi_sound {
329
+	status = "okay";
330
+};
331
+
332
+/*
333
+ *  Hdmi_END
334
+*/
243
335
 
244
336
 &gmac0 {
245
337
 	phy-mode = "rgmii";
..
..
@@ -317,9 +409,6 @@
317
409
                 compatible = "nk_mcu";
318
410
                 reg = <0x15>;
319
411
         };
320
-
321
-
322
-
323
412
 };
324
413
 
325
414
 &i2c4 {
..
..
@@ -392,6 +481,19 @@
392
481
 	};
393
482
 };
394
483
 
484
+&i2c5 {
485
+	status = "okay";
486
+
487
+	hym8563: hym8563@51 {
488
+		compatible = "haoyu,hym8563";
489
+		reg = <0x51>;
490
+		#clock-cells = <0>;
491
+		clock-frequency = <32768>;
492
+		clock-output-names = "xin32k";
493
+		/* rtc_int is not connected */
494
+	};
495
+};
496
+
395
497
 &mdio0 {
396
498
 	rgmii_phy0: phy@0 {
397
499
 		compatible = "ethernet-phy-ieee802.3-c22";
..
..
@@ -406,20 +508,14 @@
406
508
 	};
407
509
 };
408
510
 
409
-&video_phy0 {
410
-	status = "okay";
411
-};
412
511
 
413
-&video_phy1 {
414
-	status = "disabled";
415
-};
416
512
 
417
513
 &pcie30phy {
418
514
 	status = "okay";
419
515
 };
420
516
 
421
-&pcie3x2 {
422
-	reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
517
+&pcie2x1 {
518
+	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
423
519
 	vpcie3v3-supply = <&vcc3v3_pcie>;
424
520
 	status = "okay";
425
521
 };
..
..
@@ -434,7 +530,7 @@
434
530
 //	};
435
531
 	headphone {
436
532
 		hp_det: hp-det {
437
-			rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
533
+			rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;
438
534
 		};
439
535
 	};
440
536
 
..
..
@@ -451,21 +547,38 @@
451
547
 	};
452
548
 	nk_io_init{
453
549
 		nk_io_gpio: nk-io-gpio{
454
-            rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>;
550
+			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
551
+							<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
552
+							<0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
553
+							<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
554
+							<4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
555
+							<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
556
+							<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
557
+							<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
558
+							<1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
559
+							<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
560
+							<3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
561
+							<4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>,
562
+							<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
563
+							<3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
564
+							<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
565
+							<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
566
+							<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
567
+							<0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
455
568
 		};
456
569
 	};
457
570
 };
458
571
 
459
572
 &rkisp {
460
-	status = "okay";
573
+	status = "disabled";
461
574
 };
462
575
 
463
576
 &rkisp_mmu {
464
-	status = "okay";
577
+	status = "disabled";
465
578
 };
466
579
 
467
580
 &rkisp_vir0 {
468
-	status = "okay";
581
+	status = "disabled";
469
582
 
470
583
 	port {
471
584
 		#address-cells = <1>;
..
..
@@ -479,14 +592,11 @@
479
592
 };
480
593
 
481
594
 &route_dsi0 {
482
-	status = "okay";
595
+	status = "disabled";
483
596
 	connect = <&vp1_out_dsi0>;
484
597
 };
485
598
 
486
-&route_edp {
487
-	status = "okay";
488
-	connect = <&vp0_out_edp>;
489
-};
599
+
490
600
 
491
601
 &sata2 {
492
602
 	status = "okay";
..
..
@@ -525,7 +635,7 @@
525
635
 };
526
636
 
527
637
 &vcc3v3_lcd0_n {
528
-	gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
638
+	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 
529
639
 	enable-active-high;
530
640
 };
531
641