hc
2023-11-06 9df731a176aab8e03b984b681b1bea01ccff6644
u-boot/drivers/video/drm/rockchip_lvds.c
....@@ -59,6 +59,9 @@
5959 #define RK3368_LVDS_MSBSEL(x) HIWORD_UPDATE(x, 11, 11)
6060 #define RK3368_LVDS_P2S_EN(x) HIWORD_UPDATE(x, 6, 6)
6161
62
+#define RK3562_GRF_VO_CON0 0x05d0
63
+#define RK3562_GRF_VO_CON1 0x05d4
64
+
6265 #define RK3568_GRF_VO_CON0 0x0360
6366 #define RK3568_LVDS1_SELECT(x) HIWORD_UPDATE(x, 13, 12)
6467 #define RK3568_LVDS1_MSBSEL(x) HIWORD_UPDATE(x, 11, 11)
....@@ -307,6 +310,25 @@
307310 .disable = rk3368_lvds_disable,
308311 };
309312
313
+static void rk3562_lvds_enable(struct rockchip_lvds *lvds, int pipe)
314
+{
315
+ regmap_write(lvds->grf, RK3562_GRF_VO_CON1,
316
+ RK3568_LVDS0_MODE_EN(1) | RK3568_LVDS0_P2S_EN(1) |
317
+ RK3568_LVDS0_DCLK_INV_SEL(1));
318
+ regmap_write(lvds->grf, RK3562_GRF_VO_CON0,
319
+ RK3568_LVDS0_SELECT(lvds->format) | RK3568_LVDS0_MSBSEL(1));
320
+}
321
+
322
+static void rk3562_lvds_disable(struct rockchip_lvds *lvds)
323
+{
324
+ regmap_write(lvds->grf, RK3562_GRF_VO_CON1, RK3568_LVDS0_MODE_EN(0));
325
+}
326
+
327
+static const struct rockchip_lvds_funcs rk3562_lvds_funcs = {
328
+ .enable = rk3562_lvds_enable,
329
+ .disable = rk3562_lvds_disable,
330
+};
331
+
310332 static void rk3568_lvds_enable(struct rockchip_lvds *lvds, int pipe)
311333 {
312334 regmap_write(lvds->grf, RK3568_GRF_VO_CON2,
....@@ -344,6 +366,10 @@
344366 .data = (ulong)&rk3368_lvds_funcs,
345367 },
346368 {
369
+ .compatible = "rockchip,rk3562-lvds",
370
+ .data = (ulong)&rk3562_lvds_funcs,
371
+ },
372
+ {
347373 .compatible = "rockchip,rk3568-lvds",
348374 .data = (ulong)&rk3568_lvds_funcs,
349375 },