rk3568 rt uboot init

hc

2023-11-06 9df731a176aab8e03b984b681b1bea01ccff6644

 u-boot/drivers/video/drm/dw_mipi_dsi.c
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@@ -1489,6 +1489,21 @@
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 	.max_bit_rate_per_lane = 1500000000UL,
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 };
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+static const u32 rk3562_dsi_grf_reg_fields[MAX_FIELDS] = {
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+	[DPIUPDATECFG]		= GRF_REG_FIELD(0x05d0,  2,  2),
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+	[DPICOLORM]		= GRF_REG_FIELD(0x05d0,  1,  1),
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+	[DPISHUTDN]		= GRF_REG_FIELD(0x05d0,  0,  0),
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+	[SKEWCALHS]		= GRF_REG_FIELD(0x05d4, 11, 15),
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+	[FORCETXSTOPMODE]	= GRF_REG_FIELD(0x05d4,  4,  7),
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+	[TURNDISABLE]		= GRF_REG_FIELD(0x05d4,  2,  2),
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+	[FORCERXMODE]		= GRF_REG_FIELD(0x05d4,  0,  0),
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+};
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+
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+static const struct dw_mipi_dsi_plat_data rk3562_mipi_dsi_plat_data = {
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+	.dsi0_grf_reg_fields = rk3562_dsi_grf_reg_fields,
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+	.max_bit_rate_per_lane = 1200000000UL,
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+};
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+
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 static const u32 rk3568_dsi0_grf_reg_fields[MAX_FIELDS] = {
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 	[DPIUPDATECFG]		= GRF_REG_FIELD(0x0360,  2,  2),
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 	[DPICOLORM]		= GRF_REG_FIELD(0x0360,  1,  1),
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@@ -1573,6 +1588,10 @@
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 		.data = (ulong)&rk3399_mipi_dsi_plat_data,
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 	},
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 	{
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+		.compatible = "rockchip,rk3562-mipi-dsi",
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+		.data = (ulong)&rk3562_mipi_dsi_plat_data,
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+	},
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+	{
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 		.compatible = "rockchip,rk3568-mipi-dsi",
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 		.data = (ulong)&rk3568_mipi_dsi_plat_data,
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 	},