hc
2023-11-06 9df731a176aab8e03b984b681b1bea01ccff6644
u-boot/drivers/video/drm/analogix_dp.c
....@@ -943,6 +943,37 @@
943943 .detect = analogix_dp_connector_detect,
944944 };
945945
946
+static u32 analogix_dp_parse_link_frequencies(struct analogix_dp_device *dp)
947
+{
948
+ struct udevice *dev = dp->dev;
949
+ const struct device_node *endpoint;
950
+ u64 frequency = 0;
951
+
952
+ endpoint = rockchip_of_graph_get_endpoint_by_regs(dev->node, 1, 0);
953
+ if (!endpoint)
954
+ return 0;
955
+
956
+ if (of_property_read_u64(endpoint, "link-frequencies", &frequency) < 0)
957
+ return 0;
958
+
959
+ if (!frequency)
960
+ return 0;
961
+
962
+ do_div(frequency, 10 * 1000); /* symbol rate kbytes */
963
+
964
+ switch (frequency) {
965
+ case 162000:
966
+ case 270000:
967
+ case 540000:
968
+ break;
969
+ default:
970
+ dev_err(dev, "invalid link frequency value: %llu\n", frequency);
971
+ return 0;
972
+ }
973
+
974
+ return frequency;
975
+}
976
+
946977 static int analogix_dp_parse_dt(struct analogix_dp_device *dp)
947978 {
948979 struct udevice *dev = dp->dev;
....@@ -956,21 +987,9 @@
956987 dp->video_info.force_stream_valid =
957988 dev_read_bool(dev, "analogix,force-stream-valid");
958989
959
- max_link_rate = dev_read_u32_default(dev, "max-link-rate", 0);
960
- if (max_link_rate) {
961
- switch (max_link_rate) {
962
- case 1620:
963
- case 2700:
964
- case 5400:
965
- dp->video_info.max_link_rate =
966
- min_t(u8, dp->video_info.max_link_rate,
967
- drm_dp_link_rate_to_bw_code(max_link_rate * 100));
968
- break;
969
- default:
970
- dev_err(dev, "invalid max-link-rate %d\n", max_link_rate);
971
- break;
972
- }
973
- }
990
+ max_link_rate = analogix_dp_parse_link_frequencies(dp);
991
+ if (max_link_rate && max_link_rate < drm_dp_bw_code_to_link_rate(dp->video_info.max_link_rate))
992
+ dp->video_info.max_link_rate = drm_dp_link_rate_to_bw_code(max_link_rate);
974993
975994 if (dev_read_prop(dev, "data-lanes", &len)) {
976995 num_lanes = len / sizeof(u32);
....@@ -1075,8 +1094,9 @@
10751094 .lcdsel_big = 0 | BIT(21),
10761095 .lcdsel_lit = BIT(5) | BIT(21),
10771096 .chip_type = RK3399_EDP,
1097
+ .ssc = true,
10781098
1079
- .max_link_rate = DP_LINK_BW_2_7,
1099
+ .max_link_rate = DP_LINK_BW_5_4,
10801100 .max_lane_count = 4,
10811101 };
10821102