hc
2023-11-06 9df731a176aab8e03b984b681b1bea01ccff6644
u-boot/drivers/phy/phy-rockchip-samsung-hdptx.c
....@@ -592,9 +592,21 @@
592592 struct phy_configure_opts_dp *dp)
593593 {
594594 u8 lane;
595
+ u32 status;
596
+ int ret;
595597
596598 for (lane = 0; lane < dp->lanes; lane++)
597599 rockchip_hdptx_phy_set_voltage(hdptx, dp, lane);
600
+
601
+ reset_deassert(&hdptx->lane_reset);
602
+
603
+ ret = regmap_read_poll_timeout(hdptx->grf, HDPTXPHY_GRF_STATUS0,
604
+ status, FIELD_GET(PHY_RDY, status),
605
+ 50, 5000);
606
+ if (ret) {
607
+ dev_err(hdptx->dev, "timeout waiting for phy_rdy\n");
608
+ return ret;
609
+ }
598610
599611 return 0;
600612 }
....@@ -676,17 +688,6 @@
676688
677689 regmap_update_bits(hdptx->regmap, 0x081c, LANE_EN,
678690 FIELD_PREP(LANE_EN, GENMASK(dp->lanes - 1, 0)));
679
-
680
- reset_deassert(&hdptx->lane_reset);
681
- udelay(10);
682
-
683
- ret = regmap_read_poll_timeout(hdptx->grf, HDPTXPHY_GRF_STATUS0,
684
- status, FIELD_GET(PHY_RDY, status),
685
- 50, 1000);
686
- if (ret) {
687
- dev_err(hdptx->dev, "timeout waiting for phy_rdy\n");
688
- return ret;
689
- }
690691
691692 return 0;
692693 }