.. | .. |
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7 | 7 | #include <boot_rkimg.h> |
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8 | 8 | #include <cli.h> |
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9 | 9 | #include <debug_uart.h> |
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| 10 | +#include <miiphy.h> |
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| 11 | +#include <syscon.h> |
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| 12 | +#include <asm/arch/clock.h> |
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10 | 13 | #include <asm/io.h> |
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11 | 14 | #include <asm/arch/hardware.h> |
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12 | 15 | #include <asm/arch/grf_rv1106.h> |
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.. | .. |
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538 | 541 | } |
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539 | 542 | #endif |
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540 | 543 | |
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541 | | -int rk_board_late_init(void) |
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542 | | -{ |
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543 | | -#if defined(CONFIG_CMD_SCRIPT_UPDATE) |
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544 | | - struct blk_desc *desc; |
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| 544 | +#if (defined CONFIG_MII || defined CONFIG_CMD_MII || defined CONFIG_PHYLIB) |
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| 545 | +#define GMAC_NODE_FDT_PATH "/ethernet@ffa80000" |
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| 546 | +#define RK630_MII_NAME "ethernet@ffa80000" |
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| 547 | +#define PHY_ADDR 2 |
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| 548 | +#define PAGE_SWITCH 0x1f |
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| 549 | +#define DISABLE_APS_REG 0x12 |
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| 550 | +#define DISABLE_APS_VAL 0x4824 |
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| 551 | +#define PHYAFE_PDCW_REG 0x1c |
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| 552 | +#define PHYAFE_PDCW_VAL 0x8880 |
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| 553 | +#define PD_ANALOG_REG 0x0 |
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| 554 | +#define PD_ANALOG_VAL 0x3900 |
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| 555 | +#define RV1106_MACPHY_SHUTDOWN BIT(1) |
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| 556 | +#define RV1106_MACPHY_ENABLE_MASK BIT(1) |
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545 | 557 | |
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546 | | - desc = rockchip_get_bootdev(); |
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547 | | - if (desc && desc->if_type == IF_TYPE_MMC && desc->devnum == 1) |
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548 | | - run_command("sd_update", 0); |
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549 | | -#endif |
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| 558 | +static int rk_board_fdt_pwrdn_gmac(const void *blob) |
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| 559 | +{ |
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| 560 | + void *fdt = (void *)gd->fdt_blob; |
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| 561 | + struct rv1106_grf *grf; |
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| 562 | + int gmac_node; |
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| 563 | + |
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| 564 | + /* Turn off GMAC FEPHY to reduce chip power consumption at uboot level, |
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| 565 | + * if the gmac node is disabled at kernel dtb. RV1106/1103 has the |
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| 566 | + * internal gmac phy, u-boot.dtb defines and enables the gmac node |
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| 567 | + * by default, so even if the gmac node of the kernel dts is disabled, |
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| 568 | + * U-Boot will enable and initialize the gmac phy. So it is not okay |
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| 569 | + * to turn off gmac phy by default in arch_cpu_init(), need to turn off |
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| 570 | + * gmac phy in the current function. |
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| 571 | + */ |
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| 572 | + gmac_node = fdt_path_offset(gd->fdt_blob, GMAC_NODE_FDT_PATH); |
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| 573 | + if (fdt_stringlist_search(fdt, gmac_node, "status", "disabled") >= 0) { |
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| 574 | + /* switch to page 1 */ |
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| 575 | + miiphy_write(RK630_MII_NAME, PHY_ADDR, PAGE_SWITCH, 0x0100); |
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| 576 | + miiphy_write(RK630_MII_NAME, PHY_ADDR, DISABLE_APS_REG, |
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| 577 | + DISABLE_APS_VAL); |
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| 578 | + /* switch to pae 6 */ |
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| 579 | + miiphy_write(RK630_MII_NAME, PHY_ADDR, PAGE_SWITCH, 0x0600); |
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| 580 | + miiphy_write(RK630_MII_NAME, PHY_ADDR, PHYAFE_PDCW_REG, |
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| 581 | + PHYAFE_PDCW_VAL); |
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| 582 | + /* switch to page 0 */ |
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| 583 | + miiphy_write(RK630_MII_NAME, PHY_ADDR, PAGE_SWITCH, 0x0000); |
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| 584 | + miiphy_write(RK630_MII_NAME, PHY_ADDR, PD_ANALOG_REG, |
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| 585 | + PD_ANALOG_VAL); |
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| 586 | + |
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| 587 | + grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); |
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| 588 | + if (grf) |
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| 589 | + rk_clrsetreg(&grf->macphy_con0, |
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| 590 | + RV1106_MACPHY_ENABLE_MASK, |
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| 591 | + RV1106_MACPHY_SHUTDOWN); |
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| 592 | + } |
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| 593 | + |
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550 | 594 | return 0; |
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551 | 595 | } |
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| 596 | +#endif |
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552 | 597 | |
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| 598 | +int rk_board_fdt_fixup(const void *blob) |
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| 599 | +{ |
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| 600 | +#if (defined CONFIG_MII || defined CONFIG_CMD_MII || defined CONFIG_PHYLIB) |
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| 601 | + rk_board_fdt_pwrdn_gmac(blob); |
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| 602 | +#endif |
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| 603 | + |
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| 604 | + return 0; |
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| 605 | +} |
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