hc
2023-11-06 9df731a176aab8e03b984b681b1bea01ccff6644
u-boot/arch/arm/mach-rockchip/rv1106/rv1106.c
....@@ -7,6 +7,9 @@
77 #include <boot_rkimg.h>
88 #include <cli.h>
99 #include <debug_uart.h>
10
+#include <miiphy.h>
11
+#include <syscon.h>
12
+#include <asm/arch/clock.h>
1013 #include <asm/io.h>
1114 #include <asm/arch/hardware.h>
1215 #include <asm/arch/grf_rv1106.h>
....@@ -538,15 +541,65 @@
538541 }
539542 #endif
540543
541
-int rk_board_late_init(void)
542
-{
543
-#if defined(CONFIG_CMD_SCRIPT_UPDATE)
544
- struct blk_desc *desc;
544
+#if (defined CONFIG_MII || defined CONFIG_CMD_MII || defined CONFIG_PHYLIB)
545
+#define GMAC_NODE_FDT_PATH "/ethernet@ffa80000"
546
+#define RK630_MII_NAME "ethernet@ffa80000"
547
+#define PHY_ADDR 2
548
+#define PAGE_SWITCH 0x1f
549
+#define DISABLE_APS_REG 0x12
550
+#define DISABLE_APS_VAL 0x4824
551
+#define PHYAFE_PDCW_REG 0x1c
552
+#define PHYAFE_PDCW_VAL 0x8880
553
+#define PD_ANALOG_REG 0x0
554
+#define PD_ANALOG_VAL 0x3900
555
+#define RV1106_MACPHY_SHUTDOWN BIT(1)
556
+#define RV1106_MACPHY_ENABLE_MASK BIT(1)
545557
546
- desc = rockchip_get_bootdev();
547
- if (desc && desc->if_type == IF_TYPE_MMC && desc->devnum == 1)
548
- run_command("sd_update", 0);
549
-#endif
558
+static int rk_board_fdt_pwrdn_gmac(const void *blob)
559
+{
560
+ void *fdt = (void *)gd->fdt_blob;
561
+ struct rv1106_grf *grf;
562
+ int gmac_node;
563
+
564
+ /* Turn off GMAC FEPHY to reduce chip power consumption at uboot level,
565
+ * if the gmac node is disabled at kernel dtb. RV1106/1103 has the
566
+ * internal gmac phy, u-boot.dtb defines and enables the gmac node
567
+ * by default, so even if the gmac node of the kernel dts is disabled,
568
+ * U-Boot will enable and initialize the gmac phy. So it is not okay
569
+ * to turn off gmac phy by default in arch_cpu_init(), need to turn off
570
+ * gmac phy in the current function.
571
+ */
572
+ gmac_node = fdt_path_offset(gd->fdt_blob, GMAC_NODE_FDT_PATH);
573
+ if (fdt_stringlist_search(fdt, gmac_node, "status", "disabled") >= 0) {
574
+ /* switch to page 1 */
575
+ miiphy_write(RK630_MII_NAME, PHY_ADDR, PAGE_SWITCH, 0x0100);
576
+ miiphy_write(RK630_MII_NAME, PHY_ADDR, DISABLE_APS_REG,
577
+ DISABLE_APS_VAL);
578
+ /* switch to pae 6 */
579
+ miiphy_write(RK630_MII_NAME, PHY_ADDR, PAGE_SWITCH, 0x0600);
580
+ miiphy_write(RK630_MII_NAME, PHY_ADDR, PHYAFE_PDCW_REG,
581
+ PHYAFE_PDCW_VAL);
582
+ /* switch to page 0 */
583
+ miiphy_write(RK630_MII_NAME, PHY_ADDR, PAGE_SWITCH, 0x0000);
584
+ miiphy_write(RK630_MII_NAME, PHY_ADDR, PD_ANALOG_REG,
585
+ PD_ANALOG_VAL);
586
+
587
+ grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
588
+ if (grf)
589
+ rk_clrsetreg(&grf->macphy_con0,
590
+ RV1106_MACPHY_ENABLE_MASK,
591
+ RV1106_MACPHY_SHUTDOWN);
592
+ }
593
+
550594 return 0;
551595 }
596
+#endif
552597
598
+int rk_board_fdt_fixup(const void *blob)
599
+{
600
+#if (defined CONFIG_MII || defined CONFIG_CMD_MII || defined CONFIG_PHYLIB)
601
+ rk_board_fdt_pwrdn_gmac(blob);
602
+#endif
603
+
604
+ return 0;
605
+}