u-boot/arch/arm/include/asm/arch-rockchip/clock.h
.. .. @@ -12,6 +12,13 @@ 12 12 #define RKCLK_PLL_MODE_NORMAL 1 13 13 #define RKCLK_PLL_MODE_DEEP 2 14 14 15 +/*16 + * PLL flags17 + */18 +#define ROCKCHIP_PLL_SYNC_RATE BIT(0)19 +/* normal mode only. now only for pll_rk3036, pll_rk3328 type */20 +#define ROCKCHIP_PLL_FIXED_MODE BIT(1)21 +15 22 enum { 16 23 ROCKCHIP_SYSCON_NOC, 17 24 ROCKCHIP_SYSCON_GRF, .. .. @@ -29,6 +36,7 @@ 29 36 ROCKCHIP_SYSCON_PIPE_PHY2_GRF, 30 37 ROCKCHIP_SYSCON_VOP_GRF, 31 38 ROCKCHIP_SYSCON_VO_GRF, 39 + ROCKCHIP_SYSCON_IOC,32 40 }; 33 41 34 42 /* Standard Rockchip clock numbers */