hc
2023-11-06 9df731a176aab8e03b984b681b1bea01ccff6644
u-boot/arch/arm/dts/rk3568-u-boot.dtsi
....@@ -17,6 +17,15 @@
1717 stdout-path = &uart2;
1818 u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor;
1919 };
20
+
21
+ secure-otp@fe3a0000 {
22
+ compatible = "rockchip,rk3568-secure-otp";
23
+ reg = <0x0 0xfe3a0000 0x0 0x4000>;
24
+ secure_conf = <0xfdd18008>;
25
+ mask_addr = <0xfe880000>;
26
+ cru_rst_addr = <0xfdd20470>;
27
+ u-boot,dm-spl;
28
+ };
2029 };
2130
2231 &psci {
....@@ -25,7 +34,7 @@
2534 };
2635
2736 &crypto {
28
- u-boot,dm-pre-reloc;
37
+ u-boot,dm-spl;
2938 };
3039
3140 &uart2 {
....@@ -37,12 +46,12 @@
3746 };
3847
3948 &grf {
40
- u-boot,dm-pre-reloc;
49
+ u-boot,dm-spl;
4150 status = "okay";
4251 };
4352
4453 &pmugrf {
45
- u-boot,dm-pre-reloc;
54
+ u-boot,dm-spl;
4655 status = "okay";
4756 };
4857
....@@ -87,12 +96,12 @@
8796 };
8897
8998 &cru {
90
- u-boot,dm-pre-reloc;
99
+ u-boot,dm-spl;
91100 status = "okay";
92101 };
93102
94103 &pmucru {
95
- u-boot,dm-pre-reloc;
104
+ u-boot,dm-spl;
96105 status = "okay";
97106 };
98107
....@@ -132,7 +141,7 @@
132141 };
133142
134143 &saradc {
135
- u-boot,dm-spl;
144
+ u-boot,dm-pre-reloc;
136145 status = "okay";
137146 };
138147
....@@ -194,7 +203,7 @@
194203 };
195204 };
196205
197
-&gmac0_clkin{
206
+&gmac0_clkin {
198207 u-boot,dm-pre-reloc;
199208 };
200209
....@@ -391,15 +400,15 @@
391400 };
392401
393402 &gpio2 {
394
- u-boot,dm-pre-reloc;
403
+ u-boot,dm-spl;
395404 };
396405
397406 &pcfg_pull_none_drv_level_1 {
398
- u-boot,dm-pre-reloc;
407
+ u-boot,dm-spl;
399408 };
400409
401410 &pcfg_pull_none_drv_level_2 {
402
- u-boot,dm-pre-reloc;
411
+ u-boot,dm-spl;
403412 };
404413
405414
....@@ -416,10 +425,6 @@
416425 };
417426
418427 &pcfg_pull_none {
419
- u-boot,dm-pre-reloc;
420
-};
421
-
422
-&secure_otp {
423428 u-boot,dm-spl;
424429 };
425430