| .. | .. |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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| 1 | 2 | /* |
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| 2 | 3 | * intel_pt_decoder.h: Intel Processor Trace support |
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| 3 | 4 | * Copyright (c) 2013-2014, Intel Corporation. |
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| 4 | | - * |
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| 5 | | - * This program is free software; you can redistribute it and/or modify it |
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| 6 | | - * under the terms and conditions of the GNU General Public License, |
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| 7 | | - * version 2, as published by the Free Software Foundation. |
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| 8 | | - * |
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| 9 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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| 10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 12 | | - * more details. |
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| 13 | | - * |
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| 14 | 5 | */ |
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| 15 | 6 | |
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| 16 | 7 | #ifndef INCLUDE__INTEL_PT_DECODER_H__ |
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| .. | .. |
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| 26 | 17 | #define INTEL_PT_ABORT_TX (1 << 1) |
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| 27 | 18 | #define INTEL_PT_ASYNC (1 << 2) |
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| 28 | 19 | #define INTEL_PT_FUP_IP (1 << 3) |
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| 20 | +#define INTEL_PT_SAMPLE_IPC (1 << 4) |
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| 29 | 21 | |
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| 30 | 22 | enum intel_pt_sample_type { |
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| 31 | 23 | INTEL_PT_BRANCH = 1 << 0, |
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| .. | .. |
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| 37 | 29 | INTEL_PT_EX_STOP = 1 << 6, |
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| 38 | 30 | INTEL_PT_PWR_EXIT = 1 << 7, |
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| 39 | 31 | INTEL_PT_CBR_CHG = 1 << 8, |
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| 32 | + INTEL_PT_TRACE_BEGIN = 1 << 9, |
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| 33 | + INTEL_PT_TRACE_END = 1 << 10, |
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| 34 | + INTEL_PT_BLK_ITEMS = 1 << 11, |
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| 40 | 35 | }; |
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| 41 | 36 | |
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| 42 | 37 | enum intel_pt_period_type { |
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| .. | .. |
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| 68 | 63 | INTEL_PT_FUP_WITH_NLIP = 1 << 0, |
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| 69 | 64 | }; |
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| 70 | 65 | |
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| 66 | +enum intel_pt_blk_type { |
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| 67 | + INTEL_PT_GP_REGS = 1, |
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| 68 | + INTEL_PT_PEBS_BASIC = 4, |
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| 69 | + INTEL_PT_PEBS_MEM = 5, |
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| 70 | + INTEL_PT_LBR_0 = 8, |
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| 71 | + INTEL_PT_LBR_1 = 9, |
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| 72 | + INTEL_PT_LBR_2 = 10, |
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| 73 | + INTEL_PT_XMM = 16, |
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| 74 | + INTEL_PT_BLK_TYPE_MAX |
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| 75 | +}; |
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| 76 | + |
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| 77 | +/* |
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| 78 | + * The block type numbers are not sequential but here they are given sequential |
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| 79 | + * positions to avoid wasting space for array placement. |
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| 80 | + */ |
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| 81 | +enum intel_pt_blk_type_pos { |
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| 82 | + INTEL_PT_GP_REGS_POS, |
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| 83 | + INTEL_PT_PEBS_BASIC_POS, |
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| 84 | + INTEL_PT_PEBS_MEM_POS, |
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| 85 | + INTEL_PT_LBR_0_POS, |
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| 86 | + INTEL_PT_LBR_1_POS, |
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| 87 | + INTEL_PT_LBR_2_POS, |
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| 88 | + INTEL_PT_XMM_POS, |
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| 89 | + INTEL_PT_BLK_TYPE_CNT |
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| 90 | +}; |
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| 91 | + |
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| 92 | +/* Get the array position for a block type */ |
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| 93 | +static inline int intel_pt_blk_type_pos(enum intel_pt_blk_type blk_type) |
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| 94 | +{ |
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| 95 | +#define BLK_TYPE(bt) [INTEL_PT_##bt] = INTEL_PT_##bt##_POS + 1 |
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| 96 | + const int map[INTEL_PT_BLK_TYPE_MAX] = { |
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| 97 | + BLK_TYPE(GP_REGS), |
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| 98 | + BLK_TYPE(PEBS_BASIC), |
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| 99 | + BLK_TYPE(PEBS_MEM), |
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| 100 | + BLK_TYPE(LBR_0), |
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| 101 | + BLK_TYPE(LBR_1), |
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| 102 | + BLK_TYPE(LBR_2), |
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| 103 | + BLK_TYPE(XMM), |
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| 104 | + }; |
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| 105 | +#undef BLK_TYPE |
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| 106 | + |
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| 107 | + return blk_type < INTEL_PT_BLK_TYPE_MAX ? map[blk_type] - 1 : -1; |
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| 108 | +} |
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| 109 | + |
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| 110 | +#define INTEL_PT_BLK_ITEM_ID_CNT 32 |
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| 111 | + |
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| 112 | +/* |
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| 113 | + * Use unions so that the block items can be accessed by name or by array index. |
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| 114 | + * There is an array of 32-bit masks for each block type, which indicate which |
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| 115 | + * values are present. Then arrays of 32 64-bit values for each block type. |
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| 116 | + */ |
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| 117 | +struct intel_pt_blk_items { |
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| 118 | + union { |
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| 119 | + uint32_t mask[INTEL_PT_BLK_TYPE_CNT]; |
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| 120 | + struct { |
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| 121 | + uint32_t has_rflags:1; |
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| 122 | + uint32_t has_rip:1; |
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| 123 | + uint32_t has_rax:1; |
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| 124 | + uint32_t has_rcx:1; |
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| 125 | + uint32_t has_rdx:1; |
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| 126 | + uint32_t has_rbx:1; |
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| 127 | + uint32_t has_rsp:1; |
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| 128 | + uint32_t has_rbp:1; |
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| 129 | + uint32_t has_rsi:1; |
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| 130 | + uint32_t has_rdi:1; |
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| 131 | + uint32_t has_r8:1; |
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| 132 | + uint32_t has_r9:1; |
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| 133 | + uint32_t has_r10:1; |
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| 134 | + uint32_t has_r11:1; |
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| 135 | + uint32_t has_r12:1; |
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| 136 | + uint32_t has_r13:1; |
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| 137 | + uint32_t has_r14:1; |
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| 138 | + uint32_t has_r15:1; |
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| 139 | + uint32_t has_unused_0:14; |
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| 140 | + uint32_t has_ip:1; |
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| 141 | + uint32_t has_applicable_counters:1; |
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| 142 | + uint32_t has_timestamp:1; |
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| 143 | + uint32_t has_unused_1:29; |
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| 144 | + uint32_t has_mem_access_address:1; |
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| 145 | + uint32_t has_mem_aux_info:1; |
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| 146 | + uint32_t has_mem_access_latency:1; |
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| 147 | + uint32_t has_tsx_aux_info:1; |
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| 148 | + uint32_t has_unused_2:28; |
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| 149 | + uint32_t has_lbr_0; |
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| 150 | + uint32_t has_lbr_1; |
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| 151 | + uint32_t has_lbr_2; |
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| 152 | + uint32_t has_xmm; |
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| 153 | + }; |
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| 154 | + }; |
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| 155 | + union { |
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| 156 | + uint64_t val[INTEL_PT_BLK_TYPE_CNT][INTEL_PT_BLK_ITEM_ID_CNT]; |
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| 157 | + struct { |
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| 158 | + struct { |
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| 159 | + uint64_t rflags; |
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| 160 | + uint64_t rip; |
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| 161 | + uint64_t rax; |
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| 162 | + uint64_t rcx; |
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| 163 | + uint64_t rdx; |
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| 164 | + uint64_t rbx; |
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| 165 | + uint64_t rsp; |
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| 166 | + uint64_t rbp; |
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| 167 | + uint64_t rsi; |
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| 168 | + uint64_t rdi; |
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| 169 | + uint64_t r8; |
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| 170 | + uint64_t r9; |
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| 171 | + uint64_t r10; |
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| 172 | + uint64_t r11; |
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| 173 | + uint64_t r12; |
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| 174 | + uint64_t r13; |
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| 175 | + uint64_t r14; |
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| 176 | + uint64_t r15; |
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| 177 | + uint64_t unused_0[INTEL_PT_BLK_ITEM_ID_CNT - 18]; |
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| 178 | + }; |
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| 179 | + struct { |
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| 180 | + uint64_t ip; |
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| 181 | + uint64_t applicable_counters; |
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| 182 | + uint64_t timestamp; |
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| 183 | + uint64_t unused_1[INTEL_PT_BLK_ITEM_ID_CNT - 3]; |
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| 184 | + }; |
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| 185 | + struct { |
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| 186 | + uint64_t mem_access_address; |
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| 187 | + uint64_t mem_aux_info; |
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| 188 | + uint64_t mem_access_latency; |
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| 189 | + uint64_t tsx_aux_info; |
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| 190 | + uint64_t unused_2[INTEL_PT_BLK_ITEM_ID_CNT - 4]; |
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| 191 | + }; |
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| 192 | + uint64_t lbr_0[INTEL_PT_BLK_ITEM_ID_CNT]; |
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| 193 | + uint64_t lbr_1[INTEL_PT_BLK_ITEM_ID_CNT]; |
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| 194 | + uint64_t lbr_2[INTEL_PT_BLK_ITEM_ID_CNT]; |
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| 195 | + uint64_t xmm[INTEL_PT_BLK_ITEM_ID_CNT]; |
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| 196 | + }; |
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| 197 | + }; |
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| 198 | + bool is_32_bit; |
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| 199 | +}; |
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| 200 | + |
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| 71 | 201 | struct intel_pt_state { |
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| 72 | 202 | enum intel_pt_sample_type type; |
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| 73 | 203 | int err; |
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| .. | .. |
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| 75 | 205 | uint64_t to_ip; |
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| 76 | 206 | uint64_t cr3; |
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| 77 | 207 | uint64_t tot_insn_cnt; |
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| 208 | + uint64_t tot_cyc_cnt; |
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| 78 | 209 | uint64_t timestamp; |
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| 79 | 210 | uint64_t est_timestamp; |
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| 80 | 211 | uint64_t trace_nr; |
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| .. | .. |
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| 83 | 214 | uint64_t pwre_payload; |
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| 84 | 215 | uint64_t pwrx_payload; |
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| 85 | 216 | uint64_t cbr_payload; |
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| 217 | + uint32_t cbr; |
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| 86 | 218 | uint32_t flags; |
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| 87 | 219 | enum intel_pt_insn_op insn_op; |
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| 88 | 220 | int insn_len; |
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| 89 | 221 | char insn[INTEL_PT_INSN_BUF_SZ]; |
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| 222 | + struct intel_pt_blk_items items; |
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| 90 | 223 | }; |
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| 91 | 224 | |
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| 92 | 225 | struct intel_pt_insn; |
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| .. | .. |
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| 99 | 232 | uint64_t trace_nr; |
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| 100 | 233 | }; |
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| 101 | 234 | |
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| 235 | +typedef int (*intel_pt_lookahead_cb_t)(struct intel_pt_buffer *, void *); |
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| 236 | + |
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| 102 | 237 | struct intel_pt_params { |
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| 103 | 238 | int (*get_trace)(struct intel_pt_buffer *buffer, void *data); |
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| 104 | 239 | int (*walk_insn)(struct intel_pt_insn *intel_pt_insn, |
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| 105 | 240 | uint64_t *insn_cnt_ptr, uint64_t *ip, uint64_t to_ip, |
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| 106 | 241 | uint64_t max_insn_cnt, void *data); |
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| 107 | 242 | bool (*pgd_ip)(uint64_t ip, void *data); |
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| 243 | + int (*lookahead)(void *data, intel_pt_lookahead_cb_t cb, void *cb_data); |
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| 108 | 244 | void *data; |
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| 109 | 245 | bool return_compression; |
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| 110 | 246 | bool branch_enable; |
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| 247 | + uint64_t ctl; |
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| 111 | 248 | uint64_t period; |
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| 112 | 249 | enum intel_pt_period_type period_type; |
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| 113 | 250 | unsigned max_non_turbo_ratio; |
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| .. | .. |
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| 115 | 252 | uint32_t tsc_ctc_ratio_n; |
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| 116 | 253 | uint32_t tsc_ctc_ratio_d; |
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| 117 | 254 | enum intel_pt_param_flags flags; |
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| 255 | + unsigned int quick; |
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| 118 | 256 | }; |
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| 119 | 257 | |
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| 120 | 258 | struct intel_pt_decoder; |
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| .. | .. |
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| 124 | 262 | |
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| 125 | 263 | const struct intel_pt_state *intel_pt_decode(struct intel_pt_decoder *decoder); |
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| 126 | 264 | |
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| 265 | +int intel_pt_fast_forward(struct intel_pt_decoder *decoder, uint64_t timestamp); |
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| 266 | + |
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| 127 | 267 | unsigned char *intel_pt_find_overlap(unsigned char *buf_a, size_t len_a, |
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| 128 | 268 | unsigned char *buf_b, size_t len_b, |
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| 129 | 269 | bool have_tsc, bool *consecutive); |
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