| .. | .. |
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| 529 | 529 | } |
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| 530 | 530 | } |
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| 531 | 531 | |
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| 532 | | -const char *rga_get_blend_mode_str(uint16_t alpha_rop_flag, |
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| 533 | | - uint16_t alpha_mode_0, |
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| 534 | | - uint16_t alpha_mode_1) |
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| 532 | +const char *rga_get_blend_mode_str(enum rga_alpha_blend_mode mode) |
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| 535 | 533 | { |
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| 536 | | - if (alpha_rop_flag == 0) { |
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| 534 | + switch (mode) { |
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| 535 | + case RGA_ALPHA_NONE: |
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| 537 | 536 | return "no blend"; |
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| 538 | | - } else if (alpha_rop_flag == 0x9) { |
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| 539 | | - if (alpha_mode_0 == 0x381A && alpha_mode_1 == 0x381A) |
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| 540 | | - return "105 src + (1-src.a)*dst"; |
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| 541 | | - else if (alpha_mode_0 == 0x483A && alpha_mode_1 == 0x483A) |
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| 542 | | - return "405 src.a * src + (1-src.a) * dst"; |
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| 543 | | - else |
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| 544 | | - return "check reg for more imformation"; |
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| 545 | | - } else { |
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| 537 | + |
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| 538 | + case RGA_ALPHA_BLEND_SRC: |
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| 539 | + return "src"; |
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| 540 | + |
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| 541 | + case RGA_ALPHA_BLEND_DST: |
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| 542 | + return "dst"; |
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| 543 | + |
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| 544 | + case RGA_ALPHA_BLEND_SRC_OVER: |
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| 545 | + return "src-over"; |
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| 546 | + |
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| 547 | + case RGA_ALPHA_BLEND_DST_OVER: |
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| 548 | + return "dst-over"; |
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| 549 | + |
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| 550 | + case RGA_ALPHA_BLEND_SRC_IN: |
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| 551 | + return "src-in"; |
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| 552 | + |
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| 553 | + case RGA_ALPHA_BLEND_DST_IN: |
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| 554 | + return "dst-in"; |
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| 555 | + |
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| 556 | + case RGA_ALPHA_BLEND_SRC_OUT: |
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| 557 | + return "src-out"; |
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| 558 | + |
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| 559 | + case RGA_ALPHA_BLEND_DST_OUT: |
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| 560 | + return "dst-out"; |
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| 561 | + |
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| 562 | + case RGA_ALPHA_BLEND_SRC_ATOP: |
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| 563 | + return "src-atop"; |
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| 564 | + |
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| 565 | + case RGA_ALPHA_BLEND_DST_ATOP: |
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| 566 | + return "dst-atop"; |
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| 567 | + |
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| 568 | + case RGA_ALPHA_BLEND_XOR: |
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| 569 | + return "xor"; |
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| 570 | + |
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| 571 | + case RGA_ALPHA_BLEND_CLEAR: |
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| 572 | + return "clear"; |
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| 573 | + |
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| 574 | + default: |
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| 546 | 575 | return "check reg for more imformation"; |
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| 547 | 576 | } |
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| 548 | 577 | } |
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| .. | .. |
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| 575 | 604 | } |
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| 576 | 605 | } |
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| 577 | 606 | |
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| 607 | +const char *rga_get_core_name(enum RGA_SCHEDULER_CORE core) |
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| 608 | +{ |
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| 609 | + switch (core) { |
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| 610 | + case RGA_SCHEDULER_RGA3_CORE0: |
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| 611 | + return "RGA3_core0"; |
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| 612 | + case RGA_SCHEDULER_RGA3_CORE1: |
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| 613 | + return "RGA3_core1"; |
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| 614 | + case RGA_SCHEDULER_RGA2_CORE0: |
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| 615 | + return "RGA2_core0"; |
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| 616 | + default: |
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| 617 | + return "unknown_core"; |
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| 618 | + } |
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| 619 | +} |
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| 620 | + |
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| 578 | 621 | void rga_convert_addr(struct rga_img_info_t *img, bool before_vir_get_channel) |
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| 579 | 622 | { |
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| 580 | 623 | /* |
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