| .. | .. |
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| 24 | 24 | #include <linux/poll.h> |
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| 25 | 25 | #include <linux/platform_device.h> |
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| 26 | 26 | #include <soc/rockchip/pm_domains.h> |
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| 27 | +#include <uapi/linux/rk-mpp.h> |
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| 27 | 28 | |
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| 28 | 29 | #define MHZ (1000 * 1000) |
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| 29 | 30 | #define MPP_WORK_TIMEOUT_DELAY (500) |
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| .. | .. |
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| 31 | 32 | #define MPP_MAX_MSG_NUM (16) |
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| 32 | 33 | #define MPP_MAX_REG_TRANS_NUM (60) |
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| 33 | 34 | #define MPP_MAX_TASK_CAPACITY (16) |
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| 34 | | -/* define flags for mpp_request */ |
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| 35 | | -#define MPP_FLAGS_MULTI_MSG (0x00000001) |
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| 36 | | -#define MPP_FLAGS_LAST_MSG (0x00000002) |
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| 37 | | -#define MPP_FLAGS_REG_FD_NO_TRANS (0x00000004) |
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| 38 | | -#define MPP_FLAGS_SCL_FD_NO_TRANS (0x00000008) |
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| 39 | | -#define MPP_FLAGS_REG_NO_OFFSET (0x00000010) |
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| 40 | | -#define MPP_FLAGS_SECURE_MODE (0x00010000) |
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| 41 | 35 | |
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| 42 | 36 | /* grf mask for get value */ |
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| 43 | 37 | #define MPP_GRF_VAL_MASK (0xFFFF) |
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| .. | .. |
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| 91 | 85 | MPP_DRIVER_AV1DEC, |
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| 92 | 86 | MPP_DRIVER_VDPP, |
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| 93 | 87 | MPP_DRIVER_BUTT, |
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| 94 | | -}; |
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| 95 | | - |
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| 96 | | -/** |
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| 97 | | - * Command type: keep the same as user space |
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| 98 | | - */ |
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| 99 | | -enum MPP_DEV_COMMAND_TYPE { |
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| 100 | | - MPP_CMD_QUERY_BASE = 0, |
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| 101 | | - MPP_CMD_QUERY_HW_SUPPORT = MPP_CMD_QUERY_BASE + 0, |
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| 102 | | - MPP_CMD_QUERY_HW_ID = MPP_CMD_QUERY_BASE + 1, |
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| 103 | | - MPP_CMD_QUERY_CMD_SUPPORT = MPP_CMD_QUERY_BASE + 2, |
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| 104 | | - MPP_CMD_QUERY_BUTT, |
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| 105 | | - |
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| 106 | | - MPP_CMD_INIT_BASE = 0x100, |
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| 107 | | - MPP_CMD_INIT_CLIENT_TYPE = MPP_CMD_INIT_BASE + 0, |
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| 108 | | - MPP_CMD_INIT_DRIVER_DATA = MPP_CMD_INIT_BASE + 1, |
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| 109 | | - MPP_CMD_INIT_TRANS_TABLE = MPP_CMD_INIT_BASE + 2, |
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| 110 | | - MPP_CMD_INIT_BUTT, |
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| 111 | | - |
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| 112 | | - MPP_CMD_SEND_BASE = 0x200, |
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| 113 | | - MPP_CMD_SET_REG_WRITE = MPP_CMD_SEND_BASE + 0, |
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| 114 | | - MPP_CMD_SET_REG_READ = MPP_CMD_SEND_BASE + 1, |
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| 115 | | - MPP_CMD_SET_REG_ADDR_OFFSET = MPP_CMD_SEND_BASE + 2, |
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| 116 | | - MPP_CMD_SET_RCB_INFO = MPP_CMD_SEND_BASE + 3, |
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| 117 | | - MPP_CMD_SET_SESSION_FD = MPP_CMD_SEND_BASE + 4, |
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| 118 | | - MPP_CMD_SEND_BUTT, |
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| 119 | | - |
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| 120 | | - MPP_CMD_POLL_BASE = 0x300, |
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| 121 | | - MPP_CMD_POLL_HW_FINISH = MPP_CMD_POLL_BASE + 0, |
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| 122 | | - MPP_CMD_POLL_HW_IRQ = MPP_CMD_POLL_BASE + 1, |
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| 123 | | - MPP_CMD_POLL_BUTT, |
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| 124 | | - |
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| 125 | | - MPP_CMD_CONTROL_BASE = 0x400, |
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| 126 | | - MPP_CMD_RESET_SESSION = MPP_CMD_CONTROL_BASE + 0, |
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| 127 | | - MPP_CMD_TRANS_FD_TO_IOVA = MPP_CMD_CONTROL_BASE + 1, |
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| 128 | | - MPP_CMD_RELEASE_FD = MPP_CMD_CONTROL_BASE + 2, |
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| 129 | | - MPP_CMD_SEND_CODEC_INFO = MPP_CMD_CONTROL_BASE + 3, |
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| 130 | | - MPP_CMD_CONTROL_BUTT, |
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| 131 | | - |
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| 132 | | - MPP_CMD_BUTT, |
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| 133 | 88 | }; |
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| 134 | 89 | |
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| 135 | 90 | enum MPP_CLOCK_MODE { |
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| .. | .. |
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| 194 | 149 | struct mpp_dma_session; |
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| 195 | 150 | struct mpp_taskqueue; |
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| 196 | 151 | struct iommu_domain; |
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| 197 | | - |
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| 198 | | -/* data common struct for parse out */ |
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| 199 | | -struct mpp_request { |
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| 200 | | - __u32 cmd; |
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| 201 | | - __u32 flags; |
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| 202 | | - __u32 size; |
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| 203 | | - __u32 offset; |
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| 204 | | - void __user *data; |
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| 205 | | -}; |
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| 206 | 152 | |
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| 207 | 153 | /* struct use to collect task set and poll message */ |
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| 208 | 154 | struct mpp_task_msgs { |
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| .. | .. |
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| 544 | 490 | u32 core_id_max; |
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| 545 | 491 | u32 core_count; |
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| 546 | 492 | unsigned long dev_active_flags; |
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| 547 | | - u32 iommu_fault; |
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| 548 | 493 | }; |
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| 549 | 494 | |
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| 550 | 495 | struct mpp_reset_group { |
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