modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/usb/host/xhci-rcar.h
..
..
@@ -1,4 +1,4 @@
1
-// SPDX-License-Identifier: GPL-2.0
1
+/* SPDX-License-Identifier: GPL-2.0 */
2
2
 /*
3
3
  * drivers/usb/host/xhci-rcar.h
4
4
  *
..
..
@@ -31,4 +31,25 @@
31
31
 	return 0;
32
32
 }
33
33
 #endif
34
+
35
+/*
36
+ * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
37
+ * to 1. However, these SoCs don't support 64-bit address memory
38
+ * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
39
+ * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
40
+ * xhci_gen_setup() by using the XHCI_NO_64BIT_SUPPORT quirk.
41
+ *
42
+ * And, since the firmware/internal CPU control the USBSTS.STS_HALT
43
+ * and the process speed is down when the roothub port enters U3,
44
+ * long delay for the handshake of STS_HALT is neeed in xhci_suspend()
45
+ * by using the XHCI_SLOW_SUSPEND quirk.
46
+ */
47
+#define SET_XHCI_PLAT_PRIV_FOR_RCAR(firmware)				\
48
+	.firmware_name = firmware,					\
49
+	.quirks = XHCI_NO_64BIT_SUPPORT | XHCI_TRUST_TX_LENGTH |	\
50
+		  XHCI_SLOW_SUSPEND,					\
51
+	.init_quirk = xhci_rcar_init_quirk,				\
52
+	.plat_start = xhci_rcar_start,					\
53
+	.resume_quirk = xhci_rcar_resume_quirk,
54
+
34
55
 #endif /* _XHCI_RCAR_H */