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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/drivers/staging/comedi/comedi.h
....@@ -107,6 +107,7 @@
107107 #define INSN_WRITE		(1 | INSN_MASK_WRITE)
108108 #define INSN_BITS		(2 | INSN_MASK_READ | INSN_MASK_WRITE)
109109 #define INSN_CONFIG		(3 | INSN_MASK_READ | INSN_MASK_WRITE)
110
+#define INSN_DEVICE_CONFIG	(INSN_CONFIG | INSN_MASK_SPECIAL)
110111 #define INSN_GTOD		(4 | INSN_MASK_READ | INSN_MASK_SPECIAL)
111112 #define INSN_WAIT		(5 | INSN_MASK_WRITE | INSN_MASK_SPECIAL)
112113 #define INSN_INTTRIG		(6 | INSN_MASK_WRITE | INSN_MASK_SPECIAL)
....@@ -301,6 +302,8 @@
301302  * @INSN_CONFIG_PWM_SET_H_BRIDGE: Set PWM H bridge duty cycle and polarity for
302303  *				a relay simultaneously.
303304  * @INSN_CONFIG_PWM_GET_H_BRIDGE: Get PWM H bridge duty cycle and polarity.
305
+ * @INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS: Get the hardware timing restraints,
306
+ *				regardless of trigger sources.
304307  */
305308 enum configuration_ids {
306309 	INSN_CONFIG_DIO_INPUT = COMEDI_INPUT,
....@@ -344,7 +347,25 @@
344347 	INSN_CONFIG_PWM_GET_PERIOD = 5001,
345348 	INSN_CONFIG_GET_PWM_STATUS = 5002,
346349 	INSN_CONFIG_PWM_SET_H_BRIDGE = 5003,
347
-	INSN_CONFIG_PWM_GET_H_BRIDGE = 5004
350
+	INSN_CONFIG_PWM_GET_H_BRIDGE = 5004,
351
+	INSN_CONFIG_GET_CMD_TIMING_CONSTRAINTS = 5005,
352
+};
353
+
354
+/**
355
+ * enum device_configuration_ids - COMEDI configuration instruction codes global
356
+ * to an entire device.
357
+ * @INSN_DEVICE_CONFIG_TEST_ROUTE:	Validate the possibility of a
358
+ *					globally-named route
359
+ * @INSN_DEVICE_CONFIG_CONNECT_ROUTE:	Connect a globally-named route
360
+ * @INSN_DEVICE_CONFIG_DISCONNECT_ROUTE:Disconnect a globally-named route
361
+ * @INSN_DEVICE_CONFIG_GET_ROUTES:	Get a list of all globally-named routes
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+ *					that are valid for a particular device.
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+ */
364
+enum device_config_route_ids {
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+	INSN_DEVICE_CONFIG_TEST_ROUTE = 0,
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+	INSN_DEVICE_CONFIG_CONNECT_ROUTE = 1,
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+	INSN_DEVICE_CONFIG_DISCONNECT_ROUTE = 2,
368
+	INSN_DEVICE_CONFIG_GET_ROUTES = 3,
348369 };
349370 
350371 /**
....@@ -659,7 +680,7 @@
659680  * value of 1 volt.
660681  *
661682  * The only defined flag value is %RF_EXTERNAL (%0x100), indicating that the
662
- * the range needs to be multiplied by an external reference.
683
+ * range needs to be multiplied by an external reference.
663684  */
664685 struct comedi_krange {
665686 	int min;
....@@ -928,6 +949,160 @@
928949 	I8254_BINARY = 0
929950 };
930951 
952
+/* *** BEGIN GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */
953
+
954
+/*
955
+ * Common National Instruments Terminal/Signal names.
956
+ * Some of these have no NI_ prefix as they are useful for non-NI hardware, such
957
+ * as those that utilize the PXI/RTSI trigger lines.
958
+ *
959
+ * NOTE ABOUT THE CHOICE OF NAMES HERE AND THE CAMELSCRIPT:
960
+ *   The choice to use CamelScript and the exact names below is for
961
+ *   maintainability, clarity, similarity to manufacturer's documentation,
962
+ *   _and_ a mitigation for confusion that has plagued the use of these drivers
963
+ *   for years!
964
+ *
965
+ *   More detail:
966
+ *   There have been significant confusions over the past many years for users
967
+ *   when trying to understand how to connect to/from signals and terminals on
968
+ *   NI hardware using comedi.  The major reason for this is that the actual
969
+ *   register values were exposed and required to be used by users.  Several
970
+ *   major reasons exist why this caused major confusion for users:
971
+ *   1) The register values are _NOT_ in user documentation, but rather in
972
+ *     arcane locations, such as a few register programming manuals that are
973
+ *     increasingly hard to find and the NI MHDDK (comments in example code).
974
+ *     There is no one place to find the various valid values of the registers.
975
+ *   2) The register values are _NOT_ completely consistent.  There is no way to
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+ *     gain any sense of intuition of which values, or even enums one should use
977
+ *     for various registers.  There was some attempt in prior use of comedi to
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+ *     name enums such that a user might know which enums should be used for
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+ *     varying purposes, but the end-user had to gain a knowledge of register
980
+ *     values to correctly wield this approach.
981
+ *   3) The names for signals and registers found in the various register level
982
+ *     programming manuals and vendor-provided documentation are _not_ even
983
+ *     close to the same names that are in the end-user documentation.
984
+ *
985
+ *   Similar, albeit less, confusion plagued NI's previous version of their own
986
+ *   drivers.  Earlier than 2003, NI greatly simplified the situation for users
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+ *   by releasing a new API that abstracted the names of signals/terminals to a
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+ *   common and intuitive set of names.
989
+ *
990
+ *   The names below mirror the names chosen and well documented by NI.  These
991
+ *   names are exposed to the user via the comedilib user library.  By keeping
992
+ *   the names below, in spite of the use of CamelScript, maintenance will be
993
+ *   greatly eased and confusion for users _and_ comedi developers will be
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+ *   greatly reduced.
995
+ */
996
+
997
+/*
998
+ * Base of abstracted NI names.
999
+ * The first 16 bits of *_arg are reserved for channel selection.
1000
+ * Since we only actually need the first 4 or 5 bits for all register values on
1001
+ * NI select registers anyways, we'll identify all values >= (1<<15) as being an
1002
+ * abstracted NI signal/terminal name.
1003
+ * These values are also used/returned by INSN_DEVICE_CONFIG_TEST_ROUTE,
1004
+ * INSN_DEVICE_CONFIG_CONNECT_ROUTE, INSN_DEVICE_CONFIG_DISCONNECT_ROUTE,
1005
+ * and INSN_DEVICE_CONFIG_GET_ROUTES.
1006
+ */
1007
+#define NI_NAMES_BASE	0x8000u
1008
+
1009
+#define _TERM_N(base, n, x)	((base) + ((x) & ((n) - 1)))
1010
+
1011
+/*
1012
+ * not necessarily all allowed 64 PFIs are valid--certainly not for all devices
1013
+ */
1014
+#define NI_PFI(x)		_TERM_N(NI_NAMES_BASE, 64, x)
1015
+/* 8 trigger lines by standard, Some devices cannot talk to all eight. */
1016
+#define TRIGGER_LINE(x)		_TERM_N(NI_PFI(-1) + 1, 8, x)
1017
+/* 4 RTSI shared MUXes to route signals to/from TRIGGER_LINES on NI hardware */
1018
+#define NI_RTSI_BRD(x)		_TERM_N(TRIGGER_LINE(-1) + 1, 4, x)
1019
+
1020
+/* *** Counter/timer names : 8 counters max *** */
1021
+#define NI_MAX_COUNTERS		8
1022
+#define NI_COUNTER_NAMES_BASE	(NI_RTSI_BRD(-1)  + 1)
1023
+#define NI_CtrSource(x)	      _TERM_N(NI_COUNTER_NAMES_BASE, NI_MAX_COUNTERS, x)
1024
+/* Gate, Aux, A,B,Z are all treated, at times as gates */
1025
+#define NI_GATES_NAMES_BASE	(NI_CtrSource(-1) + 1)
1026
+#define NI_CtrGate(x)		_TERM_N(NI_GATES_NAMES_BASE, NI_MAX_COUNTERS, x)
1027
+#define NI_CtrAux(x)		_TERM_N(NI_CtrGate(-1)  + 1, NI_MAX_COUNTERS, x)
1028
+#define NI_CtrA(x)		_TERM_N(NI_CtrAux(-1)   + 1, NI_MAX_COUNTERS, x)
1029
+#define NI_CtrB(x)		_TERM_N(NI_CtrA(-1)     + 1, NI_MAX_COUNTERS, x)
1030
+#define NI_CtrZ(x)		_TERM_N(NI_CtrB(-1)     + 1, NI_MAX_COUNTERS, x)
1031
+#define NI_GATES_NAMES_MAX	NI_CtrZ(-1)
1032
+#define NI_CtrArmStartTrigger(x) _TERM_N(NI_CtrZ(-1)    + 1, NI_MAX_COUNTERS, x)
1033
+#define NI_CtrInternalOutput(x) \
1034
+		      _TERM_N(NI_CtrArmStartTrigger(-1) + 1, NI_MAX_COUNTERS, x)
1035
+/** external pin(s) labeled conveniently as Ctr<i>Out. */
1036
+#define NI_CtrOut(x)   _TERM_N(NI_CtrInternalOutput(-1) + 1, NI_MAX_COUNTERS, x)
1037
+/** For Buffered sampling of ctr -- x series capability. */
1038
+#define NI_CtrSampleClock(x)	_TERM_N(NI_CtrOut(-1)   + 1, NI_MAX_COUNTERS, x)
1039
+#define NI_COUNTER_NAMES_MAX	NI_CtrSampleClock(-1)
1040
+
1041
+enum ni_common_signal_names {
1042
+	/* PXI_Star: this is a non-NI-specific signal */
1043
+	PXI_Star = NI_COUNTER_NAMES_MAX + 1,
1044
+	PXI_Clk10,
1045
+	PXIe_Clk100,
1046
+	NI_AI_SampleClock,
1047
+	NI_AI_SampleClockTimebase,
1048
+	NI_AI_StartTrigger,
1049
+	NI_AI_ReferenceTrigger,
1050
+	NI_AI_ConvertClock,
1051
+	NI_AI_ConvertClockTimebase,
1052
+	NI_AI_PauseTrigger,
1053
+	NI_AI_HoldCompleteEvent,
1054
+	NI_AI_HoldComplete,
1055
+	NI_AI_ExternalMUXClock,
1056
+	NI_AI_STOP, /* pulse signal that occurs when a update is finished(?) */
1057
+	NI_AO_SampleClock,
1058
+	NI_AO_SampleClockTimebase,
1059
+	NI_AO_StartTrigger,
1060
+	NI_AO_PauseTrigger,
1061
+	NI_DI_SampleClock,
1062
+	NI_DI_SampleClockTimebase,
1063
+	NI_DI_StartTrigger,
1064
+	NI_DI_ReferenceTrigger,
1065
+	NI_DI_PauseTrigger,
1066
+	NI_DI_InputBufferFull,
1067
+	NI_DI_ReadyForStartEvent,
1068
+	NI_DI_ReadyForTransferEventBurst,
1069
+	NI_DI_ReadyForTransferEventPipelined,
1070
+	NI_DO_SampleClock,
1071
+	NI_DO_SampleClockTimebase,
1072
+	NI_DO_StartTrigger,
1073
+	NI_DO_PauseTrigger,
1074
+	NI_DO_OutputBufferFull,
1075
+	NI_DO_DataActiveEvent,
1076
+	NI_DO_ReadyForStartEvent,
1077
+	NI_DO_ReadyForTransferEvent,
1078
+	NI_MasterTimebase,
1079
+	NI_20MHzTimebase,
1080
+	NI_80MHzTimebase,
1081
+	NI_100MHzTimebase,
1082
+	NI_200MHzTimebase,
1083
+	NI_100kHzTimebase,
1084
+	NI_10MHzRefClock,
1085
+	NI_FrequencyOutput,
1086
+	NI_ChangeDetectionEvent,
1087
+	NI_AnalogComparisonEvent,
1088
+	NI_WatchdogExpiredEvent,
1089
+	NI_WatchdogExpirationTrigger,
1090
+	NI_SCXI_Trig1,
1091
+	NI_LogicLow,
1092
+	NI_LogicHigh,
1093
+	NI_ExternalStrobe,
1094
+	NI_PFI_DO,
1095
+	NI_CaseGround,
1096
+	/* special internal signal used as variable source for RTSI bus: */
1097
+	NI_RGOUT0,
1098
+
1099
+	/* just a name to make the next more convenient, regardless of above */
1100
+	_NI_NAMES_MAX_PLUS_1,
1101
+	NI_NUM_NAMES = _NI_NAMES_MAX_PLUS_1 - NI_NAMES_BASE,
1102
+};
1103
+
1104
+/* *** END GLOBALLY-NAMED NI TERMINALS/SIGNALS *** */
1105
+
9311106 #define NI_USUAL_PFI_SELECT(x)	(((x) < 10) ? (0x1 + (x)) : (0xb + (x)))
9321107 #define NI_USUAL_RTSI_SELECT(x)	(((x) < 7) ? (0xb + (x)) : 0x1b)
9331108