modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/platform/mellanox/mlxreg-io.c
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@@ -30,6 +30,7 @@
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  * @mlxreg_io_dev_attr: sysfs sensor device attribute array;
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  * @group: sysfs attribute group;
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  * @groups: list of sysfs attribute group for hwmon registration;
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+ * @regsize: size of a register value;
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  */
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 struct mlxreg_io_priv_data {
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 	struct platform_device *pdev;
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@@ -39,27 +40,30 @@
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 	struct sensor_device_attribute mlxreg_io_dev_attr[MLXREG_IO_ATT_NUM];
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 	struct attribute_group group;
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 	const struct attribute_group *groups[2];
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+	int regsize;
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 };
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 static int
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 mlxreg_io_get_reg(void *regmap, struct mlxreg_core_data *data, u32 in_val,
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-		  bool rw_flag, u32 *regval)
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+		  bool rw_flag, int regsize, u32 *regval)
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 {
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-	int ret;
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+	int i, val, ret;
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 	ret = regmap_read(regmap, data->reg, regval);
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 	if (ret)
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 		goto access_error;
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 	/*
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-	 * There are three kinds of attributes: single bit, full register's
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-	 * bits and bit sequence. For the first kind field mask indicates which
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-	 * bits are not related and field bit is set zero. For the second kind
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-	 * field mask is set to zero and field bit is set with all bits one.
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-	 * No special handling for such kind of attributes - pass value as is.
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-	 * For the third kind, field mask indicates which bits are related and
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-	 * field bit is set to the first bit number (from 1 to 32) is the bit
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-	 * sequence.
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+	 * There are four kinds of attributes: single bit, full register's
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+	 * bits, bit sequence, bits in few registers For the first kind field
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+	 * mask indicates which bits are not related and field bit is set zero.
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+	 * For the second kind field mask is set to zero and field bit is set
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+	 * with all bits one. No special handling for such kind of attributes -
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+	 * pass value as is. For the third kind, the field mask indicates which
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+	 * bits are related and the field bit is set to the first bit number
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+	 * (from 1 to 32) is the bit sequence. For the fourth kind - the number
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+	 * of registers which should be read for getting an attribute are
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+	 * specified through 'data->regnum' field.
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 	 */
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 	if (!data->bit) {
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 		/* Single bit. */
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@@ -83,6 +87,19 @@
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 			/* Clear relevant bits and set them to new value. */
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 			*regval = (*regval & ~data->mask) | in_val;
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 		}
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+	} else {
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+		/*
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+		 * Some attributes could occupied few registers in case regmap
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+		 * bit size is 8 or 16. Compose such attributes from 'regnum'
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+		 * registers. Such attributes contain read-only data.
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+		 */
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+		for (i = 1; i < data->regnum; i++) {
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+			ret = regmap_read(regmap, data->reg + i, &val);
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+			if (ret)
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+				goto access_error;
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+
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+			*regval |= rol32(val, regsize * i * 8);
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+		}
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 	}
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104
 
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 access_error:
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@@ -99,7 +116,8 @@
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 	u32 regval = 0;
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 	int ret;
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-	ret = mlxreg_io_get_reg(priv->pdata->regmap, data, 0, true, &regval);
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+	ret = mlxreg_io_get_reg(priv->pdata->regmap, data, 0, true,
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+				priv->regsize, &regval);
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 	if (ret)
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 		goto access_error;
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@@ -128,7 +146,7 @@
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 		return ret;
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 	ret = mlxreg_io_get_reg(priv->pdata->regmap, data, input_val, false,
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-				&regval);
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+				priv->regsize, &regval);
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 	if (ret)
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 		goto access_error;
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..
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@@ -207,6 +225,9 @@
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 	}
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 	priv->pdev = pdev;
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+	priv->regsize = regmap_get_val_bytes(priv->pdata->regmap);
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+	if (priv->regsize < 0)
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+		return priv->regsize;
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 	err = mlxreg_io_attr_init(priv);
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 	if (err) {