| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * HiSilicon SoC HHA uncore Hardware event counters support |
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| 3 | 4 | * |
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| .. | .. |
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| 6 | 7 | * Anurup M <anurup.m@huawei.com> |
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| 7 | 8 | * |
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| 8 | 9 | * This code is based on the uncore PMUs like arm-cci and arm-ccn. |
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| 9 | | - * |
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| 10 | | - * This program is free software; you can redistribute it and/or modify |
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| 11 | | - * it under the terms of the GNU General Public License version 2 as |
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| 12 | | - * published by the Free Software Foundation. |
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| 13 | 10 | */ |
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| 14 | 11 | #include <linux/acpi.h> |
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| 15 | 12 | #include <linux/bug.h> |
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| .. | .. |
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| 210 | 207 | |
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| 211 | 208 | /* Read and init IRQ */ |
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| 212 | 209 | irq = platform_get_irq(pdev, 0); |
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| 213 | | - if (irq < 0) { |
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| 214 | | - dev_err(&pdev->dev, "HHA PMU get irq fail; irq:%d\n", irq); |
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| 210 | + if (irq < 0) |
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| 215 | 211 | return irq; |
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| 216 | | - } |
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| 217 | 212 | |
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| 218 | 213 | ret = devm_request_irq(&pdev->dev, irq, hisi_hha_pmu_isr, |
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| 219 | 214 | IRQF_NOBALANCING | IRQF_NO_THREAD, |
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| .. | .. |
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| 239 | 234 | struct hisi_pmu *hha_pmu) |
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| 240 | 235 | { |
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| 241 | 236 | unsigned long long id; |
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| 242 | | - struct resource *res; |
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| 243 | 237 | acpi_status status; |
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| 244 | 238 | |
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| 245 | 239 | status = acpi_evaluate_integer(ACPI_HANDLE(&pdev->dev), |
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| .. | .. |
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| 261 | 255 | /* HHA PMUs only share the same SCCL */ |
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| 262 | 256 | hha_pmu->ccl_id = -1; |
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| 263 | 257 | |
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| 264 | | - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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| 265 | | - hha_pmu->base = devm_ioremap_resource(&pdev->dev, res); |
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| 258 | + hha_pmu->base = devm_platform_ioremap_resource(pdev, 0); |
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| 266 | 259 | if (IS_ERR(hha_pmu->base)) { |
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| 267 | 260 | dev_err(&pdev->dev, "ioremap failed for hha_pmu resource\n"); |
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| 268 | 261 | return PTR_ERR(hha_pmu->base); |
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| .. | .. |
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| 397 | 390 | hha_pmu->sccl_id, hha_pmu->index_id); |
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| 398 | 391 | hha_pmu->pmu = (struct pmu) { |
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| 399 | 392 | .name = name, |
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| 393 | + .module = THIS_MODULE, |
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| 400 | 394 | .task_ctx_nr = perf_invalid_context, |
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| 401 | 395 | .event_init = hisi_uncore_pmu_event_init, |
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| 402 | 396 | .pmu_enable = hisi_uncore_pmu_enable, |
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| .. | .. |
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| 407 | 401 | .stop = hisi_uncore_pmu_stop, |
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| 408 | 402 | .read = hisi_uncore_pmu_read, |
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| 409 | 403 | .attr_groups = hisi_hha_pmu_attr_groups, |
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| 404 | + .capabilities = PERF_PMU_CAP_NO_EXCLUDE, |
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| 410 | 405 | }; |
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| 411 | 406 | |
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| 412 | 407 | ret = perf_pmu_register(&hha_pmu->pmu, name, -1); |
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| 413 | 408 | if (ret) { |
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| 414 | 409 | dev_err(hha_pmu->dev, "HHA PMU register failed!\n"); |
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| 415 | | - cpuhp_state_remove_instance(CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, |
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| 416 | | - &hha_pmu->node); |
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| 410 | + cpuhp_state_remove_instance_nocalls( |
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| 411 | + CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, &hha_pmu->node); |
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| 412 | + irq_set_affinity_hint(hha_pmu->irq, NULL); |
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| 417 | 413 | } |
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| 418 | 414 | |
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| 419 | 415 | return ret; |
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| .. | .. |
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| 424 | 420 | struct hisi_pmu *hha_pmu = platform_get_drvdata(pdev); |
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| 425 | 421 | |
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| 426 | 422 | perf_pmu_unregister(&hha_pmu->pmu); |
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| 427 | | - cpuhp_state_remove_instance(CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, |
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| 428 | | - &hha_pmu->node); |
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| 423 | + cpuhp_state_remove_instance_nocalls(CPUHP_AP_PERF_ARM_HISI_HHA_ONLINE, |
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| 424 | + &hha_pmu->node); |
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| 425 | + irq_set_affinity_hint(hha_pmu->irq, NULL); |
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| 429 | 426 | |
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| 430 | 427 | return 0; |
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| 431 | 428 | } |
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| .. | .. |
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| 434 | 431 | .driver = { |
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| 435 | 432 | .name = "hisi_hha_pmu", |
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| 436 | 433 | .acpi_match_table = ACPI_PTR(hisi_hha_pmu_acpi_match), |
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| 434 | + .suppress_bind_attrs = true, |
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| 437 | 435 | }, |
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| 438 | 436 | .probe = hisi_hha_pmu_probe, |
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| 439 | 437 | .remove = hisi_hha_pmu_remove, |
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