modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/net/wireless/rsi/rsi_boot_params.h
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@@ -80,6 +80,15 @@
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 	struct afepll_info afepll_info_g;
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 } __packed;
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+struct pll_config_9116 {
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+	__le16 pll_ctrl_set_reg;
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+	__le16 pll_ctrl_clr_reg;
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+	__le16 pll_modem_conig_reg;
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+	__le16 soc_clk_config_reg;
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+	__le16 adc_dac_strm1_config_reg;
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+	__le16 adc_dac_strm2_config_reg;
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+} __packed;
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+
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 /* structure to store configs related to UMAC clk programming */
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 struct switch_clk {
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 	__le16 switch_clk_info;
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@@ -93,9 +102,30 @@
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 	__le16 qspi_uart_clock_reg_config;
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 } __packed;
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+#define RSI_SWITCH_TASS_CLK			BIT(0)
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+#define RSI_SWITCH_QSPI_CLK			BIT(1)
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+#define RSI_SWITCH_SLP_CLK_2_32			BIT(2)
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+#define RSI_SWITCH_WLAN_BBP_LMAC_CLK_REG	BIT(3)
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+#define RSI_SWITCH_ZBBT_BBP_LMAC_CLK_REG	BIT(4)
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+#define RSI_SWITCH_BBP_LMAC_CLK_REG		BIT(5)
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+#define RSI_MODEM_CLK_160MHZ			BIT(6)
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+
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+struct switch_clk_9116 {
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+	__le32 switch_clk_info;
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+	__le32 tass_clock_reg;
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+	__le32 wlan_bbp_lmac_clk_reg_val;
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+	__le32 zbbt_bbp_lmac_clk_reg_val;
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+	__le32 bbp_lmac_clk_en_val;
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+} __packed;
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+
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 struct device_clk_info {
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 	struct pll_config pll_config_g;
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 	struct switch_clk switch_clk_g;
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+} __packed;
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+
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+struct device_clk_info_9116 {
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+	struct pll_config_9116 pll_config_9116_g;
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+	struct switch_clk_9116 switch_clk_9116_g;
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 } __packed;
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 struct bootup_params {
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@@ -127,4 +157,37 @@
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 	__le32 max_threshold_to_avoid_sleep;
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 	u8 beacon_resedue_alg_en;
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 } __packed;
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+
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+struct bootup_params_9116 {
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+	__le16 magic_number;
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+#define LOADED_TOKEN  0x5AA5   /* Bootup params are installed by host
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+				* or OTP/FLASH (Bootloader)
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+				*/
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+#define ROM_TOKEN     0x55AA   /* Bootup params are taken from ROM
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+				* itself in MCU mode.
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+				*/
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+	__le16 crystal_good_time;
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+	__le32 valid;
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+	__le32 reserved_for_valids;
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+	__le16 bootup_mode_info;
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+#define BT_COEXIST		BIT(0)
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+#define BOOTUP_MODE		(BIT(2) | BIT(1))
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+#define CUR_DEV_MODE_9116	(bootup_params_9116.bootup_mode_info >> 1)
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+	__le16 digital_loop_back_params;
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+	__le16 rtls_timestamp_en;
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+	__le16 host_spi_intr_cfg;
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+	struct device_clk_info_9116 device_clk_info_9116[1];
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+	__le32 buckboost_wakeup_cnt;
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+	__le16 pmu_wakeup_wait;
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+	u8 shutdown_wait_time;
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+	u8 pmu_slp_clkout_sel;
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+	__le32 wdt_prog_value;
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+	__le32 wdt_soc_rst_delay;
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+	__le32 dcdc_operation_mode;
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+	__le32 soc_reset_wait_cnt;
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+	__le32 waiting_time_at_fresh_sleep;
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+	__le32 max_threshold_to_avoid_sleep;
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+	u8 beacon_resedue_alg_en;
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+} __packed;
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+
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 #endif