forked from ~ljy/RK356X_SDK_RELEASE
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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/hw.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2012  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2012  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../efuse.h"
....@@ -104,13 +82,13 @@
10482 		*((enum rf_pwrstate *)(val)) = ppsc->rfpwr_state;
10583 		break;
10684 	case HW_VAR_FWLPS_RF_ON:{
107
-			enum rf_pwrstate rfState;
85
+			enum rf_pwrstate rfstate;
10886 			u32 val_rcr;
10987 
11088 			rtlpriv->cfg->ops->get_hw_reg(hw,
11189 						      HW_VAR_RF_STATE,
112
-						      (u8 *) (&rfState));
113
-			if (rfState == ERFOFF) {
90
+						      (u8 *)(&rfstate));
91
+			if (rfstate == ERFOFF) {
11492 				*((bool *) (val)) = true;
11593 			} else {
11694 				val_rcr = rtl_read_dword(rtlpriv, REG_RCR);
....@@ -166,6 +144,7 @@
166144 	case HW_VAR_BASIC_RATE:{
167145 			u16 rate_cfg = ((u16 *) val)[0];
168146 			u8 rate_index = 0;
147
+
169148 			rate_cfg &= 0x15f;
170149 			rate_cfg |= 0x01;
171150 			rtl_write_byte(rtlpriv, REG_RRSR, rate_cfg & 0xff);
....@@ -204,8 +183,8 @@
204183 	case HW_VAR_SLOT_TIME:{
205184 			u8 e_aci;
206185 
207
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
208
-				 "HW_VAR_SLOT_TIME %x\n", val[0]);
186
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
187
+				"HW_VAR_SLOT_TIME %x\n", val[0]);
209188 
210189 			rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
211190 
....@@ -219,6 +198,7 @@
219198 	case HW_VAR_ACK_PREAMBLE:{
220199 			u8 reg_tmp;
221200 			u8 short_preamble = (bool)*val;
201
+
222202 			reg_tmp = (mac->cur_40_prime_sc) << 5;
223203 			if (short_preamble)
224204 				reg_tmp |= 0x80;
....@@ -243,9 +223,9 @@
243223 
244224 				*val = min_spacing_to_set;
245225 
246
-				RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
247
-					 "Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
248
-					 mac->min_space_cfg);
226
+				rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
227
+					"Set HW_VAR_AMPDU_MIN_SPACE: %#x\n",
228
+					mac->min_space_cfg);
249229 
250230 				rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
251231 					       mac->min_space_cfg);
....@@ -258,9 +238,9 @@
258238 			density_to_set = *val;
259239 			mac->min_space_cfg |= (density_to_set << 3);
260240 
261
-			RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
262
-				 "Set HW_VAR_SHORTGI_DENSITY: %#x\n",
263
-				 mac->min_space_cfg);
241
+			rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
242
+				"Set HW_VAR_SHORTGI_DENSITY: %#x\n",
243
+				mac->min_space_cfg);
264244 
265245 			rtl_write_byte(rtlpriv, REG_AMPDU_MIN_SPACE,
266246 				       mac->min_space_cfg);
....@@ -307,14 +287,15 @@
307287 
308288 				}
309289 
310
-				RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
311
-					 "Set HW_VAR_AMPDU_FACTOR: %#x\n",
312
-					 factor_toset);
290
+				rtl_dbg(rtlpriv, COMP_MLME, DBG_LOUD,
291
+					"Set HW_VAR_AMPDU_FACTOR: %#x\n",
292
+					factor_toset);
313293 			}
314294 			break;
315295 		}
316296 	case HW_VAR_AC_PARAM:{
317297 			u8 e_aci = *(val);
298
+
318299 			rtl92c_dm_init_edca_turbo(hw);
319300 
320301 			if (rtlpci->acm_method != EACMWAY2_SW)
....@@ -336,30 +317,30 @@
336317 			if (acm) {
337318 				switch (e_aci) {
338319 				case AC0_BE:
339
-					acm_ctrl |= AcmHw_BeqEn;
320
+					acm_ctrl |= ACMHW_BEQEN;
340321 					break;
341322 				case AC2_VI:
342
-					acm_ctrl |= AcmHw_ViqEn;
323
+					acm_ctrl |= ACMHW_VIQEN;
343324 					break;
344325 				case AC3_VO:
345
-					acm_ctrl |= AcmHw_VoqEn;
326
+					acm_ctrl |= ACMHW_VOQEN;
346327 					break;
347328 				default:
348
-					RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
349
-						 "HW_VAR_ACM_CTRL acm set failed: eACI is %d\n",
350
-						 acm);
329
+					rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
330
+						"HW_VAR_ACM_CTRL acm set failed: eACI is %d\n",
331
+						acm);
351332 					break;
352333 				}
353334 			} else {
354335 				switch (e_aci) {
355336 				case AC0_BE:
356
-					acm_ctrl &= (~AcmHw_BeqEn);
337
+					acm_ctrl &= (~ACMHW_BEQEN);
357338 					break;
358339 				case AC2_VI:
359
-					acm_ctrl &= (~AcmHw_ViqEn);
340
+					acm_ctrl &= (~ACMHW_VIQEN);
360341 					break;
361342 				case AC3_VO:
362
-					acm_ctrl &= (~AcmHw_VoqEn);
343
+					acm_ctrl &= (~ACMHW_VOQEN);
363344 					break;
364345 				default:
365346 					pr_err("switch case %#x not processed\n",
....@@ -368,9 +349,9 @@
368349 				}
369350 			}
370351 
371
-			RT_TRACE(rtlpriv, COMP_QOS, DBG_TRACE,
372
-				 "SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
373
-				 acm_ctrl);
352
+			rtl_dbg(rtlpriv, COMP_QOS, DBG_TRACE,
353
+				"SetHwReg8190pci(): [HW_VAR_ACM_CTRL] Write 0x%X\n",
354
+				acm_ctrl);
374355 			rtl_write_byte(rtlpriv, REG_ACMHWCTRL, acm_ctrl);
375356 			break;
376357 		}
....@@ -478,6 +459,7 @@
478459 		break;
479460 	case HW_VAR_AID:{
480461 			u16 u2btmp;
462
+
481463 			u2btmp = rtl_read_word(rtlpriv, REG_BCN_PSR_RPT);
482464 			u2btmp &= 0xC000;
483465 			rtl_write_word(rtlpriv, REG_BCN_PSR_RPT, (u2btmp |
....@@ -584,23 +566,23 @@
584566 	struct rtl_priv *rtlpriv = rtl_priv(hw);
585567 	unsigned short i;
586568 	u8 txpktbuf_bndy;
587
-	u8 maxPage;
569
+	u8 maxpage;
588570 	bool status;
589571 
590572 #if LLT_CONFIG == 1
591
-	maxPage = 255;
573
+	maxpage = 255;
592574 	txpktbuf_bndy = 252;
593575 #elif LLT_CONFIG == 2
594
-	maxPage = 127;
576
+	maxpage = 127;
595577 	txpktbuf_bndy = 124;
596578 #elif LLT_CONFIG == 3
597
-	maxPage = 255;
579
+	maxpage = 255;
598580 	txpktbuf_bndy = 174;
599581 #elif LLT_CONFIG == 4
600
-	maxPage = 255;
582
+	maxpage = 255;
601583 	txpktbuf_bndy = 246;
602584 #elif LLT_CONFIG == 5
603
-	maxPage = 255;
585
+	maxpage = 255;
604586 	txpktbuf_bndy = 246;
605587 #endif
606588 
....@@ -631,22 +613,22 @@
631613 
632614 	for (i = 0; i < (txpktbuf_bndy - 1); i++) {
633615 		status = _rtl92ce_llt_write(hw, i, i + 1);
634
-		if (true != status)
616
+		if (!status)
635617 			return status;
636618 	}
637619 
638620 	status = _rtl92ce_llt_write(hw, (txpktbuf_bndy - 1), 0xFF);
639
-	if (true != status)
621
+	if (!status)
640622 		return status;
641623 
642
-	for (i = txpktbuf_bndy; i < maxPage; i++) {
624
+	for (i = txpktbuf_bndy; i < maxpage; i++) {
643625 		status = _rtl92ce_llt_write(hw, i, (i + 1));
644
-		if (true != status)
626
+		if (!status)
645627 			return status;
646628 	}
647629 
648
-	status = _rtl92ce_llt_write(hw, maxPage, txpktbuf_bndy);
649
-	if (true != status)
630
+	status = _rtl92ce_llt_write(hw, maxpage, txpktbuf_bndy);
631
+	if (!status)
650632 		return status;
651633 
652634 	return true;
....@@ -683,6 +665,7 @@
683665 	rtl_write_byte(rtlpriv, REG_RSV_CTRL, 0x00);
684666 	if (rtlpriv->btcoexist.bt_coexistence) {
685667 		u32 value32;
668
+
686669 		value32 = rtl_read_dword(rtlpriv, REG_APS_FSMCO);
687670 		value32 |= (SOP_ABG | SOP_AMB | XOP_BTCK);
688671 		rtl_write_dword(rtlpriv, REG_APS_FSMCO, value32);
....@@ -707,15 +690,15 @@
707690 	udelay(2);
708691 
709692 	retry = 0;
710
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n",
711
-		 rtl_read_dword(rtlpriv, 0xEC), bytetmp);
693
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n",
694
+		rtl_read_dword(rtlpriv, 0xEC), bytetmp);
712695 
713696 	while ((bytetmp & BIT(0)) && retry < 1000) {
714697 		retry++;
715698 		udelay(50);
716699 		bytetmp = rtl_read_byte(rtlpriv, REG_APS_FSMCO + 1);
717
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n",
718
-			 rtl_read_dword(rtlpriv, 0xEC), bytetmp);
700
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "reg0xec:%x:%x\n",
701
+			rtl_read_dword(rtlpriv, 0xEC), bytetmp);
719702 		udelay(50);
720703 	}
721704 
....@@ -897,30 +880,30 @@
897880 	struct rtl_priv *rtlpriv = rtl_priv(hw);
898881 	u8 sec_reg_value;
899882 
900
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
901
-		 "PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
902
-		 rtlpriv->sec.pairwise_enc_algorithm,
903
-		 rtlpriv->sec.group_enc_algorithm);
883
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
884
+		"PairwiseEncAlgorithm = %d GroupEncAlgorithm = %d\n",
885
+		rtlpriv->sec.pairwise_enc_algorithm,
886
+		rtlpriv->sec.group_enc_algorithm);
904887 
905888 	if (rtlpriv->cfg->mod_params->sw_crypto || rtlpriv->sec.use_sw_sec) {
906
-		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
907
-			 "not open hw encryption\n");
889
+		rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
890
+			"not open hw encryption\n");
908891 		return;
909892 	}
910893 
911
-	sec_reg_value = SCR_TxEncEnable | SCR_RxDecEnable;
894
+	sec_reg_value = SCR_TXENCENABLE | SCR_RXDECENABLE;
912895 
913896 	if (rtlpriv->sec.use_defaultkey) {
914
-		sec_reg_value |= SCR_TxUseDK;
915
-		sec_reg_value |= SCR_RxUseDK;
897
+		sec_reg_value |= SCR_TXUSEDK;
898
+		sec_reg_value |= SCR_RXUSEDK;
916899 	}
917900 
918901 	sec_reg_value |= (SCR_RXBCUSEDK | SCR_TXBCUSEDK);
919902 
920903 	rtl_write_byte(rtlpriv, REG_CR + 1, 0x02);
921904 
922
-	RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
923
-		 "The SECR-value %x\n", sec_reg_value);
905
+	rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD,
906
+		"The SECR-value %x\n", sec_reg_value);
924907 
925908 	rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_WPA_CONFIG, &sec_reg_value);
926909 
....@@ -963,8 +946,8 @@
963946 
964947 	err = rtl92c_download_fw(hw);
965948 	if (err) {
966
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
967
-			 "Failed to download FW. Init HW without FW now..\n");
949
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
950
+			"Failed to download FW. Init HW without FW now..\n");
968951 		err = 1;
969952 		goto exit;
970953 	}
....@@ -1030,12 +1013,12 @@
10301013 	tmp_u1b = efuse_read_1byte(hw, 0x1FA);
10311014 	if (!(tmp_u1b & BIT(0))) {
10321015 		rtl_set_rfreg(hw, RF90_PATH_A, 0x15, 0x0F, 0x05);
1033
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path A\n");
1016
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path A\n");
10341017 	}
10351018 
10361019 	if (!(tmp_u1b & BIT(1)) && is92c) {
10371020 		rtl_set_rfreg(hw, RF90_PATH_B, 0x15, 0x0F, 0x05);
1038
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path B\n");
1021
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "PA BIAS path B\n");
10391022 	}
10401023 
10411024 	if (!(tmp_u1b & BIT(4))) {
....@@ -1044,7 +1027,7 @@
10441027 		rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x80);
10451028 		udelay(10);
10461029 		rtl_write_byte(rtlpriv, 0x16, tmp_u1b | 0x90);
1047
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n");
1030
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n");
10481031 	}
10491032 	rtl92c_dm_init(hw);
10501033 exit:
....@@ -1139,8 +1122,8 @@
11391122 		break;
11401123 	}
11411124 
1142
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Chip RF Type: %s\n",
1143
-		 rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
1125
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Chip RF Type: %s\n",
1126
+		rtlphy->rf_type == RF_2T2R ? "RF_2T2R" : "RF_1T1R");
11441127 
11451128 	return version;
11461129 }
....@@ -1158,30 +1141,30 @@
11581141 	switch (type) {
11591142 	case NL80211_IFTYPE_UNSPECIFIED:
11601143 		mode = MSR_NOLINK;
1161
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1162
-			 "Set Network type to NO LINK!\n");
1144
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1145
+			"Set Network type to NO LINK!\n");
11631146 		break;
11641147 	case NL80211_IFTYPE_ADHOC:
11651148 		mode = MSR_ADHOC;
1166
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1167
-			 "Set Network type to Ad Hoc!\n");
1149
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1150
+			"Set Network type to Ad Hoc!\n");
11681151 		break;
11691152 	case NL80211_IFTYPE_STATION:
11701153 		mode = MSR_INFRA;
11711154 		ledaction = LED_CTL_LINK;
1172
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1173
-			 "Set Network type to STA!\n");
1155
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1156
+			"Set Network type to STA!\n");
11741157 		break;
11751158 	case NL80211_IFTYPE_AP:
11761159 		mode = MSR_AP;
11771160 		ledaction = LED_CTL_LINK;
1178
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1179
-			 "Set Network type to AP!\n");
1161
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1162
+			"Set Network type to AP!\n");
11801163 		break;
11811164 	case NL80211_IFTYPE_MESH_POINT:
11821165 		mode = MSR_ADHOC;
1183
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
1184
-			 "Set Network type to Mesh Point!\n");
1166
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
1167
+			"Set Network type to Mesh Point!\n");
11851168 		break;
11861169 	default:
11871170 		pr_err("Network type %d not supported!\n", type);
....@@ -1207,9 +1190,9 @@
12071190 		_rtl92ce_resume_tx_beacon(hw);
12081191 		_rtl92ce_disable_bcn_sub_func(hw);
12091192 	} else {
1210
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1211
-			 "Set HW_VAR_MEDIA_STATUS: No such media status(%x).\n",
1212
-			 mode);
1193
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1194
+			"Set HW_VAR_MEDIA_STATUS: No such media status(%x).\n",
1195
+			mode);
12131196 	}
12141197 	rtl_write_byte(rtlpriv, MSR, bt_msr | mode);
12151198 
....@@ -1267,6 +1250,7 @@
12671250 void rtl92ce_set_qos(struct ieee80211_hw *hw, int aci)
12681251 {
12691252 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1253
+
12701254 	rtl92c_dm_init_edca_turbo(hw);
12711255 	switch (aci) {
12721256 	case AC1_BK:
....@@ -1409,8 +1393,8 @@
14091393 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
14101394 	u16 bcn_interval = mac->beacon_interval;
14111395 
1412
-	RT_TRACE(rtlpriv, COMP_BEACON, DBG_DMESG,
1413
-		 "beacon_interval:%d\n", bcn_interval);
1396
+	rtl_dbg(rtlpriv, COMP_BEACON, DBG_DMESG,
1397
+		"beacon_interval:%d\n", bcn_interval);
14141398 	rtl92ce_disable_interrupt(hw);
14151399 	rtl_write_word(rtlpriv, REG_BCN_INTERVAL, bcn_interval);
14161400 	rtl92ce_enable_interrupt(hw);
....@@ -1422,8 +1406,8 @@
14221406 	struct rtl_priv *rtlpriv = rtl_priv(hw);
14231407 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
14241408 
1425
-	RT_TRACE(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n",
1426
-		 add_msr, rm_msr);
1409
+	rtl_dbg(rtlpriv, COMP_INTR, DBG_LOUD, "add_msr:%x, rm_msr:%x\n",
1410
+		add_msr, rm_msr);
14271411 
14281412 	if (add_msr)
14291413 		rtlpci->irq_mask[0] |= add_msr;
....@@ -1730,8 +1714,8 @@
17301714 	default:
17311715 		break;
17321716 	}
1733
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1734
-		 "RT Customized ID: 0x%02X\n", rtlhal->oem_id);
1717
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG,
1718
+		"RT Customized ID: 0x%02X\n", rtlhal->oem_id);
17351719 }
17361720 
17371721 void rtl92ce_read_eeprom_info(struct ieee80211_hw *hw)
....@@ -1748,18 +1732,18 @@
17481732 	else
17491733 		rtlpriv->dm.rfpath_rxenable[0] =
17501734 		    rtlpriv->dm.rfpath_rxenable[1] = true;
1751
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
1752
-		 rtlhal->version);
1735
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "VersionID = 0x%4x\n",
1736
+		rtlhal->version);
17531737 	tmp_u1b = rtl_read_byte(rtlpriv, REG_9346CR);
17541738 	if (tmp_u1b & BIT(4)) {
1755
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n");
1739
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EEPROM\n");
17561740 		rtlefuse->epromtype = EEPROM_93C46;
17571741 	} else {
1758
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n");
1742
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_DMESG, "Boot from EFUSE\n");
17591743 		rtlefuse->epromtype = EEPROM_BOOT_EFUSE;
17601744 	}
17611745 	if (tmp_u1b & BIT(5)) {
1762
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
1746
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Autoload OK\n");
17631747 		rtlefuse->autoload_failflag = false;
17641748 		_rtl92ce_read_adapter_info(hw);
17651749 	} else {
....@@ -1855,8 +1839,8 @@
18551839 
18561840 	rtl_write_dword(rtlpriv, REG_ARFR0 + ratr_index * 4, ratr_value);
18571841 
1858
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",
1859
-		 rtl_read_dword(rtlpriv, REG_ARFR0));
1842
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG, "%x\n",
1843
+		rtl_read_dword(rtlpriv, REG_ARFR0));
18601844 }
18611845 
18621846 static void rtl92ce_update_hal_rate_mask(struct ieee80211_hw *hw,
....@@ -1978,14 +1962,14 @@
19781962 	}
19791963 	sta_entry->ratr_index = ratr_index;
19801964 
1981
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
1982
-		 "ratr_bitmap :%x\n", ratr_bitmap);
1965
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG,
1966
+		"ratr_bitmap :%x\n", ratr_bitmap);
19831967 	*(u32 *)&rate_mask = (ratr_bitmap & 0x0fffffff) |
19841968 				     (ratr_index << 28);
19851969 	rate_mask[4] = macid | (shortgi ? 0x20 : 0x00) | 0x80;
1986
-	RT_TRACE(rtlpriv, COMP_RATR, DBG_DMESG,
1987
-		 "Rate_index:%x, ratr_val:%x, %5phC\n",
1988
-		 ratr_index, ratr_bitmap, rate_mask);
1970
+	rtl_dbg(rtlpriv, COMP_RATR, DBG_DMESG,
1971
+		"Rate_index:%x, ratr_val:%x, %5phC\n",
1972
+		ratr_index, ratr_bitmap, rate_mask);
19891973 	rtl92c_fill_h2c_cmd(hw, H2C_RA_MASK, 5, rate_mask);
19901974 }
19911975 
....@@ -2047,15 +2031,15 @@
20472031 	e_rfpowerstate_toset = (u1tmp & BIT(3)) ? ERFON : ERFOFF;
20482032 
20492033 	if ((ppsc->hwradiooff) && (e_rfpowerstate_toset == ERFON)) {
2050
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2051
-			 "GPIOChangeRF  - HW Radio ON, RF ON\n");
2034
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2035
+			"GPIOChangeRF  - HW Radio ON, RF ON\n");
20522036 
20532037 		e_rfpowerstate_toset = ERFON;
20542038 		ppsc->hwradiooff = false;
20552039 		actuallyset = true;
20562040 	} else if (!ppsc->hwradiooff && (e_rfpowerstate_toset == ERFOFF)) {
2057
-		RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2058
-			 "GPIOChangeRF  - HW Radio OFF, RF OFF\n");
2041
+		rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2042
+			"GPIOChangeRF  - HW Radio OFF, RF OFF\n");
20592043 
20602044 		e_rfpowerstate_toset = ERFOFF;
20612045 		ppsc->hwradiooff = true;
....@@ -2106,7 +2090,7 @@
21062090 		u8 cam_offset = 0;
21072091 		u8 clear_number = 5;
21082092 
2109
-		RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
2093
+		rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG, "clear_all\n");
21102094 
21112095 		for (idx = 0; idx < clear_number; idx++) {
21122096 			rtl_cam_mark_invalid(hw, cam_offset + idx);
....@@ -2166,24 +2150,24 @@
21662150 		}
21672151 
21682152 		if (rtlpriv->sec.key_len[key_index] == 0) {
2169
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2170
-				 "delete one entry, entry_id is %d\n",
2153
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2154
+				"delete one entry, entry_id is %d\n",
21712155 				 entry_id);
21722156 			if (mac->opmode == NL80211_IFTYPE_AP ||
21732157 			    mac->opmode == NL80211_IFTYPE_MESH_POINT)
21742158 				rtl_cam_del_entry(hw, p_macaddr);
21752159 			rtl_cam_delete_one_entry(hw, p_macaddr, entry_id);
21762160 		} else {
2177
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
2178
-				 "The insert KEY length is %d\n",
2179
-				 rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
2180
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_LOUD,
2181
-				 "The insert KEY is %x %x\n",
2182
-				 rtlpriv->sec.key_buf[0][0],
2183
-				 rtlpriv->sec.key_buf[0][1]);
2161
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD,
2162
+				"The insert KEY length is %d\n",
2163
+				rtlpriv->sec.key_len[PAIRWISE_KEYIDX]);
2164
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_LOUD,
2165
+				"The insert KEY is %x %x\n",
2166
+				rtlpriv->sec.key_buf[0][0],
2167
+				rtlpriv->sec.key_buf[0][1]);
21842168 
2185
-			RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2186
-				 "add one entry\n");
2169
+			rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2170
+				"add one entry\n");
21872171 			if (is_pairwise) {
21882172 				RT_PRINT_DATA(rtlpriv, COMP_SEC, DBG_LOUD,
21892173 					      "Pairwise Key content",
....@@ -2191,8 +2175,8 @@
21912175 					      rtlpriv->sec.
21922176 					      key_len[PAIRWISE_KEYIDX]);
21932177 
2194
-				RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2195
-					 "set Pairwise key\n");
2178
+				rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2179
+					"set Pairwise key\n");
21962180 
21972181 				rtl_cam_add_one_entry(hw, macaddr, key_index,
21982182 						      entry_id, enc_algo,
....@@ -2200,8 +2184,8 @@
22002184 						      rtlpriv->sec.
22012185 						      key_buf[key_index]);
22022186 			} else {
2203
-				RT_TRACE(rtlpriv, COMP_SEC, DBG_DMESG,
2204
-					 "set group key\n");
2187
+				rtl_dbg(rtlpriv, COMP_SEC, DBG_DMESG,
2188
+					"set group key\n");
22052189 
22062190 				if (mac->opmode == NL80211_IFTYPE_ADHOC) {
22072191 					rtl_cam_add_one_entry(hw,
....@@ -2301,7 +2285,6 @@
23012285 	rtlpriv->btcoexist.reg_bt_sco = 0;
23022286 }
23032287 
2304
-
23052288 void rtl8192ce_bt_hw_init(struct ieee80211_hw *hw)
23062289 {
23072290 	struct rtl_priv *rtlpriv = rtl_priv(hw);
....@@ -2316,13 +2299,12 @@
23162299 		if (rtlpriv->btcoexist.bt_ant_isolation)
23172300 			rtl_write_byte(rtlpriv, REG_GPIO_MUXCFG, 0xa0);
23182301 
2319
-		u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) &
2320
-			 BIT_OFFSET_LEN_MASK_32(0, 1);
2302
+		u1_tmp = rtl_read_byte(rtlpriv, 0x4fd) & BIT(0);
23212303 		u1_tmp = u1_tmp |
23222304 			 ((rtlpriv->btcoexist.bt_ant_isolation == 1) ?
2323
-			 0 : BIT_OFFSET_LEN_MASK_32(1, 1)) |
2305
+			 0 : BIT(1)) |
23242306 			 ((rtlpriv->btcoexist.bt_service == BT_SCO) ?
2325
-			 0 : BIT_OFFSET_LEN_MASK_32(2, 1));
2307
+			 0 : BIT(2));
23262308 		rtl_write_byte(rtlpriv, 0x4fd, u1_tmp);
23272309 
23282310 		rtl_write_dword(rtlpriv, REG_BT_COEX_TABLE+4, 0xaaaa9aaa);
....@@ -2332,11 +2314,11 @@
23322314 		/* Config to 1T1R. */
23332315 		if (rtlphy->rf_type == RF_1T1R) {
23342316 			u1_tmp = rtl_read_byte(rtlpriv, ROFDM0_TRXPATHENABLE);
2335
-			u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1));
2317
+			u1_tmp &= ~(BIT(1));
23362318 			rtl_write_byte(rtlpriv, ROFDM0_TRXPATHENABLE, u1_tmp);
23372319 
23382320 			u1_tmp = rtl_read_byte(rtlpriv, ROFDM1_TRXPATHENABLE);
2339
-			u1_tmp &= ~(BIT_OFFSET_LEN_MASK_32(1, 1));
2321
+			u1_tmp &= ~(BIT(1));
23402322 			rtl_write_byte(rtlpriv, ROFDM1_TRXPATHENABLE, u1_tmp);
23412323 		}
23422324 	}