.. | .. |
---|
1 | 1 | /* |
---|
2 | | - * Marvell Wireless LAN device driver: 802.11n |
---|
| 2 | + * NXP Wireless LAN device driver: 802.11n |
---|
3 | 3 | * |
---|
4 | | - * Copyright (C) 2011-2014, Marvell International Ltd. |
---|
| 4 | + * Copyright 2011-2020 NXP |
---|
5 | 5 | * |
---|
6 | | - * This software file (the "File") is distributed by Marvell International |
---|
7 | | - * Ltd. under the terms of the GNU General Public License Version 2, June 1991 |
---|
| 6 | + * This software file (the "File") is distributed by NXP |
---|
| 7 | + * under the terms of the GNU General Public License Version 2, June 1991 |
---|
8 | 8 | * (the "License"). You may use, redistribute and/or modify this File in |
---|
9 | 9 | * accordance with the terms and conditions of the License, a copy of which |
---|
10 | 10 | * is available by writing to the Free Software Foundation, Inc., |
---|
.. | .. |
---|
84 | 84 | enum mwifiex_ba_status ba_status) |
---|
85 | 85 | { |
---|
86 | 86 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; |
---|
87 | | - unsigned long flags; |
---|
88 | 87 | |
---|
89 | | - spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 88 | + spin_lock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
90 | 89 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { |
---|
91 | 90 | if (tx_ba_tsr_tbl->ba_status == ba_status) { |
---|
92 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, |
---|
93 | | - flags); |
---|
| 91 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
94 | 92 | return tx_ba_tsr_tbl; |
---|
95 | 93 | } |
---|
96 | 94 | } |
---|
97 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 95 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
98 | 96 | return NULL; |
---|
99 | 97 | } |
---|
100 | 98 | |
---|
.. | .. |
---|
516 | 514 | { |
---|
517 | 515 | int i; |
---|
518 | 516 | struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node; |
---|
519 | | - unsigned long flags; |
---|
520 | 517 | |
---|
521 | | - spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 518 | + spin_lock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
522 | 519 | list_for_each_entry_safe(del_tbl_ptr, tmp_node, |
---|
523 | 520 | &priv->tx_ba_stream_tbl_ptr, list) |
---|
524 | 521 | mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr); |
---|
525 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 522 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
526 | 523 | |
---|
527 | 524 | INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr); |
---|
528 | 525 | |
---|
.. | .. |
---|
539 | 536 | mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra) |
---|
540 | 537 | { |
---|
541 | 538 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; |
---|
542 | | - unsigned long flags; |
---|
543 | 539 | |
---|
544 | | - spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 540 | + spin_lock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
545 | 541 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { |
---|
546 | 542 | if (ether_addr_equal_unaligned(tx_ba_tsr_tbl->ra, ra) && |
---|
547 | 543 | tx_ba_tsr_tbl->tid == tid) { |
---|
548 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, |
---|
549 | | - flags); |
---|
| 544 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
550 | 545 | return tx_ba_tsr_tbl; |
---|
551 | 546 | } |
---|
552 | 547 | } |
---|
553 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 548 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
554 | 549 | return NULL; |
---|
555 | 550 | } |
---|
556 | 551 | |
---|
.. | .. |
---|
563 | 558 | { |
---|
564 | 559 | struct mwifiex_tx_ba_stream_tbl *new_node; |
---|
565 | 560 | struct mwifiex_ra_list_tbl *ra_list; |
---|
566 | | - unsigned long flags; |
---|
567 | 561 | int tid_down; |
---|
568 | 562 | |
---|
569 | 563 | if (!mwifiex_get_ba_tbl(priv, tid, ra)) { |
---|
.. | .. |
---|
584 | 578 | new_node->ba_status = ba_status; |
---|
585 | 579 | memcpy(new_node->ra, ra, ETH_ALEN); |
---|
586 | 580 | |
---|
587 | | - spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 581 | + spin_lock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
588 | 582 | list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr); |
---|
589 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 583 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
590 | 584 | } |
---|
591 | 585 | } |
---|
592 | 586 | |
---|
.. | .. |
---|
599 | 593 | u32 tx_win_size = priv->add_ba_param.tx_win_size; |
---|
600 | 594 | static u8 dialog_tok; |
---|
601 | 595 | int ret; |
---|
602 | | - unsigned long flags; |
---|
603 | 596 | u16 block_ack_param_set; |
---|
604 | 597 | |
---|
605 | 598 | mwifiex_dbg(priv->adapter, CMD, "cmd: %s: tid %d\n", __func__, tid); |
---|
.. | .. |
---|
612 | 605 | memcmp(priv->cfg_bssid, peer_mac, ETH_ALEN)) { |
---|
613 | 606 | struct mwifiex_sta_node *sta_ptr; |
---|
614 | 607 | |
---|
615 | | - spin_lock_irqsave(&priv->sta_list_spinlock, flags); |
---|
| 608 | + spin_lock_bh(&priv->sta_list_spinlock); |
---|
616 | 609 | sta_ptr = mwifiex_get_sta_entry(priv, peer_mac); |
---|
617 | 610 | if (!sta_ptr) { |
---|
618 | | - spin_unlock_irqrestore(&priv->sta_list_spinlock, flags); |
---|
| 611 | + spin_unlock_bh(&priv->sta_list_spinlock); |
---|
619 | 612 | mwifiex_dbg(priv->adapter, ERROR, |
---|
620 | 613 | "BA setup with unknown TDLS peer %pM!\n", |
---|
621 | 614 | peer_mac); |
---|
.. | .. |
---|
623 | 616 | } |
---|
624 | 617 | if (sta_ptr->is_11ac_enabled) |
---|
625 | 618 | tx_win_size = MWIFIEX_11AC_STA_AMPDU_DEF_TXWINSIZE; |
---|
626 | | - spin_unlock_irqrestore(&priv->sta_list_spinlock, flags); |
---|
| 619 | + spin_unlock_bh(&priv->sta_list_spinlock); |
---|
627 | 620 | } |
---|
628 | 621 | |
---|
629 | 622 | block_ack_param_set = (u16)((tid << BLOCKACKPARAM_TID_POS) | |
---|
.. | .. |
---|
688 | 681 | void mwifiex_11n_delba(struct mwifiex_private *priv, int tid) |
---|
689 | 682 | { |
---|
690 | 683 | struct mwifiex_rx_reorder_tbl *rx_reor_tbl_ptr; |
---|
691 | | - unsigned long flags; |
---|
692 | 684 | |
---|
693 | | - spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags); |
---|
| 685 | + spin_lock_bh(&priv->rx_reorder_tbl_lock); |
---|
694 | 686 | list_for_each_entry(rx_reor_tbl_ptr, &priv->rx_reorder_tbl_ptr, list) { |
---|
695 | 687 | if (rx_reor_tbl_ptr->tid == tid) { |
---|
696 | 688 | dev_dbg(priv->adapter->dev, |
---|
.. | .. |
---|
701 | 693 | } |
---|
702 | 694 | } |
---|
703 | 695 | exit: |
---|
704 | | - spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags); |
---|
| 696 | + spin_unlock_bh(&priv->rx_reorder_tbl_lock); |
---|
705 | 697 | } |
---|
706 | 698 | |
---|
707 | 699 | /* |
---|
.. | .. |
---|
730 | 722 | struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf; |
---|
731 | 723 | struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr; |
---|
732 | 724 | int count = 0; |
---|
733 | | - unsigned long flags; |
---|
734 | 725 | |
---|
735 | | - spin_lock_irqsave(&priv->rx_reorder_tbl_lock, flags); |
---|
| 726 | + spin_lock_bh(&priv->rx_reorder_tbl_lock); |
---|
736 | 727 | list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr, |
---|
737 | 728 | list) { |
---|
738 | 729 | rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid; |
---|
.. | .. |
---|
751 | 742 | if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED) |
---|
752 | 743 | break; |
---|
753 | 744 | } |
---|
754 | | - spin_unlock_irqrestore(&priv->rx_reorder_tbl_lock, flags); |
---|
| 745 | + spin_unlock_bh(&priv->rx_reorder_tbl_lock); |
---|
755 | 746 | |
---|
756 | 747 | return count; |
---|
757 | 748 | } |
---|
.. | .. |
---|
765 | 756 | struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl; |
---|
766 | 757 | struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf; |
---|
767 | 758 | int count = 0; |
---|
768 | | - unsigned long flags; |
---|
769 | 759 | |
---|
770 | | - spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 760 | + spin_lock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
771 | 761 | list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) { |
---|
772 | 762 | rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid; |
---|
773 | 763 | mwifiex_dbg(priv->adapter, DATA, "data: %s tid=%d\n", |
---|
.. | .. |
---|
779 | 769 | if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED) |
---|
780 | 770 | break; |
---|
781 | 771 | } |
---|
782 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 772 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
783 | 773 | |
---|
784 | 774 | return count; |
---|
785 | 775 | } |
---|
.. | .. |
---|
791 | 781 | void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra) |
---|
792 | 782 | { |
---|
793 | 783 | struct mwifiex_tx_ba_stream_tbl *tbl, *tmp; |
---|
794 | | - unsigned long flags; |
---|
795 | 784 | |
---|
796 | 785 | if (!ra) |
---|
797 | 786 | return; |
---|
798 | 787 | |
---|
799 | | - spin_lock_irqsave(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 788 | + spin_lock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
800 | 789 | list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list) |
---|
801 | 790 | if (!memcmp(tbl->ra, ra, ETH_ALEN)) |
---|
802 | 791 | mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl); |
---|
803 | | - spin_unlock_irqrestore(&priv->tx_ba_stream_tbl_lock, flags); |
---|
| 792 | + spin_unlock_bh(&priv->tx_ba_stream_tbl_lock); |
---|
804 | 793 | |
---|
805 | 794 | return; |
---|
806 | 795 | } |
---|
.. | .. |
---|
901 | 890 | */ |
---|
902 | 891 | void mwifiex_update_ampdu_txwinsize(struct mwifiex_adapter *adapter) |
---|
903 | 892 | { |
---|
904 | | - u8 i; |
---|
| 893 | + u8 i, j; |
---|
905 | 894 | u32 tx_win_size; |
---|
906 | 895 | struct mwifiex_private *priv; |
---|
907 | 896 | |
---|
.. | .. |
---|
932 | 921 | if (tx_win_size != priv->add_ba_param.tx_win_size) { |
---|
933 | 922 | if (!priv->media_connected) |
---|
934 | 923 | continue; |
---|
935 | | - for (i = 0; i < MAX_NUM_TID; i++) |
---|
936 | | - mwifiex_send_delba_txbastream_tbl(priv, i); |
---|
| 924 | + for (j = 0; j < MAX_NUM_TID; j++) |
---|
| 925 | + mwifiex_send_delba_txbastream_tbl(priv, j); |
---|
937 | 926 | } |
---|
938 | 927 | } |
---|
939 | 928 | } |
---|