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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/drivers/mmc/host/sdhci-acpi.c
....@@ -1,21 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Secure Digital Host Controller Interface ACPI driver.
34  *
45  * Copyright (c) 2012, Intel Corporation.
5
- *
6
- * This program is free software; you can redistribute it and/or modify it
7
- * under the terms and conditions of the GNU General Public License,
8
- * version 2, as published by the Free Software Foundation.
9
- *
10
- * This program is distributed in the hope it will be useful, but WITHOUT
11
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13
- * more details.
14
- *
15
- * You should have received a copy of the GNU General Public License along with
16
- * this program; if not, write to the Free Software Foundation, Inc.,
17
- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
- *
196  */
207 
218 #include <linux/init.h>
....@@ -36,6 +23,7 @@
3623 #include <linux/pm.h>
3724 #include <linux/pm_runtime.h>
3825 #include <linux/delay.h>
26
+#include <linux/dmi.h>
3927 
4028 #include <linux/mmc/host.h>
4129 #include <linux/mmc/pm.h>
....@@ -74,7 +62,7 @@
7462 	mmc_pm_flag_t	pm_caps;
7563 	unsigned int	flags;
7664 	size_t		priv_size;
77
-	int (*probe_slot)(struct platform_device *, const char *, const char *);
65
+	int (*probe_slot)(struct platform_device *, struct acpi_device *);
7866 	int (*remove_slot)(struct platform_device *);
7967 	int (*free_slot)(struct platform_device *pdev);
8068 	int (*setup_host)(struct platform_device *pdev);
....@@ -85,7 +73,14 @@
8573 	const struct sdhci_acpi_slot	*slot;
8674 	struct platform_device		*pdev;
8775 	bool				use_runtime_pm;
88
-	unsigned long			private[0] ____cacheline_aligned;
76
+	bool				is_intel;
77
+	bool				reset_signal_volt_on_suspend;
78
+	unsigned long			private[] ____cacheline_aligned;
79
+};
80
+
81
+enum {
82
+	DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP			= BIT(0),
83
+	DMI_QUIRK_SD_NO_WRITE_PROTECT				= BIT(1),
8984 };
9085 
9186 static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
....@@ -247,7 +242,7 @@
247242 static bool sdhci_acpi_byt(void)
248243 {
249244 	static const struct x86_cpu_id byt[] = {
250
-		{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT },
245
+		X86_MATCH_INTEL_FAM6_MODEL(ATOM_SILVERMONT, NULL),
251246 		{}
252247 	};
253248 
....@@ -257,7 +252,7 @@
257252 static bool sdhci_acpi_cht(void)
258253 {
259254 	static const struct x86_cpu_id cht[] = {
260
-		{ X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT },
255
+		X86_MATCH_INTEL_FAM6_MODEL(ATOM_AIRMONT, NULL),
261256 		{}
262257 	};
263258 
....@@ -338,12 +333,10 @@
338333  * wifi card in the expected slot with an ACPI companion node, is used to
339334  * indicate that acpi_device_fix_up_power() should be avoided.
340335  */
341
-static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
342
-						   const char *uid)
336
+static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
343337 {
344338 	return sdhci_acpi_cht() &&
345
-	       !strcmp(hid, "80860F14") &&
346
-	       !strcmp(uid, "2") &&
339
+	       acpi_dev_hid_uid_match(adev, "80860F14", "2") &&
347340 	       sdhci_acpi_cht_pci_wifi(0x14e4, 0x43ec, 0, 28);
348341 }
349342 
....@@ -358,8 +351,7 @@
358351 	return false;
359352 }
360353 
361
-static inline bool sdhci_acpi_no_fixup_child_power(const char *hid,
362
-						   const char *uid)
354
+static inline bool sdhci_acpi_no_fixup_child_power(struct acpi_device *adev)
363355 {
364356 	return false;
365357 }
....@@ -388,25 +380,26 @@
388380 	return ret;
389381 }
390382 
391
-static int intel_probe_slot(struct platform_device *pdev, const char *hid,
392
-			    const char *uid)
383
+static int intel_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
393384 {
394385 	struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
395386 	struct intel_host *intel_host = sdhci_acpi_priv(c);
396387 	struct sdhci_host *host = c->host;
397388 
398
-	if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
389
+	if (acpi_dev_hid_uid_match(adev, "80860F14", "1") &&
399390 	    sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
400391 	    sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
401392 		host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
402393 
403
-	if (hid && !strcmp(hid, "80865ACA"))
394
+	if (acpi_dev_hid_uid_match(adev, "80865ACA", NULL))
404395 		host->mmc_host_ops.get_cd = bxt_get_cd;
405396 
406397 	intel_dsm_init(intel_host, &pdev->dev, host->mmc);
407398 
408399 	host->mmc_host_ops.start_signal_voltage_switch =
409400 					intel_start_signal_voltage_switch;
401
+
402
+	c->is_intel = true;
410403 
411404 	return 0;
412405 }
....@@ -437,7 +430,8 @@
437430 		   MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
438431 		   MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
439432 	.flags   = SDHCI_ACPI_RUNTIME_PM,
440
-	.quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
433
+	.quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
434
+		   SDHCI_QUIRK_NO_LED,
441435 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
442436 		   SDHCI_QUIRK2_STOP_WITH_TC |
443437 		   SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
....@@ -448,6 +442,7 @@
448442 
449443 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
450444 	.quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
445
+		   SDHCI_QUIRK_NO_LED |
451446 		   SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
452447 	.quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
453448 	.caps    = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
....@@ -462,7 +457,8 @@
462457 static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
463458 	.flags   = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
464459 		   SDHCI_ACPI_RUNTIME_PM,
465
-	.quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
460
+	.quirks  = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
461
+		   SDHCI_QUIRK_NO_LED,
466462 	.quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
467463 		   SDHCI_QUIRK2_STOP_WITH_TC,
468464 	.caps    = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
....@@ -471,15 +467,77 @@
471467 	.priv_size	= sizeof(struct intel_host),
472468 };
473469 
470
+#define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG	0x1a8
471
+#define VENDOR_SPECIFIC_PWRCTL_CTL_REG		0x1ac
472
+static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr)
473
+{
474
+	struct sdhci_host *host = ptr;
475
+
476
+	sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG);
477
+	sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG);
478
+
479
+	return IRQ_HANDLED;
480
+}
481
+
482
+static int qcom_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
483
+{
484
+	struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
485
+	struct sdhci_host *host = c->host;
486
+	int *irq = sdhci_acpi_priv(c);
487
+
488
+	*irq = -EINVAL;
489
+
490
+	if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
491
+		return 0;
492
+
493
+	*irq = platform_get_irq(pdev, 1);
494
+	if (*irq < 0)
495
+		return 0;
496
+
497
+	return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler,
498
+				    IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
499
+				    "sdhci_qcom", host);
500
+}
501
+
502
+static int qcom_free_slot(struct platform_device *pdev)
503
+{
504
+	struct device *dev = &pdev->dev;
505
+	struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
506
+	struct sdhci_host *host = c->host;
507
+	struct acpi_device *adev;
508
+	int *irq = sdhci_acpi_priv(c);
509
+
510
+	adev = ACPI_COMPANION(dev);
511
+	if (!adev)
512
+		return -ENODEV;
513
+
514
+	if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
515
+		return 0;
516
+
517
+	if (*irq < 0)
518
+		return 0;
519
+
520
+	free_irq(*irq, host);
521
+	return 0;
522
+}
523
+
474524 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
475525 	.quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
476526 	.quirks2 = SDHCI_QUIRK2_NO_1_8_V,
477527 	.caps    = MMC_CAP_NONREMOVABLE,
528
+	.priv_size	= sizeof(int),
529
+	.probe_slot	= qcom_probe_slot,
530
+	.free_slot	= qcom_free_slot,
478531 };
479532 
480533 static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
481534 	.quirks  = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
482535 	.caps    = MMC_CAP_NONREMOVABLE,
536
+};
537
+
538
+struct amd_sdhci_host {
539
+	bool	tuned_clock;
540
+	bool	dll_enabled;
483541 };
484542 
485543 /* AMD sdhci reset dll register. */
....@@ -489,42 +547,100 @@
489547 				     unsigned int max_dtr, int host_drv,
490548 				     int card_drv, int *drv_type)
491549 {
550
+	*drv_type = MMC_SET_DRIVER_TYPE_A;
492551 	return MMC_SET_DRIVER_TYPE_A;
493552 }
494553 
495
-static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host)
554
+static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host, bool enable)
496555 {
556
+	struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
557
+	struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
558
+
497559 	/* AMD Platform requires dll setting */
498560 	sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
499561 	usleep_range(10, 20);
500
-	sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
562
+	if (enable)
563
+		sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
564
+
565
+	amd_host->dll_enabled = enable;
501566 }
502567 
503568 /*
504
- * For AMD Platform it is required to disable the tuning
505
- * bit first controller to bring to HS Mode from HS200
506
- * mode, later enable to tune to HS400 mode.
569
+ * The initialization sequence for HS400 is:
570
+ *     HS->HS200->Perform Tuning->HS->HS400
571
+ *
572
+ * The re-tuning sequence is:
573
+ *     HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
574
+ *
575
+ * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
576
+ * mode. If we switch to a different mode, we need to disable the tuned clock.
577
+ * If we have previously performed tuning and switch back to HS200 or
578
+ * HS400, we can re-enable the tuned clock.
579
+ *
507580  */
508581 static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
509582 {
510583 	struct sdhci_host *host = mmc_priv(mmc);
584
+	struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
585
+	struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
511586 	unsigned int old_timing = host->timing;
587
+	u16 val;
512588 
513589 	sdhci_set_ios(mmc, ios);
514
-	if (old_timing == MMC_TIMING_MMC_HS200 &&
515
-	    ios->timing == MMC_TIMING_MMC_HS)
516
-		sdhci_writew(host, 0x9, SDHCI_HOST_CONTROL2);
517
-	if (old_timing != MMC_TIMING_MMC_HS400 &&
518
-	    ios->timing == MMC_TIMING_MMC_HS400) {
519
-		sdhci_writew(host, 0x80, SDHCI_HOST_CONTROL2);
520
-		sdhci_acpi_amd_hs400_dll(host);
590
+
591
+	if (old_timing != host->timing && amd_host->tuned_clock) {
592
+		if (host->timing == MMC_TIMING_MMC_HS400 ||
593
+		    host->timing == MMC_TIMING_MMC_HS200) {
594
+			val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
595
+			val |= SDHCI_CTRL_TUNED_CLK;
596
+			sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
597
+		} else {
598
+			val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
599
+			val &= ~SDHCI_CTRL_TUNED_CLK;
600
+			sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
601
+		}
602
+
603
+		/* DLL is only required for HS400 */
604
+		if (host->timing == MMC_TIMING_MMC_HS400 &&
605
+		    !amd_host->dll_enabled)
606
+			sdhci_acpi_amd_hs400_dll(host, true);
521607 	}
608
+}
609
+
610
+static int amd_sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
611
+{
612
+	int err;
613
+	struct sdhci_host *host = mmc_priv(mmc);
614
+	struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
615
+	struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
616
+
617
+	amd_host->tuned_clock = false;
618
+
619
+	err = sdhci_execute_tuning(mmc, opcode);
620
+
621
+	if (!err && !host->tuning_err)
622
+		amd_host->tuned_clock = true;
623
+
624
+	return err;
625
+}
626
+
627
+static void amd_sdhci_reset(struct sdhci_host *host, u8 mask)
628
+{
629
+	struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
630
+	struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
631
+
632
+	if (mask & SDHCI_RESET_ALL) {
633
+		amd_host->tuned_clock = false;
634
+		sdhci_acpi_amd_hs400_dll(host, false);
635
+	}
636
+
637
+	sdhci_reset(host, mask);
522638 }
523639 
524640 static const struct sdhci_ops sdhci_acpi_ops_amd = {
525641 	.set_clock	= sdhci_set_clock,
526642 	.set_bus_width	= sdhci_set_bus_width,
527
-	.reset		= sdhci_reset,
643
+	.reset		= amd_sdhci_reset,
528644 	.set_uhs_signaling = sdhci_set_uhs_signaling,
529645 };
530646 
....@@ -533,7 +649,7 @@
533649 };
534650 
535651 static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
536
-					  const char *hid, const char *uid)
652
+					  struct acpi_device *adev)
537653 {
538654 	struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
539655 	struct sdhci_host *host   = c->host;
....@@ -585,6 +701,7 @@
585701 
586702 	host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
587703 	host->mmc_host_ops.set_ios = amd_set_ios;
704
+	host->mmc_host_ops.execute_tuning = amd_sdhci_execute_tuning;
588705 	return 0;
589706 }
590707 
....@@ -596,6 +713,7 @@
596713 			  SDHCI_QUIRK_32BIT_ADMA_SIZE,
597714 	.quirks2	= SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
598715 	.probe_slot     = sdhci_acpi_emmc_amd_probe_slot,
716
+	.priv_size	= sizeof(struct amd_sdhci_host),
599717 };
600718 
601719 struct sdhci_acpi_uid_slot {
....@@ -643,17 +761,53 @@
643761 };
644762 MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
645763 
646
-static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
647
-							 const char *uid)
764
+static const struct dmi_system_id sdhci_acpi_quirks[] = {
765
+	{
766
+		/*
767
+		 * The Lenovo Miix 320-10ICR has a bug in the _PS0 method of
768
+		 * the SHC1 ACPI device, this bug causes it to reprogram the
769
+		 * wrong LDO (DLDO3) to 1.8V if 1.8V modes are used and the
770
+		 * card is (runtime) suspended + resumed. DLDO3 is used for
771
+		 * the LCD and setting it to 1.8V causes the LCD to go black.
772
+		 */
773
+		.matches = {
774
+			DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
775
+			DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
776
+		},
777
+		.driver_data = (void *)DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP,
778
+	},
779
+	{
780
+		/*
781
+		 * The Acer Aspire Switch 10 (SW5-012) microSD slot always
782
+		 * reports the card being write-protected even though microSD
783
+		 * cards do not have a write-protect switch at all.
784
+		 */
785
+		.matches = {
786
+			DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
787
+			DMI_MATCH(DMI_PRODUCT_NAME, "Aspire SW5-012"),
788
+		},
789
+		.driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT,
790
+	},
791
+	{
792
+		/*
793
+		 * The Toshiba WT8-B's microSD slot always reports the card being
794
+		 * write-protected.
795
+		 */
796
+		.matches = {
797
+			DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
798
+			DMI_MATCH(DMI_PRODUCT_NAME, "TOSHIBA ENCORE 2 WT8-B"),
799
+		},
800
+		.driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT,
801
+	},
802
+	{} /* Terminating entry */
803
+};
804
+
805
+static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(struct acpi_device *adev)
648806 {
649807 	const struct sdhci_acpi_uid_slot *u;
650808 
651809 	for (u = sdhci_acpi_uids; u->hid; u++) {
652
-		if (strcmp(u->hid, hid))
653
-			continue;
654
-		if (!u->uid)
655
-			return u->slot;
656
-		if (uid && !strcmp(u->uid, uid))
810
+		if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
657811 			return u->slot;
658812 	}
659813 	return NULL;
....@@ -664,27 +818,28 @@
664818 	struct device *dev = &pdev->dev;
665819 	const struct sdhci_acpi_slot *slot;
666820 	struct acpi_device *device, *child;
821
+	const struct dmi_system_id *id;
667822 	struct sdhci_acpi_host *c;
668823 	struct sdhci_host *host;
669824 	struct resource *iomem;
670825 	resource_size_t len;
671826 	size_t priv_size;
672
-	const char *hid;
673
-	const char *uid;
827
+	int quirks = 0;
674828 	int err;
675829 
676830 	device = ACPI_COMPANION(dev);
677831 	if (!device)
678832 		return -ENODEV;
679833 
680
-	hid = acpi_device_hid(device);
681
-	uid = acpi_device_uid(device);
834
+	id = dmi_first_match(sdhci_acpi_quirks);
835
+	if (id)
836
+		quirks = (long)id->driver_data;
682837 
683
-	slot = sdhci_acpi_get_slot(hid, uid);
838
+	slot = sdhci_acpi_get_slot(device);
684839 
685840 	/* Power on the SDHCI controller and its children */
686841 	acpi_device_fix_up_power(device);
687
-	if (!sdhci_acpi_no_fixup_child_power(hid, uid)) {
842
+	if (!sdhci_acpi_no_fixup_child_power(device)) {
688843 		list_for_each_entry(child, &device->children, node)
689844 			if (child->status.present && child->status.enabled)
690845 				acpi_device_fix_up_power(child);
....@@ -721,11 +876,11 @@
721876 	host->ops	= &sdhci_acpi_ops_dflt;
722877 	host->irq	= platform_get_irq(pdev, 0);
723878 	if (host->irq < 0) {
724
-		err = -EINVAL;
879
+		err = host->irq;
725880 		goto err_free;
726881 	}
727882 
728
-	host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
883
+	host->ioaddr = devm_ioremap(dev, iomem->start,
729884 					    resource_size(iomem));
730885 	if (host->ioaddr == NULL) {
731886 		err = -ENOMEM;
....@@ -734,7 +889,7 @@
734889 
735890 	if (c->slot) {
736891 		if (c->slot->probe_slot) {
737
-			err = c->slot->probe_slot(pdev, hid, uid);
892
+			err = c->slot->probe_slot(pdev, device);
738893 			if (err)
739894 				goto err_free;
740895 		}
....@@ -758,13 +913,19 @@
758913 	if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
759914 		bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
760915 
761
-		err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL);
916
+		err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0);
762917 		if (err) {
763918 			if (err == -EPROBE_DEFER)
764919 				goto err_free;
765920 			dev_warn(dev, "failed to setup card detect gpio\n");
766921 			c->use_runtime_pm = false;
767922 		}
923
+
924
+		if (quirks & DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP)
925
+			c->reset_signal_volt_on_suspend = true;
926
+
927
+		if (quirks & DMI_QUIRK_SD_NO_WRITE_PROTECT)
928
+			host->mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
768929 	}
769930 
770931 	err = sdhci_setup_host(host);
....@@ -829,17 +990,39 @@
829990 	return 0;
830991 }
831992 
993
+static void __maybe_unused sdhci_acpi_reset_signal_voltage_if_needed(
994
+	struct device *dev)
995
+{
996
+	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
997
+	struct sdhci_host *host = c->host;
998
+
999
+	if (c->is_intel && c->reset_signal_volt_on_suspend &&
1000
+	    host->mmc->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_330) {
1001
+		struct intel_host *intel_host = sdhci_acpi_priv(c);
1002
+		unsigned int fn = INTEL_DSM_V33_SWITCH;
1003
+		u32 result = 0;
1004
+
1005
+		intel_dsm(intel_host, dev, fn, &result);
1006
+	}
1007
+}
1008
+
8321009 #ifdef CONFIG_PM_SLEEP
8331010 
8341011 static int sdhci_acpi_suspend(struct device *dev)
8351012 {
8361013 	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
8371014 	struct sdhci_host *host = c->host;
1015
+	int ret;
8381016 
8391017 	if (host->tuning_mode != SDHCI_TUNING_MODE_3)
8401018 		mmc_retune_needed(host->mmc);
8411019 
842
-	return sdhci_suspend_host(host);
1020
+	ret = sdhci_suspend_host(host);
1021
+	if (ret)
1022
+		return ret;
1023
+
1024
+	sdhci_acpi_reset_signal_voltage_if_needed(dev);
1025
+	return 0;
8431026 }
8441027 
8451028 static int sdhci_acpi_resume(struct device *dev)
....@@ -859,11 +1042,17 @@
8591042 {
8601043 	struct sdhci_acpi_host *c = dev_get_drvdata(dev);
8611044 	struct sdhci_host *host = c->host;
1045
+	int ret;
8621046 
8631047 	if (host->tuning_mode != SDHCI_TUNING_MODE_3)
8641048 		mmc_retune_needed(host->mmc);
8651049 
866
-	return sdhci_runtime_suspend_host(host);
1050
+	ret = sdhci_runtime_suspend_host(host);
1051
+	if (ret)
1052
+		return ret;
1053
+
1054
+	sdhci_acpi_reset_signal_voltage_if_needed(dev);
1055
+	return 0;
8671056 }
8681057 
8691058 static int sdhci_acpi_runtime_resume(struct device *dev)
....@@ -872,7 +1061,7 @@
8721061 
8731062 	sdhci_acpi_byt_setting(&c->pdev->dev);
8741063 
875
-	return sdhci_runtime_resume_host(c->host);
1064
+	return sdhci_runtime_resume_host(c->host, 0);
8761065 }
8771066 
8781067 #endif