forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/drivers/mmc/host/moxart-mmc.c
....@@ -111,8 +111,8 @@
111111 #define CLK_DIV_MASK 0x7f
112112
113113 /* REG_BUS_WIDTH */
114
-#define BUS_WIDTH_8 BIT(2)
115
-#define BUS_WIDTH_4 BIT(1)
114
+#define BUS_WIDTH_4_SUPPORT BIT(3)
115
+#define BUS_WIDTH_4 BIT(2)
116116 #define BUS_WIDTH_1 BIT(0)
117117
118118 #define MMC_VDD_360 23
....@@ -339,13 +339,7 @@
339339 return;
340340 }
341341 for (len = 0; len < remain && len < host->fifo_width;) {
342
- /* SCR data must be read in big endian. */
343
- if (data->mrq->cmd->opcode == SD_APP_SEND_SCR)
344
- *sgp = ioread32be(host->base +
345
- REG_DATA_WINDOW);
346
- else
347
- *sgp = ioread32(host->base +
348
- REG_DATA_WINDOW);
342
+ *sgp = ioread32(host->base + REG_DATA_WINDOW);
349343 sgp++;
350344 len += 4;
351345 }
....@@ -527,9 +521,6 @@
527521 case MMC_BUS_WIDTH_4:
528522 writel(BUS_WIDTH_4, host->base + REG_BUS_WIDTH);
529523 break;
530
- case MMC_BUS_WIDTH_8:
531
- writel(BUS_WIDTH_8, host->base + REG_BUS_WIDTH);
532
- break;
533524 default:
534525 writel(BUS_WIDTH_1, host->base + REG_BUS_WIDTH);
535526 break;
....@@ -569,37 +560,37 @@
569560 if (!mmc) {
570561 dev_err(dev, "mmc_alloc_host failed\n");
571562 ret = -ENOMEM;
572
- goto out;
563
+ goto out_mmc;
573564 }
574565
575566 ret = of_address_to_resource(node, 0, &res_mmc);
576567 if (ret) {
577568 dev_err(dev, "of_address_to_resource failed\n");
578
- goto out;
569
+ goto out_mmc;
579570 }
580571
581572 irq = irq_of_parse_and_map(node, 0);
582573 if (irq <= 0) {
583574 dev_err(dev, "irq_of_parse_and_map failed\n");
584575 ret = -EINVAL;
585
- goto out;
576
+ goto out_mmc;
586577 }
587578
588579 clk = devm_clk_get(dev, NULL);
589580 if (IS_ERR(clk)) {
590581 ret = PTR_ERR(clk);
591
- goto out;
582
+ goto out_mmc;
592583 }
593584
594585 reg_mmc = devm_ioremap_resource(dev, &res_mmc);
595586 if (IS_ERR(reg_mmc)) {
596587 ret = PTR_ERR(reg_mmc);
597
- goto out;
588
+ goto out_mmc;
598589 }
599590
600591 ret = mmc_of_parse(mmc);
601592 if (ret)
602
- goto out;
593
+ goto out_mmc;
603594
604595 host = mmc_priv(mmc);
605596 host->mmc = mmc;
....@@ -608,8 +599,8 @@
608599 host->timeout = msecs_to_jiffies(1000);
609600 host->sysclk = clk_get_rate(clk);
610601 host->fifo_width = readl(host->base + REG_FEATURE) << 2;
611
- host->dma_chan_tx = dma_request_slave_channel_reason(dev, "tx");
612
- host->dma_chan_rx = dma_request_slave_channel_reason(dev, "rx");
602
+ host->dma_chan_tx = dma_request_chan(dev, "tx");
603
+ host->dma_chan_rx = dma_request_chan(dev, "rx");
613604
614605 spin_lock_init(&host->lock);
615606
....@@ -623,6 +614,14 @@
623614 PTR_ERR(host->dma_chan_rx) == -EPROBE_DEFER) {
624615 ret = -EPROBE_DEFER;
625616 goto out;
617
+ }
618
+ if (!IS_ERR(host->dma_chan_tx)) {
619
+ dma_release_channel(host->dma_chan_tx);
620
+ host->dma_chan_tx = NULL;
621
+ }
622
+ if (!IS_ERR(host->dma_chan_rx)) {
623
+ dma_release_channel(host->dma_chan_rx);
624
+ host->dma_chan_rx = NULL;
626625 }
627626 dev_dbg(dev, "PIO mode transfer enabled\n");
628627 host->have_dma = false;
....@@ -646,16 +645,8 @@
646645 dmaengine_slave_config(host->dma_chan_rx, &cfg);
647646 }
648647
649
- switch ((readl(host->base + REG_BUS_WIDTH) >> 3) & 3) {
650
- case 1:
648
+ if (readl(host->base + REG_BUS_WIDTH) & BUS_WIDTH_4_SUPPORT)
651649 mmc->caps |= MMC_CAP_4_BIT_DATA;
652
- break;
653
- case 2:
654
- mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
655
- break;
656
- default:
657
- break;
658
- }
659650
660651 writel(0, host->base + REG_INTERRUPT_MASK);
661652
....@@ -671,13 +662,20 @@
671662 goto out;
672663
673664 dev_set_drvdata(dev, mmc);
674
- mmc_add_host(mmc);
665
+ ret = mmc_add_host(mmc);
666
+ if (ret)
667
+ goto out;
675668
676669 dev_dbg(dev, "IRQ=%d, FIFO is %d bytes\n", irq, host->fifo_width);
677670
678671 return 0;
679672
680673 out:
674
+ if (!IS_ERR_OR_NULL(host->dma_chan_tx))
675
+ dma_release_channel(host->dma_chan_tx);
676
+ if (!IS_ERR_OR_NULL(host->dma_chan_rx))
677
+ dma_release_channel(host->dma_chan_rx);
678
+out_mmc:
681679 if (mmc)
682680 mmc_free_host(mmc);
683681 return ret;
....@@ -690,19 +688,18 @@
690688
691689 dev_set_drvdata(&pdev->dev, NULL);
692690
693
- if (mmc) {
694
- if (!IS_ERR(host->dma_chan_tx))
695
- dma_release_channel(host->dma_chan_tx);
696
- if (!IS_ERR(host->dma_chan_rx))
697
- dma_release_channel(host->dma_chan_rx);
698
- mmc_remove_host(mmc);
691
+ if (!IS_ERR_OR_NULL(host->dma_chan_tx))
692
+ dma_release_channel(host->dma_chan_tx);
693
+ if (!IS_ERR_OR_NULL(host->dma_chan_rx))
694
+ dma_release_channel(host->dma_chan_rx);
695
+ mmc_remove_host(mmc);
699696
700
- writel(0, host->base + REG_INTERRUPT_MASK);
701
- writel(0, host->base + REG_POWER_CONTROL);
702
- writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF,
703
- host->base + REG_CLOCK_CONTROL);
704
- mmc_free_host(mmc);
705
- }
697
+ writel(0, host->base + REG_INTERRUPT_MASK);
698
+ writel(0, host->base + REG_POWER_CONTROL);
699
+ writel(readl(host->base + REG_CLOCK_CONTROL) | CLK_OFF,
700
+ host->base + REG_CLOCK_CONTROL);
701
+ mmc_free_host(mmc);
702
+
706703 return 0;
707704 }
708705
....@@ -718,6 +715,7 @@
718715 .remove = moxart_remove,
719716 .driver = {
720717 .name = "mmc-moxart",
718
+ .probe_type = PROBE_PREFER_ASYNCHRONOUS,
721719 .of_match_table = moxart_mmc_match,
722720 },
723721 };