~hc/RK356X_SDK_RELEASE.git

..	..	@@ -27,23 +27,34 @@
27	27	.rd_table = &max96752_readable_table,
28	28	};
29	29
30		-static int MAX96752_MFP0_pins[] = {0};
31		-static int MAX96752_MFP1_pins[] = {1};
32		-static int MAX96752_MFP2_pins[] = {2};
33		-static int MAX96752_MFP3_pins[] = {3};
34		-static int MAX96752_MFP4_pins[] = {4};
35		-static int MAX96752_MFP5_pins[] = {5};
36		-static int MAX96752_MFP6_pins[] = {6};
37		-static int MAX96752_MFP7_pins[] = {7};
	30	+struct config_desc {
	31	+ u16 reg;
	32	+ u8 mask;
	33	+ u8 val;
	34	+};
38	35
39		-static int MAX96752_MFP8_pins[] = {8};
40		-static int MAX96752_MFP9_pins[] = {9};
41		-static int MAX96752_MFP10_pins[] = {10};
42		-static int MAX96752_MFP11_pins[] = {11};
43		-static int MAX96752_MFP12_pins[] = {12};
44		-static int MAX96752_MFP13_pins[] = {13};
45		-static int MAX96752_MFP14_pins[] = {14};
46		-static int MAX96752_MFP15_pins[] = {15};
	36	+struct serdes_group_data {
	37	+ const struct config_desc *configs;
	38	+ int num_configs;
	39	+};
	40	+
	41	+static int MAX96752_GPIO0_pins[] = {0};
	42	+static int MAX96752_GPIO1_pins[] = {1};
	43	+static int MAX96752_GPIO2_pins[] = {2};
	44	+static int MAX96752_GPIO3_pins[] = {3};
	45	+static int MAX96752_GPIO4_pins[] = {4};
	46	+static int MAX96752_GPIO5_pins[] = {5};
	47	+static int MAX96752_GPIO6_pins[] = {6};
	48	+static int MAX96752_GPIO7_pins[] = {7};
	49	+
	50	+static int MAX96752_GPIO8_pins[] = {8};
	51	+static int MAX96752_GPIO9_pins[] = {9};
	52	+static int MAX96752_GPIO10_pins[] = {10};
	53	+static int MAX96752_GPIO11_pins[] = {11};
	54	+static int MAX96752_GPIO12_pins[] = {12};
	55	+static int MAX96752_GPIO13_pins[] = {13};
	56	+static int MAX96752_GPIO14_pins[] = {14};
	57	+static int MAX96752_GPIO15_pins[] = {15};
47	58
48	59	#define GROUP_DESC(nm) \
49	60	{ \
..	..	@@ -56,21 +67,24 @@
56	67	u8 gpio_out_dis:1;
57	68	u8 gpio_tx_en:1;
58	69	u8 gpio_rx_en:1;
	70	+ u8 gpio_in_level:1;
	71	+ u8 gpio_out_level:1;
59	72	u8 gpio_tx_id;
60	73	u8 gpio_rx_id;
	74	+ u16 mdelay;
61	75	};
62	76
63	77	static const char *serdes_gpio_groups[] = {
64		- "MAX96752_MFP0", "MAX96752_MFP1", "MAX96752_MFP2", "MAX96752_MFP3",
65		- "MAX96752_MFP4", "MAX96752_MFP5", "MAX96752_MFP6", "MAX96752_MFP7",
	78	+ "MAX96752_GPIO0", "MAX96752_GPIO1", "MAX96752_GPIO2", "MAX96752_GPIO3",
	79	+ "MAX96752_GPIO4", "MAX96752_GPIO5", "MAX96752_GPIO6", "MAX96752_GPIO7",
66	80
67		- "MAX96752_MFP8", "MAX96752_MFP9", "MAX96752_MFP10", "MAX96752_MFP11",
68		- "MAX96752_MFP12", "MAX96752_MFP13", "MAX96752_MFP14", "MAX96752_MFP15",
	81	+ "MAX96752_GPIO8", "MAX96752_GPIO9", "MAX96752_GPIO10", "MAX96752_GPIO11",
	82	+ "MAX96752_GPIO12", "MAX96752_GPIO13", "MAX96752_GPIO14", "MAX96752_GPIO15",
69	83	};
70	84
71		-#define FUNCTION_DESC_GPIO_INPUT(id) \
	85	+#define FUNCTION_DESC_GPIO_INPUT_BYPASS(id) \
72	86	{ \
73		- .name = "MFP"#id"_INPUT", \
	87	+ .name = "SER_TO_DES_RXID"#id, \
74	88	.group_names = serdes_gpio_groups, \
75	89	.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
76	90	.data = (void *)(const struct serdes_function_data []) { \
..	..	@@ -78,9 +92,9 @@
78	92	}, \
79	93	} \
80	94
81		-#define FUNCTION_DESC_GPIO_OUTPUT(id) \
	95	+#define FUNCTION_DESC_GPIO_OUTPUT_BYPASS(id) \
82	96	{ \
83		- .name = "MFP"#id"_OUTPUT", \
	97	+ .name = "DES_TXID"#id"_TO_SER", \
84	98	.group_names = serdes_gpio_groups, \
85	99	.num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
86	100	.data = (void *)(const struct serdes_function_data []) { \
..	..	@@ -88,83 +102,156 @@
88	102	}, \
89	103	} \
90	104
91		-static struct pinctrl_pin_desc max96752_pins_desc[] = {
92		- PINCTRL_PIN(MAXIM_MAX96752_MFP0, "MAX96752_MFP0"),
93		- PINCTRL_PIN(MAXIM_MAX96752_MFP1, "MAX96752_MFP1"),
94		- PINCTRL_PIN(MAXIM_MAX96752_MFP2, "MAX96752_MFP2"),
95		- PINCTRL_PIN(MAXIM_MAX96752_MFP3, "MAX96752_MFP3"),
96		- PINCTRL_PIN(MAXIM_MAX96752_MFP4, "MAX96752_MFP4"),
97		- PINCTRL_PIN(MAXIM_MAX96752_MFP5, "MAX96752_MFP5"),
98		- PINCTRL_PIN(MAXIM_MAX96752_MFP6, "MAX96752_MFP6"),
99		- PINCTRL_PIN(MAXIM_MAX96752_MFP7, "MAX96752_MFP7"),
	105	+#define FUNCTION_DESC_GPIO_OUTPUT_LOW(id) \
	106	+{ \
	107	+ .name = "DES_TXID"#id"_OUTPUT_LOW", \
	108	+ .group_names = serdes_gpio_groups, \
	109	+ .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
	110	+ .data = (void *)(const struct serdes_function_data []) { \
	111	+ { .gpio_out_dis = 0, .gpio_tx_en = 0, \
	112	+ .gpio_rx_en = 0, .gpio_out_level = 0, .gpio_tx_id = id } \
	113	+ }, \
	114	+} \
100	115
101		- PINCTRL_PIN(MAXIM_MAX96752_MFP8, "MAX96752_MFP8"),
102		- PINCTRL_PIN(MAXIM_MAX96752_MFP9, "MAX96752_MFP9"),
103		- PINCTRL_PIN(MAXIM_MAX96752_MFP10, "MAX96752_MFP10"),
104		- PINCTRL_PIN(MAXIM_MAX96752_MFP11, "MAX96752_MFP11"),
105		- PINCTRL_PIN(MAXIM_MAX96752_MFP12, "MAX96752_MFP12"),
106		- PINCTRL_PIN(MAXIM_MAX96752_MFP13, "MAX96752_MFP13"),
107		- PINCTRL_PIN(MAXIM_MAX96752_MFP14, "MAX96752_MFP14"),
108		- PINCTRL_PIN(MAXIM_MAX96752_MFP15, "MAX96752_MFP15"),
	116	+#define FUNCTION_DESC_GPIO_OUTPUT_HIGH(id) \
	117	+{ \
	118	+ .name = "DES_TXID"#id"_OUTPUT_HIGH", \
	119	+ .group_names = serdes_gpio_groups, \
	120	+ .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
	121	+ .data = (void *)(const struct serdes_function_data []) { \
	122	+ { .gpio_out_dis = 0, .gpio_tx_en = 0, \
	123	+ .gpio_rx_en = 0, .gpio_out_level = 1, .gpio_tx_id = id } \
	124	+ }, \
	125	+} \
	126	+
	127	+#define FUNCTION_DES_DELAY_MS(ms) \
	128	+{ \
	129	+ .name = "DELAY_"#ms"MS", \
	130	+ .group_names = serdes_gpio_groups, \
	131	+ .num_group_names = ARRAY_SIZE(serdes_gpio_groups), \
	132	+ .data = (void *)(const struct serdes_function_data []) { \
	133	+ { .mdelay = ms, } \
	134	+ }, \
	135	+} \
	136	+
	137	+static struct pinctrl_pin_desc max96752_pins_desc[] = {
	138	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO0, "MAX96752_GPIO0"),
	139	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO1, "MAX96752_GPIO1"),
	140	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO2, "MAX96752_GPIO2"),
	141	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO3, "MAX96752_GPIO3"),
	142	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO4, "MAX96752_GPIO4"),
	143	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO5, "MAX96752_GPIO5"),
	144	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO6, "MAX96752_GPIO6"),
	145	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO7, "MAX96752_GPIO7"),
	146	+
	147	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO8, "MAX96752_GPIO8"),
	148	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO9, "MAX96752_GPIO9"),
	149	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO10, "MAX96752_GPIO10"),
	150	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO11, "MAX96752_GPIO11"),
	151	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO12, "MAX96752_GPIO12"),
	152	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO13, "MAX96752_GPIO13"),
	153	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO14, "MAX96752_GPIO14"),
	154	+ PINCTRL_PIN(MAXIM_MAX96752_GPIO15, "MAX96752_GPIO15"),
109	155	};
110	156
111	157	static struct group_desc max96752_groups_desc[] = {
112		- GROUP_DESC(MAX96752_MFP0),
113		- GROUP_DESC(MAX96752_MFP1),
114		- GROUP_DESC(MAX96752_MFP2),
115		- GROUP_DESC(MAX96752_MFP3),
116		- GROUP_DESC(MAX96752_MFP4),
117		- GROUP_DESC(MAX96752_MFP5),
118		- GROUP_DESC(MAX96752_MFP6),
119		- GROUP_DESC(MAX96752_MFP7),
	158	+ GROUP_DESC(MAX96752_GPIO0),
	159	+ GROUP_DESC(MAX96752_GPIO1),
	160	+ GROUP_DESC(MAX96752_GPIO2),
	161	+ GROUP_DESC(MAX96752_GPIO3),
	162	+ GROUP_DESC(MAX96752_GPIO4),
	163	+ GROUP_DESC(MAX96752_GPIO5),
	164	+ GROUP_DESC(MAX96752_GPIO6),
	165	+ GROUP_DESC(MAX96752_GPIO7),
120	166
121		- GROUP_DESC(MAX96752_MFP8),
122		- GROUP_DESC(MAX96752_MFP9),
123		- GROUP_DESC(MAX96752_MFP10),
124		- GROUP_DESC(MAX96752_MFP11),
125		- GROUP_DESC(MAX96752_MFP12),
126		- GROUP_DESC(MAX96752_MFP13),
127		- GROUP_DESC(MAX96752_MFP14),
128		- GROUP_DESC(MAX96752_MFP15),
	167	+ GROUP_DESC(MAX96752_GPIO8),
	168	+ GROUP_DESC(MAX96752_GPIO9),
	169	+ GROUP_DESC(MAX96752_GPIO10),
	170	+ GROUP_DESC(MAX96752_GPIO11),
	171	+ GROUP_DESC(MAX96752_GPIO12),
	172	+ GROUP_DESC(MAX96752_GPIO13),
	173	+ GROUP_DESC(MAX96752_GPIO14),
	174	+ GROUP_DESC(MAX96752_GPIO15),
129	175	};
130	176
131	177	static struct function_desc max96752_functions_desc[] = {
132		- FUNCTION_DESC_GPIO_INPUT(0),
133		- FUNCTION_DESC_GPIO_INPUT(1),
134		- FUNCTION_DESC_GPIO_INPUT(2),
135		- FUNCTION_DESC_GPIO_INPUT(3),
136		- FUNCTION_DESC_GPIO_INPUT(4),
137		- FUNCTION_DESC_GPIO_INPUT(5),
138		- FUNCTION_DESC_GPIO_INPUT(6),
139		- FUNCTION_DESC_GPIO_INPUT(7),
	178	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(0),
	179	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(1),
	180	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(2),
	181	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(3),
	182	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(4),
	183	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(5),
	184	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(6),
	185	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(7),
140	186
141		- FUNCTION_DESC_GPIO_INPUT(8),
142		- FUNCTION_DESC_GPIO_INPUT(9),
143		- FUNCTION_DESC_GPIO_INPUT(10),
144		- FUNCTION_DESC_GPIO_INPUT(11),
145		- FUNCTION_DESC_GPIO_INPUT(12),
146		- FUNCTION_DESC_GPIO_INPUT(13),
147		- FUNCTION_DESC_GPIO_INPUT(14),
148		- FUNCTION_DESC_GPIO_INPUT(15),
	187	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(8),
	188	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(9),
	189	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(10),
	190	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(11),
	191	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(12),
	192	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(13),
	193	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(14),
	194	+ FUNCTION_DESC_GPIO_INPUT_BYPASS(15),
149	195
150		- FUNCTION_DESC_GPIO_OUTPUT(0),
151		- FUNCTION_DESC_GPIO_OUTPUT(1),
152		- FUNCTION_DESC_GPIO_OUTPUT(2),
153		- FUNCTION_DESC_GPIO_OUTPUT(3),
154		- FUNCTION_DESC_GPIO_OUTPUT(4),
155		- FUNCTION_DESC_GPIO_OUTPUT(5),
156		- FUNCTION_DESC_GPIO_OUTPUT(6),
157		- FUNCTION_DESC_GPIO_OUTPUT(7),
	196	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(0),
	197	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(1),
	198	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(2),
	199	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(3),
	200	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(4),
	201	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(5),
	202	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(6),
	203	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(7),
158	204
159		- FUNCTION_DESC_GPIO_OUTPUT(8),
160		- FUNCTION_DESC_GPIO_OUTPUT(9),
161		- FUNCTION_DESC_GPIO_OUTPUT(10),
162		- FUNCTION_DESC_GPIO_OUTPUT(11),
163		- FUNCTION_DESC_GPIO_OUTPUT(12),
164		- FUNCTION_DESC_GPIO_OUTPUT(13),
165		- FUNCTION_DESC_GPIO_OUTPUT(14),
166		- FUNCTION_DESC_GPIO_OUTPUT(15),
	205	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(8),
	206	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(9),
	207	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(10),
	208	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(11),
	209	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(12),
	210	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(13),
	211	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(14),
	212	+ FUNCTION_DESC_GPIO_OUTPUT_BYPASS(15),
167	213
	214	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(0),
	215	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(1),
	216	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(2),
	217	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(3),
	218	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(4),
	219	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(5),
	220	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(6),
	221	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(7),
	222	+
	223	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(8),
	224	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(9),
	225	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(10),
	226	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(11),
	227	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(12),
	228	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(13),
	229	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(14),
	230	+ FUNCTION_DESC_GPIO_OUTPUT_LOW(15),
	231	+
	232	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(0),
	233	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(1),
	234	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(2),
	235	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(3),
	236	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(4),
	237	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(5),
	238	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(6),
	239	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(7),
	240	+
	241	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(8),
	242	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(9),
	243	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(10),
	244	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(11),
	245	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(12),
	246	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(13),
	247	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(14),
	248	+ FUNCTION_DESC_GPIO_OUTPUT_HIGH(15),
	249	+
	250	+ FUNCTION_DES_DELAY_MS(10),
	251	+ FUNCTION_DES_DELAY_MS(50),
	252	+ FUNCTION_DES_DELAY_MS(100),
	253	+ FUNCTION_DES_DELAY_MS(200),
	254	+ FUNCTION_DES_DELAY_MS(500),
168	255	};
169	256
170	257	static struct serdes_chip_pinctrl_info max96752_pinctrl_info = {
..	..	@@ -205,24 +292,233 @@
205	292	.disable = max96752_panel_disable,
206	293	};
207	294
208		-static int max96752_pinctrl_config_get(struct serdes *serdes,
209		- unsigned int pin,
210		- unsigned long *config)
	295	+static int max96752_bridge_pre_enable(struct serdes *serdes)
211	296	{
	297	+ int ret = 0;
	298	+
	299	+ SERDES_DBG_CHIP("%s: serdes %s ret=%d\n", __func__,
	300	+ serdes->chip_data->name, ret);
	301	+ return ret;
	302	+}
	303	+
	304	+static int max96752_bridge_post_disable(struct serdes *serdes)
	305	+{
	306	+ return 0;
	307	+}
	308	+
	309	+static struct serdes_chip_bridge_ops max96752_bridge_ops = {
	310	+ .enable = max96752_bridge_pre_enable,
	311	+ .disable = max96752_bridge_post_disable,
	312	+};
	313	+
	314	+
	315	+static int max96752_pinctrl_set_mux(struct serdes *serdes,
	316	+ unsigned int function, unsigned int group)
	317	+{
	318	+ struct serdes_pinctrl *pinctrl = serdes->pinctrl;
	319	+ struct function_desc *func;
	320	+ struct group_desc *grp;
	321	+ int i;
	322	+ u16 ms;
	323	+
	324	+ func = pinmux_generic_get_function(pinctrl->pctl, function);
	325	+ if (!func)
	326	+ return -EINVAL;
	327	+
	328	+ grp = pinctrl_generic_get_group(pinctrl->pctl, group);
	329	+ if (!grp)
	330	+ return -EINVAL;
	331	+
	332	+ SERDES_DBG_CHIP("%s: serdes chip %s func=%s data=%p group=%s data=%p, num_pin=%d\n",
	333	+ __func__, serdes->chip_data->name, func->name,
	334	+ func->data, grp->name, grp->data, grp->num_pins);
	335	+
	336	+ if (func->data) {
	337	+ struct serdes_function_data *fdata = func->data;
	338	+
	339	+ ms = fdata->mdelay;
	340	+ for (i = 0; i < grp->num_pins; i++) {
	341	+ if (!ms) {
	342	+ serdes_set_bits(serdes, GPIO_A_REG(grp->pins[i] - pinctrl->pin_base),
	343	+ GPIO_OUT_DIS \| GPIO_RX_EN \| GPIO_TX_EN \| GPIO_OUT,
	344	+ FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) \|
	345	+ FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) \|
	346	+ FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) \|
	347	+ FIELD_PREP(GPIO_OUT, fdata->gpio_out_level));
	348	+ if (fdata->gpio_tx_en)
	349	+ serdes_set_bits(serdes,
	350	+ GPIO_B_REG(grp->pins[i] - pinctrl->pin_base),
	351	+ GPIO_TX_ID,
	352	+ FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id));
	353	+ if (fdata->gpio_rx_en)
	354	+ serdes_set_bits(serdes,
	355	+ GPIO_C_REG(grp->pins[i] - pinctrl->pin_base),
	356	+ GPIO_RX_ID,
	357	+ FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id));
	358	+ } else {
	359	+ mdelay(ms);
	360	+ SERDES_DBG_CHIP("%s: delay %d ms\n",
	361	+ __func__, ms);
	362	+ }
	363	+ }
	364	+ }
	365	+
	366	+ if (grp->data) {
	367	+ struct serdes_group_data *gdata = grp->data;
	368	+
	369	+ for (i = 0; i < gdata->num_configs; i++) {
	370	+ const struct config_desc *config = &gdata->configs[i];
	371	+
	372	+ serdes_set_bits(serdes, config->reg,
	373	+ config->mask, config->val);
	374	+ }
	375	+ }
	376	+
	377	+ return 0;
	378	+}
	379	+
	380	+static int max96752_pinctrl_config_get(struct serdes *serdes,
	381	+ unsigned int pin, unsigned long *config)
	382	+{
	383	+ enum pin_config_param param = pinconf_to_config_param(*config);
	384	+ unsigned int gpio_a_reg, gpio_b_reg;
	385	+ u16 arg = 0;
	386	+
	387	+ serdes_reg_read(serdes, GPIO_A_REG(pin), &gpio_a_reg);
	388	+ serdes_reg_read(serdes, GPIO_B_REG(pin), &gpio_b_reg);
	389	+
	390	+ SERDES_DBG_CHIP("%s: serdes chip %s pin=%d param=%d\n", __func__,
	391	+ serdes->chip_data->name, pin, param);
	392	+
	393	+ switch (param) {
	394	+ case PIN_CONFIG_DRIVE_OPEN_DRAIN:
	395	+ if (FIELD_GET(OUT_TYPE, gpio_b_reg))
	396	+ return -EINVAL;
	397	+ break;
	398	+ case PIN_CONFIG_DRIVE_PUSH_PULL:
	399	+ if (!FIELD_GET(OUT_TYPE, gpio_b_reg))
	400	+ return -EINVAL;
	401	+ break;
	402	+ case PIN_CONFIG_BIAS_DISABLE:
	403	+ if (FIELD_GET(PULL_UPDN_SEL, gpio_b_reg) != 0)
	404	+ return -EINVAL;
	405	+ break;
	406	+ case PIN_CONFIG_BIAS_PULL_UP:
	407	+ if (FIELD_GET(PULL_UPDN_SEL, gpio_b_reg) != 1)
	408	+ return -EINVAL;
	409	+ switch (FIELD_GET(RES_CFG, gpio_a_reg)) {
	410	+ case 0:
	411	+ arg = 40000;
	412	+ break;
	413	+ case 1:
	414	+ arg = 10000;
	415	+ break;
	416	+ }
	417	+ break;
	418	+ case PIN_CONFIG_BIAS_PULL_DOWN:
	419	+ if (FIELD_GET(PULL_UPDN_SEL, gpio_b_reg) != 2)
	420	+ return -EINVAL;
	421	+ switch (FIELD_GET(RES_CFG, gpio_a_reg)) {
	422	+ case 0:
	423	+ arg = 40000;
	424	+ break;
	425	+ case 1:
	426	+ arg = 10000;
	427	+ break;
	428	+ }
	429	+ break;
	430	+ case PIN_CONFIG_OUTPUT:
	431	+ if (FIELD_GET(GPIO_OUT_DIS, gpio_a_reg))
	432	+ return -EINVAL;
	433	+
	434	+ arg = FIELD_GET(GPIO_OUT, gpio_a_reg);
	435	+ break;
	436	+ default:
	437	+ return -EOPNOTSUPP;
	438	+ }
	439	+
	440	+ *config = pinconf_to_config_packed(param, arg);
	441	+
212	442	return 0;
213	443	}
214	444
215	445	static int max96752_pinctrl_config_set(struct serdes *serdes,
216		- unsigned int pin,
217		- unsigned long *configs,
	446	+ unsigned int pin, unsigned long *configs,
218	447	unsigned int num_configs)
219	448	{
220		- return 0;
221		-}
	449	+ enum pin_config_param param;
	450	+ u32 arg;
	451	+ u8 res_cfg;
	452	+ int i;
222	453
223		-static int max96752_pinctrl_set_mux(struct serdes *serdes, unsigned int func_selector,
224		- unsigned int group_selector)
225		-{
	454	+ for (i = 0; i < num_configs; i++) {
	455	+ param = pinconf_to_config_param(configs[i]);
	456	+ arg = pinconf_to_config_argument(configs[i]);
	457	+
	458	+ SERDES_DBG_CHIP("%s: serdes chip %s pin=%d param=%d\n", __func__,
	459	+ serdes->chip_data->name, pin, param);
	460	+
	461	+ switch (param) {
	462	+ case PIN_CONFIG_DRIVE_OPEN_DRAIN:
	463	+ serdes_set_bits(serdes, GPIO_B_REG(pin),
	464	+ OUT_TYPE, FIELD_PREP(OUT_TYPE, 0));
	465	+ break;
	466	+ case PIN_CONFIG_DRIVE_PUSH_PULL:
	467	+ serdes_set_bits(serdes, GPIO_B_REG(pin),
	468	+ OUT_TYPE, FIELD_PREP(OUT_TYPE, 1));
	469	+ break;
	470	+ case PIN_CONFIG_BIAS_DISABLE:
	471	+ serdes_set_bits(serdes, GPIO_C_REG(pin),
	472	+ PULL_UPDN_SEL,
	473	+ FIELD_PREP(PULL_UPDN_SEL, 0));
	474	+ break;
	475	+ case PIN_CONFIG_BIAS_PULL_UP:
	476	+ switch (arg) {
	477	+ case 40000:
	478	+ res_cfg = 0;
	479	+ break;
	480	+ case 1000000:
	481	+ res_cfg = 1;
	482	+ break;
	483	+ default:
	484	+ return -EINVAL;
	485	+ }
	486	+
	487	+ serdes_set_bits(serdes, GPIO_A_REG(pin),
	488	+ RES_CFG, FIELD_PREP(RES_CFG, res_cfg));
	489	+ serdes_set_bits(serdes, GPIO_C_REG(pin),
	490	+ PULL_UPDN_SEL,
	491	+ FIELD_PREP(PULL_UPDN_SEL, 1));
	492	+ break;
	493	+ case PIN_CONFIG_BIAS_PULL_DOWN:
	494	+ switch (arg) {
	495	+ case 40000:
	496	+ res_cfg = 0;
	497	+ break;
	498	+ case 1000000:
	499	+ res_cfg = 1;
	500	+ break;
	501	+ default:
	502	+ return -EINVAL;
	503	+ }
	504	+
	505	+ serdes_set_bits(serdes, GPIO_A_REG(pin),
	506	+ RES_CFG, FIELD_PREP(RES_CFG, res_cfg));
	507	+ serdes_set_bits(serdes, GPIO_C_REG(pin),
	508	+ PULL_UPDN_SEL,
	509	+ FIELD_PREP(PULL_UPDN_SEL, 2));
	510	+ break;
	511	+ case PIN_CONFIG_OUTPUT:
	512	+ serdes_set_bits(serdes, GPIO_A_REG(pin),
	513	+ GPIO_OUT_DIS \| GPIO_OUT,
	514	+ FIELD_PREP(GPIO_OUT_DIS, 0) \|
	515	+ FIELD_PREP(GPIO_OUT, arg));
	516	+ break;
	517	+ default:
	518	+ return -EOPNOTSUPP;
	519	+ }
	520	+ }
	521	+
226	522	return 0;
227	523	}
228	524
..	..	@@ -271,6 +567,37 @@
271	567	.to_irq = max96752_gpio_to_irq,
272	568	};
273	569
	570	+static int max96752_set_i2c_addr(struct serdes *serdes, int address, int link)
	571	+{
	572	+ int ret;
	573	+
	574	+ if (link == LINKA) {
	575	+ /* TX_SRC_ID[1] = 0 */
	576	+ ret = serdes_reg_write(serdes, 0x73, 0x31);
	577	+ /* Receive packets with this stream ID = 0 */
	578	+ ret = serdes_reg_write(serdes, 0x50, 0x00);
	579	+ ret = serdes_reg_write(serdes, 0x00, address << 1);
	580	+ } else if (link == LINKB) {
	581	+ /* TX_SRC_ID[1] = 1 */
	582	+ ret = serdes_reg_write(serdes, 0x73, 0x32);
	583	+ /* Receive packets with this stream ID = 1 */
	584	+ ret = serdes_reg_write(serdes, 0x50, 0x01);
	585	+ ret = serdes_reg_write(serdes, 0x00, address << 1);
	586	+ } else {
	587	+ dev_info(serdes->dev, "link %d is error\n", link);
	588	+ ret = -1;
	589	+ }
	590	+
	591	+ SERDES_DBG_CHIP("%s: set serdes chip %s i2c 7bit address to 0x%x\n", __func__,
	592	+ serdes->chip_data->name, address);
	593	+
	594	+ return ret;
	595	+}
	596	+
	597	+static struct serdes_chip_split_ops max96752_split_ops = {
	598	+ .set_i2c_addr = max96752_set_i2c_addr,
	599	+};
	600	+
274	601	static int max96752_pm_suspend(struct serdes *serdes)
275	602	{
276	603	return 0;
..	..	@@ -309,7 +636,9 @@
309	636	.regmap_config = &max96752_regmap_config,
310	637	.pinctrl_info = &max96752_pinctrl_info,
311	638	.panel_ops = &max96752_panel_ops,
	639	+ .bridge_ops = &max96752_bridge_ops,
312	640	.pinctrl_ops = &max96752_pinctrl_ops,
	641	+ .split_ops = &max96752_split_ops,
313	642	.gpio_ops = &max96752_gpio_ops,
314	643	.pm_ops = &max96752_pm_ops,
315	644	.irq_ops = &max96752_irq_ops,