forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/drivers/mfd/cs47l35-tables.c
....@@ -1,12 +1,8 @@
1
-// SPDX-License-Identifier: GPL-2.0
1
+// SPDX-License-Identifier: GPL-2.0-only
22 /*
33 * Regmap tables for CS47L35 codec
44 *
55 * Copyright (C) 2015-2017 Cirrus Logic
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License as published by the
9
- * Free Software Foundation; version 2.
106 */
117
128 #include <linux/device.h>
....@@ -109,9 +105,8 @@
109105 { 0x00000174, 0x007d }, /* R372 (0x174) - FLL1 Control 4 */
110106 { 0x00000175, 0x0000 }, /* R373 (0x175) - FLL1 Control 5 */
111107 { 0x00000176, 0x0000 }, /* R374 (0x176) - FLL1 Control 6 */
112
- { 0x00000177, 0x0281 }, /* R375 (0x177) - FLL1 Loop Filter Test 1 */
113108 { 0x00000179, 0x0000 }, /* R377 (0x179) - FLL1 Control 7 */
114
- { 0x0000017a, 0x0b06 }, /* R378 (0x17a) - FLL1 EFS2 */
109
+ { 0x0000017a, 0x2906 }, /* R378 (0x17a) - FLL1 EFS2 */
115110 { 0x0000017f, 0x0000 }, /* R383 (0x17f) - FLL1 Synchroniser 1 */
116111 { 0x00000180, 0x0000 }, /* R384 (0x180) - FLL1 Synchroniser 2 */
117112 { 0x00000181, 0x0000 }, /* R385 (0x181) - FLL1 Synchroniser 3 */
....@@ -174,10 +169,8 @@
174169 { 0x00000434, 0x0000 }, /* R1076 (0x434) - Output Path Config 5R */
175170 { 0x00000435, 0x0180 }, /* R1077 (0x435) - DAC Digital Volume 5R */
176171 { 0x00000437, 0x0200 }, /* R1079 (0x437) - Noise Gate Select 5R */
177
- { 0x00000440, 0x0003 }, /* R1088 (0x440) - DRE Enable */
178
- { 0x00000448, 0x0a83 }, /* R1096 (0x448) - eDRE Enable */
179
- { 0x0000044a, 0x0000 }, /* R1098 (0x44a) - eDRE Manual */
180172 { 0x00000450, 0x0000 }, /* R1104 (0x450) - DAC AEC Control 1 */
173
+ { 0x00000451, 0x0000 }, /* R1105 (0x451) - DAC AEC Control 2 */
181174 { 0x00000458, 0x0000 }, /* R1112 (0x458) - Noise Gate Control */
182175 { 0x00000490, 0x0069 }, /* R1168 (0x490) - PDM SPK1 CTRL 1 */
183176 { 0x00000491, 0x0000 }, /* R1169 (0x491) - PDM SPK1 CTRL 2 */
....@@ -719,28 +712,6 @@
719712 { 0x00000ef3, 0x0000 }, /* R3827 (0xef3) - ISRC 2 CTRL 1 */
720713 { 0x00000ef4, 0x0001 }, /* R3828 (0xef4) - ISRC 2 CTRL 2 */
721714 { 0x00000ef5, 0x0000 }, /* R3829 (0xef5) - ISRC 2 CTRL 3 */
722
- { 0x00001300, 0x0000 }, /* R4864 (0x1300) - DAC Comp 1 */
723
- { 0x00001302, 0x0000 }, /* R4866 (0x1302) - DAC Comp 2 */
724
- { 0x00001380, 0x0000 }, /* R4992 (0x1380) - FRF Coefficient 1L 1 */
725
- { 0x00001381, 0x0000 }, /* R4993 (0x1381) - FRF Coefficient 1L 2 */
726
- { 0x00001382, 0x0000 }, /* R4994 (0x1382) - FRF Coefficient 1L 3 */
727
- { 0x00001383, 0x0000 }, /* R4995 (0x1383) - FRF Coefficient 1L 4 */
728
- { 0x00001390, 0x0000 }, /* R5008 (0x1390) - FRF Coefficient 1R 1 */
729
- { 0x00001391, 0x0000 }, /* R5009 (0x1391) - FRF Coefficient 1R 2 */
730
- { 0x00001392, 0x0000 }, /* R5010 (0x1392) - FRF Coefficient 1R 3 */
731
- { 0x00001393, 0x0000 }, /* R5011 (0x1393) - FRF Coefficient 1R 4 */
732
- { 0x000013a0, 0x0000 }, /* R5024 (0x13a0) - FRF Coefficient 4L 1 */
733
- { 0x000013a1, 0x0000 }, /* R5025 (0x13a1) - FRF Coefficient 4L 2 */
734
- { 0x000013a2, 0x0000 }, /* R5026 (0x13a2) - FRF Coefficient 4L 3 */
735
- { 0x000013a3, 0x0000 }, /* R5027 (0x13a3) - FRF Coefficient 4L 4 */
736
- { 0x000013b0, 0x0000 }, /* R5040 (0x13b0) - FRF Coefficient 5L 1 */
737
- { 0x000013b1, 0x0000 }, /* R5041 (0x13b1) - FRF Coefficient 5L 2 */
738
- { 0x000013b2, 0x0000 }, /* R5042 (0x13b2) - FRF Coefficient 5L 3 */
739
- { 0x000013b3, 0x0000 }, /* R5043 (0x13b3) - FRF Coefficient 5L 4 */
740
- { 0x000013c0, 0x0000 }, /* R5040 (0x13c0) - FRF Coefficient 5R 1 */
741
- { 0x000013c1, 0x0000 }, /* R5041 (0x13c1) - FRF Coefficient 5R 2 */
742
- { 0x000013c2, 0x0000 }, /* R5042 (0x13c2) - FRF Coefficient 5R 3 */
743
- { 0x000013c3, 0x0000 }, /* R5043 (0x13c3) - FRF Coefficient 5R 4 */
744715 { 0x00001700, 0x2001 }, /* R5888 (0x1700) - GPIO1 Control 1 */
745716 { 0x00001701, 0xf000 }, /* R5889 (0x1701) - GPIO1 Control 2 */
746717 { 0x00001702, 0x2001 }, /* R5890 (0x1702) - GPIO2 Control 1 */
....@@ -891,7 +862,6 @@
891862 case MADERA_FLL1_CONTROL_6:
892863 case MADERA_FLL1_CONTROL_7:
893864 case MADERA_FLL1_EFS_2:
894
- case MADERA_FLL1_LOOP_FILTER_TEST_1:
895865 case CS47L35_FLL1_SYNCHRONISER_1:
896866 case CS47L35_FLL1_SYNCHRONISER_2:
897867 case CS47L35_FLL1_SYNCHRONISER_3:
....@@ -966,10 +936,8 @@
966936 case MADERA_OUTPUT_PATH_CONFIG_5R:
967937 case MADERA_DAC_DIGITAL_VOLUME_5R:
968938 case MADERA_NOISE_GATE_SELECT_5R:
969
- case MADERA_DRE_ENABLE:
970
- case MADERA_EDRE_ENABLE:
971
- case MADERA_EDRE_MANUAL:
972939 case MADERA_DAC_AEC_CONTROL_1:
940
+ case MADERA_DAC_AEC_CONTROL_2:
973941 case MADERA_NOISE_GATE_CONTROL:
974942 case MADERA_PDM_SPK1_CTRL_1:
975943 case MADERA_PDM_SPK1_CTRL_2:
....@@ -1437,28 +1405,6 @@
14371405 case MADERA_ISRC_2_CTRL_1:
14381406 case MADERA_ISRC_2_CTRL_2:
14391407 case MADERA_ISRC_2_CTRL_3:
1440
- case MADERA_DAC_COMP_1:
1441
- case MADERA_DAC_COMP_2:
1442
- case MADERA_FRF_COEFFICIENT_1L_1:
1443
- case MADERA_FRF_COEFFICIENT_1L_2:
1444
- case MADERA_FRF_COEFFICIENT_1L_3:
1445
- case MADERA_FRF_COEFFICIENT_1L_4:
1446
- case MADERA_FRF_COEFFICIENT_1R_1:
1447
- case MADERA_FRF_COEFFICIENT_1R_2:
1448
- case MADERA_FRF_COEFFICIENT_1R_3:
1449
- case MADERA_FRF_COEFFICIENT_1R_4:
1450
- case CS47L35_FRF_COEFFICIENT_4L_1:
1451
- case CS47L35_FRF_COEFFICIENT_4L_2:
1452
- case CS47L35_FRF_COEFFICIENT_4L_3:
1453
- case CS47L35_FRF_COEFFICIENT_4L_4:
1454
- case CS47L35_FRF_COEFFICIENT_5L_1:
1455
- case CS47L35_FRF_COEFFICIENT_5L_2:
1456
- case CS47L35_FRF_COEFFICIENT_5L_3:
1457
- case CS47L35_FRF_COEFFICIENT_5L_4:
1458
- case CS47L35_FRF_COEFFICIENT_5R_1:
1459
- case CS47L35_FRF_COEFFICIENT_5R_2:
1460
- case CS47L35_FRF_COEFFICIENT_5R_3:
1461
- case CS47L35_FRF_COEFFICIENT_5R_4:
14621408 case MADERA_GPIO1_CTRL_1 ... MADERA_GPIO16_CTRL_2:
14631409 case MADERA_IRQ1_STATUS_1 ... MADERA_IRQ1_STATUS_33:
14641410 case MADERA_IRQ1_MASK_1 ... MADERA_IRQ1_MASK_33: