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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/drivers/media/i2c/nvp6158_drv/nvp6158_video_auto_detect.h
....@@ -24,9 +24,9 @@
2424 	CH2,
2525 	CH3,
2626 	CH4
27
-}CH_NUM;
27
+} CH_NUM;
2828 
29
-typedef struct _video_input_vafe{
29
+typedef struct _video_input_vafe {
3030 	unsigned char powerdown;		//B0       0x00/1/2/3 [0]
3131 	unsigned char gain;			//B0       0x00/1/2/3 [4]
3232 	unsigned char spd;				//B5/6/7/8 0x00       [5:4]
....@@ -52,9 +52,9 @@
5252 	unsigned char clk_sel;			//B5/6/7/8 0x5C       [3]
5353 	unsigned char eq_gainsel;		//B5/6/7/8 0x5C       [2:0]
5454 
55
-}video_input_vafe;
55
+} video_input_vafe;
5656 
57
-typedef struct _video_input_auto_detect{
57
+typedef struct _video_input_auto_detect {
5858 	unsigned char ch;
5959 	unsigned char devnum;
6060 
....@@ -76,37 +76,37 @@
7676 
7777 	unsigned char novid_det;		//B0		0x23/0x27/0x2B/0x2F
7878 	video_input_vafe vafe;
79
-}video_input_auto_detect;
79
+} video_input_auto_detect;
8080 
81
-typedef struct _video_input_novid{
81
+typedef struct _video_input_novid {
8282 	unsigned char ch;
8383 	unsigned char novid; 				//B0 0xa8 [3:0]  MSB 1Ch ~ LSB 4Ch
8484 	unsigned char devnum;
85
-}video_input_novid;
85
+} video_input_novid;
8686 
87
-typedef struct _video_input_vfc{
87
+typedef struct _video_input_vfc {
8888 	unsigned char ch;
8989 	unsigned char vfc;				//B5/6/7/8 0xf0
9090 	unsigned char devnum;
91
-}video_input_vfc;
91
+} video_input_vfc;
9292 
93
-typedef struct _video_input_onvid_set{
93
+typedef struct _video_input_onvid_set {
9494 	unsigned char ch;
9595 	unsigned char auto_gnos_mode;		//B5/6/7/8 0x82
9696 	unsigned char auto_sync_mode;		//B5/6/7/8 0x83
9797 	unsigned char op_md;				//B5/6/7/8 0xB8
98
-}video_input_onvid_set;
98
+} video_input_onvid_set;
9999 
100
-typedef struct _video_input_onvid_set_2{
100
+typedef struct _video_input_onvid_set_2 {
101101 	unsigned char ch;
102102 	unsigned char dfe_ref_sel;			//B5/6/7/8 0x76
103103 	unsigned char wpd_77;				//B5/6/7/8 0x77
104104 	unsigned char wpd_78;				//B5/6/7/8 0x78
105105 	unsigned char wpd_79;				//B5/6/7/8 0x79
106106 	unsigned char slice_mode;			//B5/6/7/8 0x0E
107
-}video_input_onvid_set_2;
107
+} video_input_onvid_set_2;
108108 
109
-typedef struct _video_input_novid_set{
109
+typedef struct _video_input_novid_set {
110110 	unsigned char ch;
111111 	unsigned char devnum;
112112 	unsigned char control_mode;
....@@ -119,17 +119,17 @@
119119 	unsigned char wpd_78;				//B5/6/7/8 0x78
120120 	unsigned char wpd_79;				//B5/6/7/8 0x79
121121 	unsigned char slice_mode;			//B5/6/7/8 0x0E
122
-}video_input_novid_set;
122
+} video_input_novid_set;
123123 
124
-typedef struct _video_input_cable_dist{	
124
+typedef struct _video_input_cable_dist {	
125125 	unsigned char ch;
126126 	unsigned char devnum;
127127 	unsigned char dist;				// B13 0xA0
128128 	unsigned char FmtDef;
129129 	unsigned char cabletype;			// 0:coax, 1:utp, 2:reserved1, 3:reserved2
130
-}video_input_cable_dist;
130
+} video_input_cable_dist;
131131 
132
-typedef struct _video_input_sam_val{
132
+typedef struct _video_input_sam_val {
133133 	unsigned char ch;
134134 	unsigned char devnum;
135135 	/*
....@@ -137,28 +137,28 @@
137137 	unsigned char sam_val_2;		// B13 0xCC [9:8]
138138 	*/
139139 	unsigned int  sam_val;
140
-}video_input_sam_val;
140
+} video_input_sam_val;
141141 
142
-typedef struct _video_input_hsync_accum{
142
+typedef struct _video_input_hsync_accum {
143143 	unsigned char ch;
144144 	unsigned char devnum;
145145 	unsigned char h_lock;				// Bank 0 0xE2 [3:0] [Ch3:Ch0]
146146 	unsigned int  hsync_accum_val1;		// Value 1  			// 170210 Add
147147 	unsigned int  hsync_accum_val2;		// Value 2				// 170210 Add
148148 	unsigned int  hsync_accum_result;	// Value 1 - Value 2	// 170210 Fix
149
-}video_input_hsync_accum;
149
+} video_input_hsync_accum;
150150 
151
-typedef struct _video_input_agc_val{
151
+typedef struct _video_input_agc_val {
152152 	unsigned char ch;
153153 	unsigned char devnum;
154154 	unsigned char agc_lock;
155155 	unsigned char agc_val;			// B13 0xB8
156
-}video_input_agc_val;
156
+} video_input_agc_val;
157157 
158158 typedef struct _video_input_format_set_done { // [add] 170209 format set done
159159 	unsigned char ch;
160160 	unsigned char set_val;		// B13 0x70 [3:0] each channel
161
-}video_input_format_set_done;
161
+} video_input_format_set_done;
162162 
163163 typedef struct _video_input_fsc_val {
164164 	unsigned char ch;
....@@ -166,66 +166,66 @@
166166 	unsigned int fsc_val1;
167167 	unsigned int fsc_val2;
168168 	unsigned int fsc_final;
169
-}video_input_fsc_val;
169
+} video_input_fsc_val;
170170 
171
-typedef struct _video_input_aeq_set{ // 170214 AEQ Set
171
+typedef struct _video_input_aeq_set { // 170214 AEQ Set
172172 	unsigned char ch;
173173 	unsigned char aeq_val;				//B5/6/7/8 0x58       [7:4]
174
-}video_input_aeq_set;
174
+} video_input_aeq_set;
175175 
176
-typedef struct _video_input_deq_set{ // 170214 DEQ Set
176
+typedef struct _video_input_deq_set { // 170214 DEQ Set
177177 	unsigned char ch;
178178 	unsigned char deq_val;				// B9 0x80/0xA0/0xC0/0xE0 [3:0]
179
-}video_input_deq_set;
179
+} video_input_deq_set;
180180 
181
-typedef struct _video_input_vfc_set{	// 170215 VFC Setting Enable  (temp)
181
+typedef struct _video_input_vfc_set {	// 170215 VFC Setting Enable  (temp)
182182 	unsigned char ch;
183183 	unsigned char set_val;
184
-}video_input_vfc_set;
184
+} video_input_vfc_set;
185185 
186186 
187
-typedef struct _video_input_acc_gain_val{	// 170215 acc gain value read
187
+typedef struct _video_input_acc_gain_val {	// 170215 acc gain value read
188188 	unsigned char ch;
189189 	unsigned char devnum;
190190 	unsigned int acc_gain_val;
191191 	unsigned char func_sel;
192
-}video_input_acc_gain_val;
192
+} video_input_acc_gain_val;
193193 
194
-typedef struct _video_input_sleep_time_val{	// 170215 acc gain value read
194
+typedef struct _video_input_sleep_time_val {	// 170215 acc gain value read
195195 	unsigned char sleep_val;
196
-}video_input_sleep_time_val;
196
+} video_input_sleep_time_val;
197197 
198
-typedef struct _video_input_agc_reset_val{	// 170221 agc init
198
+typedef struct _video_input_agc_reset_val {	// 170221 agc init
199199 	unsigned char ch;
200200 	unsigned char reset_val;
201
-}video_input_agc_reset_val;
201
+} video_input_agc_reset_val;
202202 
203
-typedef struct _video_output_data_out_mode{
203
+typedef struct _video_output_data_out_mode {
204204 	unsigned char ch;
205205 	unsigned char devnum;
206206 	unsigned char set_val;
207
-}video_output_data_out_mode;
207
+} video_output_data_out_mode;
208208 
209
-typedef struct _video_input_manual_mode{
209
+typedef struct _video_input_manual_mode {
210210 	unsigned char ch;
211211 	unsigned char dev_num;
212
-}video_input_manual_mode;
212
+} video_input_manual_mode;
213213 
214
-typedef struct _video_input_onvideo_check_s{
214
+typedef struct _video_input_onvideo_check_s {
215215 	unsigned char vfc;
216216 	unsigned char sw_rst_ret;
217217 	decoder_dev_ch_info_s info;
218
-}video_input_onvideo_check_s;
218
+} video_input_onvideo_check_s;
219219 
220220 
221221 void nvp6158_video_input_auto_detect_set(video_input_auto_detect *vin_auto_det);
222222 void nvp6158_video_input_vfc_read(video_input_vfc *vin_vfc);
223223 void nvp6158_video_input_novid_read(video_input_novid *vin_novid); // 170204 novid
224224 void nvp6158_video_input_no_video_set(video_input_novid *auto_novid); // 170206 novideo set 
225
-void nvp6158_video_input_cable_dist_read(video_input_cable_dist *vin_cable_dist);	// 170207 Cable Distance 
226
-void nvp6158_video_input_sam_val_read(video_input_sam_val *vin_sam_val ); 	// 170207 SAM Value 
227
-void nvp6158_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum );	// 170207 Hsync Accumulation 
228
-void nvp6158_video_input_agc_val_read(video_input_agc_val *vin_agc_val); 	// 170207 AGC Value 
225
+void nvp6158_video_input_cable_dist_read(video_input_cable_dist *vin_cable_dist);	// 170207 Cable Distance
226
+void nvp6158_video_input_sam_val_read(video_input_sam_val *vin_sam_val ); 	// 170207 SAM Value
227
+void nvp6158_video_input_hsync_accum_read(video_input_hsync_accum *vin_hsync_accum );	// 170207 Hsync Accumulation
228
+void nvp6158_video_input_agc_val_read(video_input_agc_val *vin_agc_val); 	// 170207 AGC Value
229229 void nvp6158_video_input_fsc_val_read(video_input_fsc_val *vin_fsc_val); // 170214 fsc value read
230230 void nvp6158_video_input_aeq_val_set(video_input_aeq_set *vin_aeq_val); // 170214 aeq value set
231231 void nvp6158_video_input_deq_val_set(video_input_deq_set *vin_deq_val); // 170214 deq value set