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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/drivers/media/i2c/imx274.c
....@@ -1,3 +1,4 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23  * imx274.c - IMX274 CMOS Image Sensor driver
34  *
....@@ -6,18 +7,6 @@
67  * Leon Luo <leonl@leopardimaging.com>
78  * Edwin Zou <edwinz@leopardimaging.com>
89  * Luca Ceresoli <luca@lucaceresoli.net>
9
- *
10
- * This program is free software; you can redistribute it and/or modify it
11
- * under the terms and conditions of the GNU General Public License,
12
- * version 2, as published by the Free Software Foundation.
13
- *
14
- * This program is distributed in the hope it will be useful, but WITHOUT
15
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
17
- * more details.
18
- *
19
- * You should have received a copy of the GNU General Public License
20
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
2110  */
2211 
2312 #include <linux/clk.h>
....@@ -76,7 +65,7 @@
7665  */
7766 #define IMX274_MIN_EXPOSURE_TIME		(4 * 260 / 72)
7867 
79
-#define IMX274_DEFAULT_MODE			IMX274_BINNING_OFF
68
+#define IMX274_DEFAULT_BINNING			IMX274_BINNING_OFF
8069 #define IMX274_MAX_WIDTH			(3840)
8170 #define IMX274_MAX_HEIGHT			(2160)
8271 #define IMX274_MAX_FRAME_RATE			(120)
....@@ -178,7 +167,7 @@
178167  * @nocpiop: Number of clocks per internal offset period (see "Integration Time
179168  *           in Each Readout Drive Mode (CSI-2)" in the datasheet)
180169  */
181
-struct imx274_frmfmt {
170
+struct imx274_mode {
182171 	const struct reg_8 *init_regs;
183172 	unsigned int bin_ratio;
184173 	int min_frame_len;
....@@ -218,8 +207,8 @@
218207 	"Vertical Stripe (555h / 000h)",
219208 	"Vertical Stripe (000h / FFFh)",
220209 	"Vertical Stripe (FFFh / 000h)",
221
-	"Horizontal Color Bars",
222210 	"Vertical Color Bars",
211
+	"Horizontal Color Bars",
223212 };
224213 
225214 /*
....@@ -349,20 +338,14 @@
349338  */
350339 static const struct reg_8 imx274_start_1[] = {
351340 	{IMX274_STANDBY_REG, 0x12},
352
-	{IMX274_TABLE_END, 0x00}
353
-};
354341 
355
-/*
356
- * imx274 second step register configuration for
357
- * starting stream
358
- */
359
-static const struct reg_8 imx274_start_2[] = {
360
-	{0x3120, 0xF0}, /* clock settings */
361
-	{0x3121, 0x00}, /* clock settings */
362
-	{0x3122, 0x02}, /* clock settings */
363
-	{0x3129, 0x9C}, /* clock settings */
364
-	{0x312A, 0x02}, /* clock settings */
365
-	{0x312D, 0x02}, /* clock settings */
342
+	/* PLRD: clock settings */
343
+	{0x3120, 0xF0},
344
+	{0x3121, 0x00},
345
+	{0x3122, 0x02},
346
+	{0x3129, 0x9C},
347
+	{0x312A, 0x02},
348
+	{0x312D, 0x02},
366349 
367350 	{0x310B, 0x00},
368351 
....@@ -407,27 +390,27 @@
407390 };
408391 
409392 /*
410
- * imx274 third step register configuration for
393
+ * imx274 second step register configuration for
411394  * starting stream
412395  */
413
-static const struct reg_8 imx274_start_3[] = {
396
+static const struct reg_8 imx274_start_2[] = {
414397 	{IMX274_STANDBY_REG, 0x00},
415398 	{0x303E, 0x02}, /* SYS_MODE = 2 */
416399 	{IMX274_TABLE_END, 0x00}
417400 };
418401 
419402 /*
420
- * imx274 forth step register configuration for
403
+ * imx274 third step register configuration for
421404  * starting stream
422405  */
423
-static const struct reg_8 imx274_start_4[] = {
406
+static const struct reg_8 imx274_start_3[] = {
424407 	{0x30F4, 0x00},
425
-	{0x3018, 0xA2}, /* XHS VHS OUTUPT */
408
+	{0x3018, 0xA2}, /* XHS VHS OUTPUT */
426409 	{IMX274_TABLE_END, 0x00}
427410 };
428411 
429412 /*
430
- * imx274 register configuration for stoping stream
413
+ * imx274 register configuration for stopping stream
431414  */
432415 static const struct reg_8 imx274_stop[] = {
433416 	{IMX274_STANDBY_REG, 0x01},
....@@ -459,7 +442,7 @@
459442 };
460443 
461444 /* nocpiop happens to be the same number for the implemented modes */
462
-static const struct imx274_frmfmt imx274_formats[] = {
445
+static const struct imx274_mode imx274_modes[] = {
463446 	{
464447 		/* mode 1, 4K */
465448 		.bin_ratio = 1,
....@@ -532,7 +515,7 @@
532515 	struct regmap *regmap;
533516 	struct gpio_desc *reset_gpio;
534517 	struct mutex lock; /* mutex lock for operations */
535
-	const struct imx274_frmfmt *mode;
518
+	const struct imx274_mode *mode;
536519 };
537520 
538521 #define IMX274_ROUND(dim, step, flags)			\
....@@ -634,24 +617,6 @@
634617 	return 0;
635618 }
636619 
637
-static inline int imx274_read_reg(struct stimx274 *priv, u16 addr, u8 *val)
638
-{
639
-	unsigned int uint_val;
640
-	int err;
641
-
642
-	err = regmap_read(priv->regmap, addr, &uint_val);
643
-	if (err)
644
-		dev_err(&priv->client->dev,
645
-			"%s : i2c read failed, addr = %x\n", __func__, addr);
646
-	else
647
-		dev_dbg(&priv->client->dev,
648
-			"%s : addr 0x%x, val=0x%x\n", __func__,
649
-			addr, uint_val);
650
-
651
-	*val = uint_val;
652
-	return err;
653
-}
654
-
655620 static inline int imx274_write_reg(struct stimx274 *priv, u16 addr, u8 val)
656621 {
657622 	int err;
....@@ -669,6 +634,41 @@
669634 }
670635 
671636 /**
637
+ * Read a multibyte register.
638
+ *
639
+ * Uses a bulk read where possible.
640
+ *
641
+ * @priv: Pointer to device structure
642
+ * @addr: Address of the LSB register.  Other registers must be
643
+ *        consecutive, least-to-most significant.
644
+ * @val: Pointer to store the register value (cpu endianness)
645
+ * @nbytes: Number of bytes to read (range: [1..3]).
646
+ *          Other bytes are zet to 0.
647
+ *
648
+ * Return: 0 on success, errors otherwise
649
+ */
650
+static int imx274_read_mbreg(struct stimx274 *priv, u16 addr, u32 *val,
651
+			     size_t nbytes)
652
+{
653
+	__le32 val_le = 0;
654
+	int err;
655
+
656
+	err = regmap_bulk_read(priv->regmap, addr, &val_le, nbytes);
657
+	if (err) {
658
+		dev_err(&priv->client->dev,
659
+			"%s : i2c bulk read failed, %x (%zu bytes)\n",
660
+			__func__, addr, nbytes);
661
+	} else {
662
+		*val = le32_to_cpu(val_le);
663
+		dev_dbg(&priv->client->dev,
664
+			"%s : addr 0x%x, val=0x%x (%zu bytes)\n",
665
+			__func__, addr, *val, nbytes);
666
+	}
667
+
668
+	return err;
669
+}
670
+
671
+/**
672672  * Write a multibyte register.
673673  *
674674  * Uses a bulk write where possible.
....@@ -677,7 +677,7 @@
677677  * @addr: Address of the LSB register.  Other registers must be
678678  *        consecutive, least-to-most significant.
679679  * @val: Value to be written to the register (cpu endianness)
680
- * @nbytes: Number of bits to write (range: [1..3])
680
+ * @nbytes: Number of bytes to write (range: [1..3])
681681  */
682682 static int imx274_write_mbreg(struct stimx274 *priv, u16 addr, u32 val,
683683 			      size_t nbytes)
....@@ -711,10 +711,6 @@
711711 	if (err)
712712 		return err;
713713 
714
-	err = imx274_write_table(priv, imx274_start_2);
715
-	if (err)
716
-		return err;
717
-
718714 	err = imx274_write_table(priv, priv->mode->init_regs);
719715 
720716 	return err;
....@@ -736,7 +732,7 @@
736732 	 * give it 1 extra ms for margin
737733 	 */
738734 	msleep_range(11);
739
-	err = imx274_write_table(priv, imx274_start_3);
735
+	err = imx274_write_table(priv, imx274_start_2);
740736 	if (err)
741737 		return err;
742738 
....@@ -746,7 +742,7 @@
746742 	 * give it 1 extra ms for margin
747743 	 */
748744 	msleep_range(8);
749
-	err = imx274_write_table(priv, imx274_start_4);
745
+	err = imx274_write_table(priv, imx274_start_3);
750746 	if (err)
751747 		return err;
752748 
....@@ -884,7 +880,7 @@
884880 	const struct v4l2_rect *cur_crop;
885881 	struct v4l2_mbus_framefmt *tgt_fmt;
886882 	unsigned int i;
887
-	const struct imx274_frmfmt *best_mode = &imx274_formats[0];
883
+	const struct imx274_mode *best_mode = &imx274_modes[0];
888884 	int best_goodness = INT_MIN;
889885 
890886 	if (which == V4L2_SUBDEV_FORMAT_TRY) {
....@@ -895,8 +891,8 @@
895891 		tgt_fmt = &imx274->format;
896892 	}
897893 
898
-	for (i = 0; i < ARRAY_SIZE(imx274_formats); i++) {
899
-		unsigned int ratio = imx274_formats[i].bin_ratio;
894
+	for (i = 0; i < ARRAY_SIZE(imx274_modes); i++) {
895
+		unsigned int ratio = imx274_modes[i].bin_ratio;
900896 
901897 		int goodness = imx274_binning_goodness(
902898 			imx274,
....@@ -906,7 +902,7 @@
906902 
907903 		if (goodness >= best_goodness) {
908904 			best_goodness = goodness;
909
-			best_mode = &imx274_formats[i];
905
+			best_mode = &imx274_modes[i];
910906 		}
911907 	}
912908 
....@@ -1328,7 +1324,7 @@
13281324 
13291325 	dev_dbg(&imx274->client->dev, "%s : %s, mode index = %td\n", __func__,
13301326 		on ? "Stream Start" : "Stream Stop",
1331
-		imx274->mode - &imx274_formats[0]);
1327
+		imx274->mode - &imx274_modes[0]);
13321328 
13331329 	mutex_lock(&imx274->lock);
13341330 
....@@ -1392,36 +1388,16 @@
13921388 static int imx274_get_frame_length(struct stimx274 *priv, u32 *val)
13931389 {
13941390 	int err;
1395
-	u16 svr;
1391
+	u32 svr;
13961392 	u32 vmax;
1397
-	u8 reg_val[3];
13981393 
1399
-	/* svr */
1400
-	err = imx274_read_reg(priv, IMX274_SVR_REG_LSB, &reg_val[0]);
1394
+	err = imx274_read_mbreg(priv, IMX274_SVR_REG_LSB, &svr, 2);
14011395 	if (err)
14021396 		goto fail;
14031397 
1404
-	err = imx274_read_reg(priv, IMX274_SVR_REG_MSB, &reg_val[1]);
1398
+	err = imx274_read_mbreg(priv, IMX274_VMAX_REG_3, &vmax, 3);
14051399 	if (err)
14061400 		goto fail;
1407
-
1408
-	svr = (reg_val[1] << IMX274_SHIFT_8_BITS) + reg_val[0];
1409
-
1410
-	/* vmax */
1411
-	err = imx274_read_reg(priv, IMX274_VMAX_REG_3, &reg_val[0]);
1412
-	if (err)
1413
-		goto fail;
1414
-
1415
-	err = imx274_read_reg(priv, IMX274_VMAX_REG_2, &reg_val[1]);
1416
-	if (err)
1417
-		goto fail;
1418
-
1419
-	err = imx274_read_reg(priv, IMX274_VMAX_REG_1, &reg_val[2]);
1420
-	if (err)
1421
-		goto fail;
1422
-
1423
-	vmax = ((reg_val[2] & IMX274_MASK_LSB_3_BITS) << IMX274_SHIFT_16_BITS)
1424
-		+ (reg_val[1] << IMX274_SHIFT_8_BITS) + reg_val[0];
14251401 
14261402 	*val = vmax * (svr + 1);
14271403 
....@@ -1603,8 +1579,7 @@
16031579 static int imx274_set_exposure(struct stimx274 *priv, int val)
16041580 {
16051581 	int err;
1606
-	u16 hmax;
1607
-	u8 reg_val[2];
1582
+	u32 hmax;
16081583 	u32 coarse_time; /* exposure time in unit of line (HMAX)*/
16091584 
16101585 	dev_dbg(&priv->client->dev,
....@@ -1612,14 +1587,10 @@
16121587 
16131588 	/* step 1: convert input exposure_time (val) into number of 1[HMAX] */
16141589 
1615
-	/* obtain HMAX value */
1616
-	err = imx274_read_reg(priv, IMX274_HMAX_REG_LSB, &reg_val[0]);
1590
+	err = imx274_read_mbreg(priv, IMX274_HMAX_REG_LSB, &hmax, 2);
16171591 	if (err)
16181592 		goto fail;
1619
-	err = imx274_read_reg(priv, IMX274_HMAX_REG_MSB, &reg_val[1]);
1620
-	if (err)
1621
-		goto fail;
1622
-	hmax = (reg_val[1] << IMX274_SHIFT_8_BITS) + reg_val[0];
1593
+
16231594 	if (hmax == 0) {
16241595 		err = -EINVAL;
16251596 		goto fail;
....@@ -1754,9 +1725,8 @@
17541725 {
17551726 	int err;
17561727 	u32 frame_length, req_frame_rate;
1757
-	u16 svr;
1758
-	u16 hmax;
1759
-	u8 reg_val[2];
1728
+	u32 svr;
1729
+	u32 hmax;
17601730 
17611731 	dev_dbg(&priv->client->dev, "%s: input frame interval = %d / %d",
17621732 		__func__, frame_interval.numerator,
....@@ -1784,25 +1754,17 @@
17841754 	 * frame_length (i.e. VMAX) = (frame_interval) x 72M /(SVR+1) / HMAX
17851755 	 */
17861756 
1787
-	/* SVR */
1788
-	err = imx274_read_reg(priv, IMX274_SVR_REG_LSB, &reg_val[0]);
1757
+	err = imx274_read_mbreg(priv, IMX274_SVR_REG_LSB, &svr, 2);
17891758 	if (err)
17901759 		goto fail;
1791
-	err = imx274_read_reg(priv, IMX274_SVR_REG_MSB, &reg_val[1]);
1792
-	if (err)
1793
-		goto fail;
1794
-	svr = (reg_val[1] << IMX274_SHIFT_8_BITS) + reg_val[0];
1760
+
17951761 	dev_dbg(&priv->client->dev,
17961762 		"%s : register SVR = %d\n", __func__, svr);
17971763 
1798
-	/* HMAX */
1799
-	err = imx274_read_reg(priv, IMX274_HMAX_REG_LSB, &reg_val[0]);
1764
+	err = imx274_read_mbreg(priv, IMX274_HMAX_REG_LSB, &hmax, 2);
18001765 	if (err)
18011766 		goto fail;
1802
-	err = imx274_read_reg(priv, IMX274_HMAX_REG_MSB, &reg_val[1]);
1803
-	if (err)
1804
-		goto fail;
1805
-	hmax = (reg_val[1] << IMX274_SHIFT_8_BITS) + reg_val[0];
1767
+
18061768 	dev_dbg(&priv->client->dev,
18071769 		"%s : register HMAX = %d\n", __func__, hmax);
18081770 
....@@ -1861,8 +1823,7 @@
18611823 };
18621824 MODULE_DEVICE_TABLE(i2c, imx274_id);
18631825 
1864
-static int imx274_probe(struct i2c_client *client,
1865
-			const struct i2c_device_id *id)
1826
+static int imx274_probe(struct i2c_client *client)
18661827 {
18671828 	struct v4l2_subdev *sd;
18681829 	struct stimx274 *imx274;
....@@ -1876,7 +1837,7 @@
18761837 	mutex_init(&imx274->lock);
18771838 
18781839 	/* initialize format */
1879
-	imx274->mode = &imx274_formats[IMX274_DEFAULT_MODE];
1840
+	imx274->mode = &imx274_modes[IMX274_DEFAULT_BINNING];
18801841 	imx274->crop.width = IMX274_MAX_WIDTH;
18811842 	imx274->crop.height = IMX274_MAX_HEIGHT;
18821843 	imx274->format.width = imx274->crop.width / imx274->mode->bin_ratio;
....@@ -1900,7 +1861,6 @@
19001861 	imx274->client = client;
19011862 	sd = &imx274->sd;
19021863 	v4l2_i2c_subdev_init(sd, client, &imx274_subdev_ops);
1903
-	strlcpy(sd->name, DRIVER_NAME, sizeof(sd->name));
19041864 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
19051865 
19061866 	/* initialize subdev media pad */
....@@ -1927,7 +1887,7 @@
19271887 	imx274_reset(imx274, 1);
19281888 
19291889 	/* initialize controls */
1930
-	ret = v4l2_ctrl_handler_init(&imx274->ctrls.handler, 2);
1890
+	ret = v4l2_ctrl_handler_init(&imx274->ctrls.handler, 4);
19311891 	if (ret < 0) {
19321892 		dev_err(&client->dev,
19331893 			"%s : ctrl handler init Failed\n", __func__);
....@@ -2025,7 +1985,7 @@
20251985 		.name	= DRIVER_NAME,
20261986 		.of_match_table	= imx274_of_id_table,
20271987 	},
2028
-	.probe		= imx274_probe,
1988
+	.probe_new	= imx274_probe,
20291989 	.remove		= imx274_remove,
20301990 	.id_table	= imx274_id,
20311991 };