modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/infiniband/hw/hns/hns_roce_common.h
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@@ -33,10 +33,6 @@
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 #ifndef _HNS_ROCE_COMMON_H
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 #define _HNS_ROCE_COMMON_H
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-#ifndef assert
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-#define assert(cond)
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-#endif
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-
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 #define roce_write(dev, reg, val)	writel((val), (dev)->reg_base + (reg))
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 #define roce_read(dev, reg)		readl((dev)->reg_base + (reg))
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 #define roce_raw_write(value, addr) \
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@@ -56,32 +52,6 @@
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 #define roce_set_bit(origin, shift, val) \
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 	roce_set_field((origin), (1ul << (shift)), (shift), (val))
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-
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-/*
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- * roce_hw_index_cmp_lt - Compare two hardware index values in hisilicon
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- *                        SOC, check if a is less than b.
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- * @a: hardware index value
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- * @b: hardware index value
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- * @bits: the number of bits of a and b, range: 0~31.
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- *
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- * Hardware index increases continuously till max value, and then restart
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- * from zero, again and again. Because the bits of reg field is often
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- * limited, the reg field can only hold the low bits of the hardware index
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- * in hisilicon SOC.
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- * In some scenes we need to compare two values(a,b) getted from two reg
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- * fields in this driver, for example:
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- * If a equals 0xfffe, b equals 0x1 and bits equals 16, we think b has
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- * incresed from 0xffff to 0x1 and a is less than b.
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- * If a equals 0xfffe, b equals 0x0xf001 and bits equals 16, we think a
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- * is bigger than b.
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- *
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- * Return true on a less than b, otherwise false.
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- */
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-#define roce_hw_index_mask(bits)	((1ul << (bits)) - 1)
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-#define roce_hw_index_shift(bits)	(32 - (bits))
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-#define roce_hw_index_cmp_lt(a, b, bits) \
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-	((int)((((a) - (b)) & roce_hw_index_mask(bits)) << \
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-		roce_hw_index_shift(bits)) < 0)
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 #define ROCEE_GLB_CFG_ROCEE_DB_SQ_MODE_S 3
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 #define ROCEE_GLB_CFG_ROCEE_DB_OTH_MODE_S 4
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@@ -271,8 +241,6 @@
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 #define ROCEE_SDB_SEND_PTR_SDB_SEND_PTR_M   \
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 	(((1UL << 28) - 1) << ROCEE_SDB_SEND_PTR_SDB_SEND_PTR_S)
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-#define ROCEE_SDB_PTR_CMP_BITS 28
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-
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 #define ROCEE_SDB_INV_CNT_SDB_INV_CNT_S 0
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 #define ROCEE_SDB_INV_CNT_SDB_INV_CNT_M   \
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 	(((1UL << 16) - 1) << ROCEE_SDB_INV_CNT_SDB_INV_CNT_S)
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@@ -353,13 +321,8 @@
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 #define ROCEE_CAEP_AE_MASK_REG			0x6C8
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 #define ROCEE_CAEP_AE_ST_REG			0x6CC
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-#define ROCEE_SDB_ISSUE_PTR_REG			0x758
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-#define ROCEE_SDB_SEND_PTR_REG			0x75C
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 #define ROCEE_CAEP_CQE_WCMD_EMPTY		0x850
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 #define ROCEE_SCAEP_WR_CQE_CNT			0x8D0
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-#define ROCEE_SDB_INV_CNT_REG			0x9A4
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-#define ROCEE_SDB_RETRY_CNT_REG			0x9AC
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-#define ROCEE_TSP_BP_ST_REG			0x9EC
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 #define ROCEE_ECC_UCERR_ALM0_REG		0xB34
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 #define ROCEE_ECC_CERR_ALM0_REG			0xB40
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@@ -375,9 +338,6 @@
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 #define ROCEE_RX_CMQ_DEPTH_REG			0x07020
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 #define ROCEE_RX_CMQ_TAIL_REG			0x07024
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 #define ROCEE_RX_CMQ_HEAD_REG			0x07028
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-
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-#define ROCEE_VF_MB_CFG0_REG			0x40
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-#define ROCEE_VF_MB_STATUS_REG			0x58
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 #define ROCEE_VF_EQ_DB_CFG0_REG			0x238
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 #define ROCEE_VF_EQ_DB_CFG1_REG			0x23C