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| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
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1 | 2 | /* |
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2 | 3 | * Copyright (C) 2012 Invensense, Inc. |
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3 | | -* |
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4 | | -* This software is licensed under the terms of the GNU General Public |
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5 | | -* License version 2, as published by the Free Software Foundation, and |
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6 | | -* may be copied, distributed, and modified under those terms. |
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7 | | -* |
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8 | | -* This program is distributed in the hope that it will be useful, |
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9 | | -* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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10 | | -* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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11 | | -* GNU General Public License for more details. |
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12 | 4 | */ |
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| 5 | + |
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| 6 | +#ifndef INV_MPU_IIO_H_ |
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| 7 | +#define INV_MPU_IIO_H_ |
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| 8 | + |
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13 | 9 | #include <linux/i2c.h> |
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14 | 10 | #include <linux/i2c-mux.h> |
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15 | 11 | #include <linux/mutex.h> |
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.. | .. |
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79 | 75 | INV_MPU9250, |
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80 | 76 | INV_MPU9255, |
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81 | 77 | INV_ICM20608, |
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| 78 | + INV_ICM20609, |
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| 79 | + INV_ICM20689, |
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82 | 80 | INV_ICM20602, |
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| 81 | + INV_ICM20690, |
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| 82 | + INV_IAM20680, |
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83 | 83 | INV_NUM_PARTS |
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84 | 84 | }; |
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85 | 85 | |
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| 86 | +/* chip sensors mask: accelerometer, gyroscope, temperature, magnetometer */ |
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| 87 | +#define INV_MPU6050_SENSOR_ACCL BIT(0) |
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| 88 | +#define INV_MPU6050_SENSOR_GYRO BIT(1) |
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| 89 | +#define INV_MPU6050_SENSOR_TEMP BIT(2) |
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| 90 | +#define INV_MPU6050_SENSOR_MAGN BIT(3) |
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| 91 | + |
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86 | 92 | /** |
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87 | 93 | * struct inv_mpu6050_chip_config - Cached chip configuration data. |
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| 94 | + * @clk: selected chip clock |
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88 | 95 | * @fsr: Full scale range. |
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89 | 96 | * @lpf: Digital low pass filter frequency. |
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90 | 97 | * @accl_fs: accel full scale range. |
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| 98 | + * @accl_en: accel engine enabled |
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| 99 | + * @gyro_en: gyro engine enabled |
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| 100 | + * @temp_en: temperature sensor enabled |
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| 101 | + * @magn_en: magn engine (i2c master) enabled |
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91 | 102 | * @accl_fifo_enable: enable accel data output |
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92 | 103 | * @gyro_fifo_enable: enable gyro data output |
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| 104 | + * @temp_fifo_enable: enable temp data output |
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| 105 | + * @magn_fifo_enable: enable magn data output |
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93 | 106 | * @divider: chip sample rate divider (sample rate divider - 1) |
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94 | 107 | */ |
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95 | 108 | struct inv_mpu6050_chip_config { |
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| 109 | + unsigned int clk:3; |
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96 | 110 | unsigned int fsr:2; |
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97 | 111 | unsigned int lpf:3; |
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98 | 112 | unsigned int accl_fs:2; |
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| 113 | + unsigned int accl_en:1; |
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| 114 | + unsigned int gyro_en:1; |
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| 115 | + unsigned int temp_en:1; |
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| 116 | + unsigned int magn_en:1; |
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99 | 117 | unsigned int accl_fifo_enable:1; |
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100 | 118 | unsigned int gyro_fifo_enable:1; |
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| 119 | + unsigned int temp_fifo_enable:1; |
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| 120 | + unsigned int magn_fifo_enable:1; |
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101 | 121 | u8 divider; |
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102 | 122 | u8 user_ctrl; |
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103 | 123 | }; |
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| 124 | + |
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| 125 | +/* |
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| 126 | + * Maximum of 6 + 6 + 2 + 7 (for MPU9x50) = 21 round up to 24 and plus 8. |
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| 127 | + * May be less if fewer channels are enabled, as long as the timestamp |
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| 128 | + * remains 8 byte aligned |
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| 129 | + */ |
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| 130 | +#define INV_MPU6050_OUTPUT_DATA_SIZE 32 |
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104 | 131 | |
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105 | 132 | /** |
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106 | 133 | * struct inv_mpu6050_hw - Other important hardware information. |
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.. | .. |
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139 | 166 | * @chip_period: chip internal period estimation (~1kHz). |
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140 | 167 | * @it_timestamp: timestamp from previous interrupt. |
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141 | 168 | * @data_timestamp: timestamp for next data sample. |
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| 169 | + * @vdd_supply: VDD voltage regulator for the chip. |
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| 170 | + * @vddio_supply I/O voltage regulator for the chip. |
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| 171 | + * @magn_disabled: magnetometer disabled for backward compatibility reason. |
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| 172 | + * @magn_raw_to_gauss: coefficient to convert mag raw value to Gauss. |
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| 173 | + * @magn_orient: magnetometer sensor chip orientation if available. |
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| 174 | + * @suspended_sensors: sensors mask of sensors turned off for suspend |
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| 175 | + * @data: dma safe buffer used for bulk reads. |
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142 | 176 | */ |
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143 | 177 | struct inv_mpu6050_state { |
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144 | 178 | struct mutex lock; |
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.. | .. |
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149 | 183 | enum inv_devices chip_type; |
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150 | 184 | struct i2c_mux_core *muxc; |
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151 | 185 | struct i2c_client *mux_client; |
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152 | | - unsigned int powerup_count; |
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153 | 186 | struct inv_mpu6050_platform_data plat_data; |
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154 | 187 | struct iio_mount_matrix orientation; |
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155 | 188 | struct regmap *map; |
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.. | .. |
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159 | 192 | s64 chip_period; |
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160 | 193 | s64 it_timestamp; |
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161 | 194 | s64 data_timestamp; |
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| 195 | + struct regulator *vdd_supply; |
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| 196 | + struct regulator *vddio_supply; |
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| 197 | + bool magn_disabled; |
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| 198 | + s32 magn_raw_to_gauss[3]; |
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| 199 | + struct iio_mount_matrix magn_orient; |
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| 200 | + unsigned int suspended_sensors; |
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| 201 | + u8 data[INV_MPU6050_OUTPUT_DATA_SIZE] ____cacheline_aligned; |
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162 | 202 | }; |
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163 | 203 | |
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164 | 204 | /*register and associated bit definition*/ |
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.. | .. |
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171 | 211 | #define INV_MPU6050_REG_ACCEL_CONFIG 0x1C |
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172 | 212 | |
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173 | 213 | #define INV_MPU6050_REG_FIFO_EN 0x23 |
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| 214 | +#define INV_MPU6050_BIT_SLAVE_0 0x01 |
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| 215 | +#define INV_MPU6050_BIT_SLAVE_1 0x02 |
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| 216 | +#define INV_MPU6050_BIT_SLAVE_2 0x04 |
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174 | 217 | #define INV_MPU6050_BIT_ACCEL_OUT 0x08 |
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175 | 218 | #define INV_MPU6050_BITS_GYRO_OUT 0x70 |
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| 219 | +#define INV_MPU6050_BIT_TEMP_OUT 0x80 |
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| 220 | + |
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| 221 | +#define INV_MPU6050_REG_I2C_MST_CTRL 0x24 |
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| 222 | +#define INV_MPU6050_BITS_I2C_MST_CLK_400KHZ 0x0D |
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| 223 | +#define INV_MPU6050_BIT_I2C_MST_P_NSR 0x10 |
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| 224 | +#define INV_MPU6050_BIT_SLV3_FIFO_EN 0x20 |
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| 225 | +#define INV_MPU6050_BIT_WAIT_FOR_ES 0x40 |
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| 226 | +#define INV_MPU6050_BIT_MULT_MST_EN 0x80 |
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| 227 | + |
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| 228 | +/* control I2C slaves from 0 to 3 */ |
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| 229 | +#define INV_MPU6050_REG_I2C_SLV_ADDR(_x) (0x25 + 3 * (_x)) |
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| 230 | +#define INV_MPU6050_BIT_I2C_SLV_RNW 0x80 |
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| 231 | + |
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| 232 | +#define INV_MPU6050_REG_I2C_SLV_REG(_x) (0x26 + 3 * (_x)) |
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| 233 | + |
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| 234 | +#define INV_MPU6050_REG_I2C_SLV_CTRL(_x) (0x27 + 3 * (_x)) |
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| 235 | +#define INV_MPU6050_BIT_SLV_GRP 0x10 |
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| 236 | +#define INV_MPU6050_BIT_SLV_REG_DIS 0x20 |
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| 237 | +#define INV_MPU6050_BIT_SLV_BYTE_SW 0x40 |
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| 238 | +#define INV_MPU6050_BIT_SLV_EN 0x80 |
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| 239 | + |
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| 240 | +/* I2C master delay register */ |
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| 241 | +#define INV_MPU6050_REG_I2C_SLV4_CTRL 0x34 |
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| 242 | +#define INV_MPU6050_BITS_I2C_MST_DLY(_x) ((_x) & 0x1F) |
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| 243 | + |
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| 244 | +#define INV_MPU6050_REG_I2C_MST_STATUS 0x36 |
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| 245 | +#define INV_MPU6050_BIT_I2C_SLV0_NACK 0x01 |
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| 246 | +#define INV_MPU6050_BIT_I2C_SLV1_NACK 0x02 |
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| 247 | +#define INV_MPU6050_BIT_I2C_SLV2_NACK 0x04 |
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| 248 | +#define INV_MPU6050_BIT_I2C_SLV3_NACK 0x08 |
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176 | 249 | |
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177 | 250 | #define INV_MPU6050_REG_INT_ENABLE 0x38 |
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178 | 251 | #define INV_MPU6050_BIT_DATA_RDY_EN 0x01 |
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.. | .. |
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186 | 259 | #define INV_MPU6050_BIT_FIFO_OVERFLOW_INT 0x10 |
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187 | 260 | #define INV_MPU6050_BIT_RAW_DATA_RDY_INT 0x01 |
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188 | 261 | |
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| 262 | +#define INV_MPU6050_REG_EXT_SENS_DATA 0x49 |
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| 263 | + |
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| 264 | +/* I2C slaves data output from 0 to 3 */ |
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| 265 | +#define INV_MPU6050_REG_I2C_SLV_DO(_x) (0x63 + (_x)) |
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| 266 | + |
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| 267 | +#define INV_MPU6050_REG_I2C_MST_DELAY_CTRL 0x67 |
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| 268 | +#define INV_MPU6050_BIT_I2C_SLV0_DLY_EN 0x01 |
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| 269 | +#define INV_MPU6050_BIT_I2C_SLV1_DLY_EN 0x02 |
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| 270 | +#define INV_MPU6050_BIT_I2C_SLV2_DLY_EN 0x04 |
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| 271 | +#define INV_MPU6050_BIT_I2C_SLV3_DLY_EN 0x08 |
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| 272 | +#define INV_MPU6050_BIT_DELAY_ES_SHADOW 0x80 |
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| 273 | + |
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| 274 | +#define INV_MPU6050_REG_SIGNAL_PATH_RESET 0x68 |
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| 275 | +#define INV_MPU6050_BIT_TEMP_RST BIT(0) |
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| 276 | +#define INV_MPU6050_BIT_ACCEL_RST BIT(1) |
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| 277 | +#define INV_MPU6050_BIT_GYRO_RST BIT(2) |
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| 278 | + |
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189 | 279 | #define INV_MPU6050_REG_USER_CTRL 0x6A |
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| 280 | +#define INV_MPU6050_BIT_SIG_COND_RST 0x01 |
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190 | 281 | #define INV_MPU6050_BIT_FIFO_RST 0x04 |
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191 | 282 | #define INV_MPU6050_BIT_DMP_RST 0x08 |
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192 | 283 | #define INV_MPU6050_BIT_I2C_MST_EN 0x20 |
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.. | .. |
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197 | 288 | #define INV_MPU6050_REG_PWR_MGMT_1 0x6B |
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198 | 289 | #define INV_MPU6050_BIT_H_RESET 0x80 |
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199 | 290 | #define INV_MPU6050_BIT_SLEEP 0x40 |
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| 291 | +#define INV_MPU6050_BIT_TEMP_DIS 0x08 |
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200 | 292 | #define INV_MPU6050_BIT_CLK_MASK 0x7 |
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201 | 293 | |
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202 | 294 | #define INV_MPU6050_REG_PWR_MGMT_2 0x6C |
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213 | 305 | #define INV_MPU6050_BYTES_PER_3AXIS_SENSOR 6 |
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214 | 306 | #define INV_MPU6050_FIFO_COUNT_BYTE 2 |
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215 | 307 | |
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216 | | -/* ICM20602 FIFO samples include temperature readings */ |
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217 | | -#define INV_ICM20602_BYTES_PER_TEMP_SENSOR 2 |
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| 308 | +/* MPU9X50 9-axis magnetometer */ |
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| 309 | +#define INV_MPU9X50_BYTES_MAGN 7 |
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| 310 | + |
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| 311 | +/* FIFO temperature sample size */ |
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| 312 | +#define INV_MPU6050_BYTES_PER_TEMP_SENSOR 2 |
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218 | 313 | |
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219 | 314 | /* mpu6500 registers */ |
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220 | 315 | #define INV_MPU6500_REG_ACCEL_CONFIG_2 0x1D |
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| 316 | +#define INV_ICM20689_BITS_FIFO_SIZE_MAX 0xC0 |
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221 | 317 | #define INV_MPU6500_REG_ACCEL_OFFSET 0x77 |
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222 | 318 | |
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223 | 319 | /* delay time in milliseconds */ |
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224 | 320 | #define INV_MPU6050_POWER_UP_TIME 100 |
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225 | 321 | #define INV_MPU6050_TEMP_UP_TIME 100 |
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226 | | -#define INV_MPU6050_SENSOR_UP_TIME 30 |
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| 322 | +#define INV_MPU6050_ACCEL_UP_TIME 20 |
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| 323 | +#define INV_MPU6050_GYRO_UP_TIME 35 |
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| 324 | +#define INV_MPU6050_GYRO_DOWN_TIME 150 |
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| 325 | +#define INV_MPU6050_SUSPEND_DELAY_MS 2000 |
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227 | 326 | |
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228 | 327 | /* delay time in microseconds */ |
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229 | 328 | #define INV_MPU6050_REG_UP_TIME_MIN 5000 |
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235 | 334 | #define INV_MPU6050_MAX_ACCL_FS_PARAM 3 |
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236 | 335 | #define INV_MPU6050_THREE_AXIS 3 |
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237 | 336 | #define INV_MPU6050_GYRO_CONFIG_FSR_SHIFT 3 |
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| 337 | +#define INV_ICM20690_GYRO_CONFIG_FSR_SHIFT 2 |
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238 | 338 | #define INV_MPU6050_ACCL_CONFIG_FSR_SHIFT 3 |
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239 | 339 | |
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240 | 340 | #define INV_MPU6500_TEMP_OFFSET 7011 |
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242 | 342 | |
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243 | 343 | #define INV_ICM20608_TEMP_OFFSET 8170 |
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244 | 344 | #define INV_ICM20608_TEMP_SCALE 3059976 |
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245 | | - |
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246 | | -/* 6 + 6 round up and plus 8 */ |
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247 | | -#define INV_MPU6050_OUTPUT_DATA_SIZE 24 |
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248 | 345 | |
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249 | 346 | #define INV_MPU6050_REG_INT_PIN_CFG 0x37 |
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250 | 347 | #define INV_MPU6050_ACTIVE_HIGH 0x00 |
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257 | 354 | #define INV_MPU6050_TS_PERIOD_JITTER 4 |
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258 | 355 | |
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259 | 356 | /* init parameters */ |
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260 | | -#define INV_MPU6050_INIT_FIFO_RATE 50 |
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261 | 357 | #define INV_MPU6050_MAX_FIFO_RATE 1000 |
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262 | 358 | #define INV_MPU6050_MIN_FIFO_RATE 4 |
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263 | 359 | |
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.. | .. |
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282 | 378 | #define INV_MPU9255_WHOAMI_VALUE 0x73 |
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283 | 379 | #define INV_MPU6515_WHOAMI_VALUE 0x74 |
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284 | 380 | #define INV_ICM20608_WHOAMI_VALUE 0xAF |
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| 381 | +#define INV_ICM20609_WHOAMI_VALUE 0xA6 |
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| 382 | +#define INV_ICM20689_WHOAMI_VALUE 0x98 |
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285 | 383 | #define INV_ICM20602_WHOAMI_VALUE 0x12 |
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| 384 | +#define INV_ICM20690_WHOAMI_VALUE 0x20 |
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| 385 | +#define INV_IAM20680_WHOAMI_VALUE 0xA9 |
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286 | 386 | |
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287 | 387 | /* scan element definition for generic MPU6xxx devices */ |
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288 | 388 | enum inv_mpu6050_scan { |
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289 | 389 | INV_MPU6050_SCAN_ACCL_X, |
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290 | 390 | INV_MPU6050_SCAN_ACCL_Y, |
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291 | 391 | INV_MPU6050_SCAN_ACCL_Z, |
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| 392 | + INV_MPU6050_SCAN_TEMP, |
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292 | 393 | INV_MPU6050_SCAN_GYRO_X, |
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293 | 394 | INV_MPU6050_SCAN_GYRO_Y, |
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294 | 395 | INV_MPU6050_SCAN_GYRO_Z, |
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295 | 396 | INV_MPU6050_SCAN_TIMESTAMP, |
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296 | | -}; |
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297 | 397 | |
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298 | | -/* scan element definition for ICM20602, which includes temperature */ |
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299 | | -enum inv_icm20602_scan { |
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300 | | - INV_ICM20602_SCAN_ACCL_X, |
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301 | | - INV_ICM20602_SCAN_ACCL_Y, |
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302 | | - INV_ICM20602_SCAN_ACCL_Z, |
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303 | | - INV_ICM20602_SCAN_TEMP, |
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304 | | - INV_ICM20602_SCAN_GYRO_X, |
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305 | | - INV_ICM20602_SCAN_GYRO_Y, |
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306 | | - INV_ICM20602_SCAN_GYRO_Z, |
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307 | | - INV_ICM20602_SCAN_TIMESTAMP, |
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| 398 | + INV_MPU9X50_SCAN_MAGN_X = INV_MPU6050_SCAN_GYRO_Z + 1, |
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| 399 | + INV_MPU9X50_SCAN_MAGN_Y, |
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| 400 | + INV_MPU9X50_SCAN_MAGN_Z, |
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| 401 | + INV_MPU9X50_SCAN_TIMESTAMP, |
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308 | 402 | }; |
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309 | 403 | |
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310 | 404 | enum inv_mpu6050_filter_e { |
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311 | | - INV_MPU6050_FILTER_256HZ_NOLPF2 = 0, |
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312 | | - INV_MPU6050_FILTER_188HZ, |
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313 | | - INV_MPU6050_FILTER_98HZ, |
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314 | | - INV_MPU6050_FILTER_42HZ, |
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| 405 | + INV_MPU6050_FILTER_NOLPF2 = 0, |
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| 406 | + INV_MPU6050_FILTER_200HZ, |
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| 407 | + INV_MPU6050_FILTER_100HZ, |
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| 408 | + INV_MPU6050_FILTER_45HZ, |
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315 | 409 | INV_MPU6050_FILTER_20HZ, |
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316 | 410 | INV_MPU6050_FILTER_10HZ, |
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317 | 411 | INV_MPU6050_FILTER_5HZ, |
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318 | | - INV_MPU6050_FILTER_2100HZ_NOLPF, |
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| 412 | + INV_MPU6050_FILTER_NOLPF, |
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319 | 413 | NUM_MPU6050_FILTER |
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320 | 414 | }; |
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321 | 415 | |
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.. | .. |
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349 | 443 | |
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350 | 444 | irqreturn_t inv_mpu6050_read_fifo(int irq, void *p); |
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351 | 445 | int inv_mpu6050_probe_trigger(struct iio_dev *indio_dev, int irq_type); |
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352 | | -int inv_reset_fifo(struct iio_dev *indio_dev); |
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353 | | -int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask); |
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| 446 | +int inv_mpu6050_prepare_fifo(struct inv_mpu6050_state *st, bool enable); |
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| 447 | +int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, |
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| 448 | + unsigned int mask); |
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354 | 449 | int inv_mpu6050_write_reg(struct inv_mpu6050_state *st, int reg, u8 val); |
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355 | | -int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on); |
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356 | 450 | int inv_mpu_acpi_create_mux_client(struct i2c_client *client); |
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357 | 451 | void inv_mpu_acpi_delete_mux_client(struct i2c_client *client); |
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358 | 452 | int inv_mpu_core_probe(struct regmap *regmap, int irq, const char *name, |
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359 | 453 | int (*inv_mpu_bus_setup)(struct iio_dev *), int chip_type); |
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360 | 454 | extern const struct dev_pm_ops inv_mpu_pmops; |
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| 455 | + |
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| 456 | +#endif |
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