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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/drivers/iio/imu/bmi160/bmi160_core.c
....@@ -1,26 +1,28 @@
1
+// SPDX-License-Identifier: GPL-2.0
12 /*
23  * BMI160 - Bosch IMU (accel, gyro plus external magnetometer)
34  *
45  * Copyright (c) 2016, Intel Corporation.
5
- *
6
- * This file is subject to the terms and conditions of version 2 of
7
- * the GNU General Public License.  See the file COPYING in the main
8
- * directory of this archive for more details.
6
+ * Copyright (c) 2019, Martin Kelly.
97  *
108  * IIO core driver for BMI160, with support for I2C/SPI busses
119  *
12
- * TODO: magnetometer, interrupts, hardware FIFO
10
+ * TODO: magnetometer, hardware FIFO
1311  */
1412 #include <linux/module.h>
1513 #include <linux/regmap.h>
1614 #include <linux/acpi.h>
1715 #include <linux/delay.h>
16
+#include <linux/irq.h>
17
+#include <linux/of_irq.h>
18
+#include <linux/regulator/consumer.h>
1819 
1920 #include <linux/iio/iio.h>
2021 #include <linux/iio/triggered_buffer.h>
2122 #include <linux/iio/trigger_consumer.h>
2223 #include <linux/iio/buffer.h>
2324 #include <linux/iio/sysfs.h>
25
+#include <linux/iio/trigger.h>
2426 
2527 #include "bmi160.h"
2628 
....@@ -64,7 +66,31 @@
6466 #define BMI160_CMD_GYRO_PM_FAST_STARTUP	0x17
6567 #define BMI160_CMD_SOFTRESET		0xB6
6668 
69
+#define BMI160_REG_INT_EN		0x51
70
+#define BMI160_DRDY_INT_EN		BIT(4)
71
+
72
+#define BMI160_REG_INT_OUT_CTRL		0x53
73
+#define BMI160_INT_OUT_CTRL_MASK	0x0f
74
+#define BMI160_INT1_OUT_CTRL_SHIFT	0
75
+#define BMI160_INT2_OUT_CTRL_SHIFT	4
76
+#define BMI160_EDGE_TRIGGERED		BIT(0)
77
+#define BMI160_ACTIVE_HIGH		BIT(1)
78
+#define BMI160_OPEN_DRAIN		BIT(2)
79
+#define BMI160_OUTPUT_EN		BIT(3)
80
+
81
+#define BMI160_REG_INT_LATCH		0x54
82
+#define BMI160_INT1_LATCH_MASK		BIT(4)
83
+#define BMI160_INT2_LATCH_MASK		BIT(5)
84
+
85
+/* INT1 and INT2 are in the opposite order as in INT_OUT_CTRL! */
86
+#define BMI160_REG_INT_MAP		0x56
87
+#define BMI160_INT1_MAP_DRDY_EN		0x80
88
+#define BMI160_INT2_MAP_DRDY_EN		0x08
89
+
6790 #define BMI160_REG_DUMMY		0x7F
91
+
92
+#define BMI160_NORMAL_WRITE_USLEEP	2
93
+#define BMI160_SUSPENDED_WRITE_USLEEP	450
6894 
6995 #define BMI160_ACCEL_PMU_MIN_USLEEP	3800
7096 #define BMI160_GYRO_PMU_MIN_USLEEP	80000
....@@ -84,6 +110,7 @@
84110 		.storagebits = 16,				\
85111 		.endianness = IIO_LE,				\
86112 	},							\
113
+	.ext_info = bmi160_ext_info,				\
87114 }
88115 
89116 /* scan indexes follow DATA register order */
....@@ -108,15 +135,9 @@
108135 	BMI160_NUM_SENSORS /* must be last */
109136 };
110137 
111
-struct bmi160_data {
112
-	struct regmap *regmap;
113
-	/*
114
-	 * Ensure natural alignment for timestamp if present.
115
-	 * Max length needed: 2 * 3 channels + 4 bytes padding + 8 byte ts.
116
-	 * If fewer channels are enabled, less space may be needed, as
117
-	 * long as the timestamp is still aligned to 8 bytes.
118
-	 */
119
-	__le16 buf[12] __aligned(8);
138
+enum bmi160_int_pin {
139
+	BMI160_PIN_INT1,
140
+	BMI160_PIN_INT2
120141 };
121142 
122143 const struct regmap_config bmi160_regmap_config = {
....@@ -245,6 +266,20 @@
245266 	},
246267 };
247268 
269
+static const struct iio_mount_matrix *
270
+bmi160_get_mount_matrix(const struct iio_dev *indio_dev,
271
+			const struct iio_chan_spec *chan)
272
+{
273
+	struct bmi160_data *data = iio_priv(indio_dev);
274
+
275
+	return &data->orientation;
276
+}
277
+
278
+static const struct iio_chan_spec_ext_info bmi160_ext_info[] = {
279
+	IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bmi160_get_mount_matrix),
280
+	{ }
281
+};
282
+
248283 static const struct iio_chan_spec bmi160_channels[] = {
249284 	BMI160_CHANNEL(IIO_ACCEL, X, BMI160_SCAN_ACCEL_X),
250285 	BMI160_CHANNEL(IIO_ACCEL, Y, BMI160_SCAN_ACCEL_Y),
....@@ -280,7 +315,7 @@
280315 		cmd = bmi160_regs[t].pmu_cmd_suspend;
281316 
282317 	ret = regmap_write(data->regmap, BMI160_REG_CMD, cmd);
283
-	if (ret < 0)
318
+	if (ret)
284319 		return ret;
285320 
286321 	usleep_range(bmi160_pmu_time[t], bmi160_pmu_time[t] + 1000);
....@@ -312,7 +347,7 @@
312347 	int i, ret, val;
313348 
314349 	ret = regmap_read(data->regmap, bmi160_regs[t].range, &val);
315
-	if (ret < 0)
350
+	if (ret)
316351 		return ret;
317352 
318353 	for (i = 0; i < bmi160_scale_table[t].num; i++)
....@@ -335,7 +370,7 @@
335370 	reg = bmi160_regs[t].data + (axis - IIO_MOD_X) * sizeof(sample);
336371 
337372 	ret = regmap_bulk_read(data->regmap, reg, &sample, sizeof(sample));
338
-	if (ret < 0)
373
+	if (ret)
339374 		return ret;
340375 
341376 	*val = sign_extend32(le16_to_cpu(sample), 15);
....@@ -369,7 +404,7 @@
369404 	int i, val, ret;
370405 
371406 	ret = regmap_read(data->regmap, bmi160_regs[t].config, &val);
372
-	if (ret < 0)
407
+	if (ret)
373408 		return ret;
374409 
375410 	val &= bmi160_regs[t].config_odr_mask;
....@@ -399,13 +434,12 @@
399434 			 indio_dev->masklength) {
400435 		ret = regmap_bulk_read(data->regmap, base + i * sizeof(sample),
401436 				       &sample, sizeof(sample));
402
-		if (ret < 0)
437
+		if (ret)
403438 			goto done;
404439 		data->buf[j++] = sample;
405440 	}
406441 
407
-	iio_push_to_buffers_with_timestamp(indio_dev, data->buf,
408
-					   iio_get_time_ns(indio_dev));
442
+	iio_push_to_buffers_with_timestamp(indio_dev, data->buf, pf->timestamp);
409443 done:
410444 	iio_trigger_notify_done(indio_dev->trig);
411445 	return IRQ_HANDLED;
....@@ -421,18 +455,18 @@
421455 	switch (mask) {
422456 	case IIO_CHAN_INFO_RAW:
423457 		ret = bmi160_get_data(data, chan->type, chan->channel2, val);
424
-		if (ret < 0)
458
+		if (ret)
425459 			return ret;
426460 		return IIO_VAL_INT;
427461 	case IIO_CHAN_INFO_SCALE:
428462 		*val = 0;
429463 		ret = bmi160_get_scale(data,
430464 				       bmi160_to_sensor(chan->type), val2);
431
-		return ret < 0 ? ret : IIO_VAL_INT_PLUS_MICRO;
465
+		return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
432466 	case IIO_CHAN_INFO_SAMP_FREQ:
433467 		ret = bmi160_get_odr(data, bmi160_to_sensor(chan->type),
434468 				     val, val2);
435
-		return ret < 0 ? ret : IIO_VAL_INT_PLUS_MICRO;
469
+		return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
436470 	default:
437471 		return -EINVAL;
438472 	}
....@@ -503,15 +537,201 @@
503537 	return dev_name(dev);
504538 }
505539 
540
+static int bmi160_write_conf_reg(struct regmap *regmap, unsigned int reg,
541
+				 unsigned int mask, unsigned int bits,
542
+				 unsigned int write_usleep)
543
+{
544
+	int ret;
545
+	unsigned int val;
546
+
547
+	ret = regmap_read(regmap, reg, &val);
548
+	if (ret)
549
+		return ret;
550
+
551
+	val = (val & ~mask) | bits;
552
+
553
+	ret = regmap_write(regmap, reg, val);
554
+	if (ret)
555
+		return ret;
556
+
557
+	/*
558
+	 * We need to wait after writing before we can write again. See the
559
+	 * datasheet, page 93.
560
+	 */
561
+	usleep_range(write_usleep, write_usleep + 1000);
562
+
563
+	return 0;
564
+}
565
+
566
+static int bmi160_config_pin(struct regmap *regmap, enum bmi160_int_pin pin,
567
+			     bool open_drain, u8 irq_mask,
568
+			     unsigned long write_usleep)
569
+{
570
+	int ret;
571
+	struct device *dev = regmap_get_device(regmap);
572
+	u8 int_out_ctrl_shift;
573
+	u8 int_latch_mask;
574
+	u8 int_map_mask;
575
+	u8 int_out_ctrl_mask;
576
+	u8 int_out_ctrl_bits;
577
+	const char *pin_name;
578
+
579
+	switch (pin) {
580
+	case BMI160_PIN_INT1:
581
+		int_out_ctrl_shift = BMI160_INT1_OUT_CTRL_SHIFT;
582
+		int_latch_mask = BMI160_INT1_LATCH_MASK;
583
+		int_map_mask = BMI160_INT1_MAP_DRDY_EN;
584
+		break;
585
+	case BMI160_PIN_INT2:
586
+		int_out_ctrl_shift = BMI160_INT2_OUT_CTRL_SHIFT;
587
+		int_latch_mask = BMI160_INT2_LATCH_MASK;
588
+		int_map_mask = BMI160_INT2_MAP_DRDY_EN;
589
+		break;
590
+	}
591
+	int_out_ctrl_mask = BMI160_INT_OUT_CTRL_MASK << int_out_ctrl_shift;
592
+
593
+	/*
594
+	 * Enable the requested pin with the right settings:
595
+	 * - Push-pull/open-drain
596
+	 * - Active low/high
597
+	 * - Edge/level triggered
598
+	 */
599
+	int_out_ctrl_bits = BMI160_OUTPUT_EN;
600
+	if (open_drain)
601
+		/* Default is push-pull. */
602
+		int_out_ctrl_bits |= BMI160_OPEN_DRAIN;
603
+	int_out_ctrl_bits |= irq_mask;
604
+	int_out_ctrl_bits <<= int_out_ctrl_shift;
605
+
606
+	ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_OUT_CTRL,
607
+				    int_out_ctrl_mask, int_out_ctrl_bits,
608
+				    write_usleep);
609
+	if (ret)
610
+		return ret;
611
+
612
+	/* Set the pin to input mode with no latching. */
613
+	ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_LATCH,
614
+				    int_latch_mask, int_latch_mask,
615
+				    write_usleep);
616
+	if (ret)
617
+		return ret;
618
+
619
+	/* Map interrupts to the requested pin. */
620
+	ret = bmi160_write_conf_reg(regmap, BMI160_REG_INT_MAP,
621
+				    int_map_mask, int_map_mask,
622
+				    write_usleep);
623
+	if (ret) {
624
+		switch (pin) {
625
+		case BMI160_PIN_INT1:
626
+			pin_name = "INT1";
627
+			break;
628
+		case BMI160_PIN_INT2:
629
+			pin_name = "INT2";
630
+			break;
631
+		}
632
+		dev_err(dev, "Failed to configure %s IRQ pin", pin_name);
633
+	}
634
+
635
+	return ret;
636
+}
637
+
638
+int bmi160_enable_irq(struct regmap *regmap, bool enable)
639
+{
640
+	unsigned int enable_bit = 0;
641
+
642
+	if (enable)
643
+		enable_bit = BMI160_DRDY_INT_EN;
644
+
645
+	return bmi160_write_conf_reg(regmap, BMI160_REG_INT_EN,
646
+				     BMI160_DRDY_INT_EN, enable_bit,
647
+				     BMI160_NORMAL_WRITE_USLEEP);
648
+}
649
+EXPORT_SYMBOL(bmi160_enable_irq);
650
+
651
+static int bmi160_get_irq(struct device_node *of_node, enum bmi160_int_pin *pin)
652
+{
653
+	int irq;
654
+
655
+	/* Use INT1 if possible, otherwise fall back to INT2. */
656
+	irq = of_irq_get_byname(of_node, "INT1");
657
+	if (irq > 0) {
658
+		*pin = BMI160_PIN_INT1;
659
+		return irq;
660
+	}
661
+
662
+	irq = of_irq_get_byname(of_node, "INT2");
663
+	if (irq > 0)
664
+		*pin = BMI160_PIN_INT2;
665
+
666
+	return irq;
667
+}
668
+
669
+static int bmi160_config_device_irq(struct iio_dev *indio_dev, int irq_type,
670
+				    enum bmi160_int_pin pin)
671
+{
672
+	bool open_drain;
673
+	u8 irq_mask;
674
+	struct bmi160_data *data = iio_priv(indio_dev);
675
+	struct device *dev = regmap_get_device(data->regmap);
676
+
677
+	/* Level-triggered, active-low is the default if we set all zeroes. */
678
+	if (irq_type == IRQF_TRIGGER_RISING)
679
+		irq_mask = BMI160_ACTIVE_HIGH | BMI160_EDGE_TRIGGERED;
680
+	else if (irq_type == IRQF_TRIGGER_FALLING)
681
+		irq_mask = BMI160_EDGE_TRIGGERED;
682
+	else if (irq_type == IRQF_TRIGGER_HIGH)
683
+		irq_mask = BMI160_ACTIVE_HIGH;
684
+	else if (irq_type == IRQF_TRIGGER_LOW)
685
+		irq_mask = 0;
686
+	else {
687
+		dev_err(&indio_dev->dev,
688
+			"Invalid interrupt type 0x%x specified\n", irq_type);
689
+		return -EINVAL;
690
+	}
691
+
692
+	open_drain = of_property_read_bool(dev->of_node, "drive-open-drain");
693
+
694
+	return bmi160_config_pin(data->regmap, pin, open_drain, irq_mask,
695
+				 BMI160_NORMAL_WRITE_USLEEP);
696
+}
697
+
698
+static int bmi160_setup_irq(struct iio_dev *indio_dev, int irq,
699
+			    enum bmi160_int_pin pin)
700
+{
701
+	struct irq_data *desc;
702
+	u32 irq_type;
703
+	int ret;
704
+
705
+	desc = irq_get_irq_data(irq);
706
+	if (!desc) {
707
+		dev_err(&indio_dev->dev, "Could not find IRQ %d\n", irq);
708
+		return -EINVAL;
709
+	}
710
+
711
+	irq_type = irqd_get_trigger_type(desc);
712
+
713
+	ret = bmi160_config_device_irq(indio_dev, irq_type, pin);
714
+	if (ret)
715
+		return ret;
716
+
717
+	return bmi160_probe_trigger(indio_dev, irq, irq_type);
718
+}
719
+
506720 static int bmi160_chip_init(struct bmi160_data *data, bool use_spi)
507721 {
508722 	int ret;
509723 	unsigned int val;
510724 	struct device *dev = regmap_get_device(data->regmap);
511725 
512
-	ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET);
513
-	if (ret < 0)
726
+	ret = regulator_bulk_enable(ARRAY_SIZE(data->supplies), data->supplies);
727
+	if (ret) {
728
+		dev_err(dev, "Failed to enable regulators: %d\n", ret);
514729 		return ret;
730
+	}
731
+
732
+	ret = regmap_write(data->regmap, BMI160_REG_CMD, BMI160_CMD_SOFTRESET);
733
+	if (ret)
734
+		goto disable_regulator;
515735 
516736 	usleep_range(BMI160_SOFTRESET_USLEEP, BMI160_SOFTRESET_USLEEP + 1);
517737 
....@@ -521,36 +741,96 @@
521741 	 */
522742 	if (use_spi) {
523743 		ret = regmap_read(data->regmap, BMI160_REG_DUMMY, &val);
524
-		if (ret < 0)
525
-			return ret;
744
+		if (ret)
745
+			goto disable_regulator;
526746 	}
527747 
528748 	ret = regmap_read(data->regmap, BMI160_REG_CHIP_ID, &val);
529
-	if (ret < 0) {
749
+	if (ret) {
530750 		dev_err(dev, "Error reading chip id\n");
531
-		return ret;
751
+		goto disable_regulator;
532752 	}
533753 	if (val != BMI160_CHIP_ID_VAL) {
534754 		dev_err(dev, "Wrong chip id, got %x expected %x\n",
535755 			val, BMI160_CHIP_ID_VAL);
536
-		return -ENODEV;
756
+		ret = -ENODEV;
757
+		goto disable_regulator;
537758 	}
538759 
539760 	ret = bmi160_set_mode(data, BMI160_ACCEL, true);
540
-	if (ret < 0)
541
-		return ret;
761
+	if (ret)
762
+		goto disable_regulator;
542763 
543764 	ret = bmi160_set_mode(data, BMI160_GYRO, true);
544
-	if (ret < 0)
765
+	if (ret)
766
+		goto disable_accel;
767
+
768
+	return 0;
769
+
770
+disable_accel:
771
+	bmi160_set_mode(data, BMI160_ACCEL, false);
772
+
773
+disable_regulator:
774
+	regulator_bulk_disable(ARRAY_SIZE(data->supplies), data->supplies);
775
+	return ret;
776
+}
777
+
778
+static int bmi160_data_rdy_trigger_set_state(struct iio_trigger *trig,
779
+					     bool enable)
780
+{
781
+	struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
782
+	struct bmi160_data *data = iio_priv(indio_dev);
783
+
784
+	return bmi160_enable_irq(data->regmap, enable);
785
+}
786
+
787
+static const struct iio_trigger_ops bmi160_trigger_ops = {
788
+	.set_trigger_state = &bmi160_data_rdy_trigger_set_state,
789
+};
790
+
791
+int bmi160_probe_trigger(struct iio_dev *indio_dev, int irq, u32 irq_type)
792
+{
793
+	struct bmi160_data *data = iio_priv(indio_dev);
794
+	int ret;
795
+
796
+	data->trig = devm_iio_trigger_alloc(&indio_dev->dev, "%s-dev%d",
797
+					    indio_dev->name, indio_dev->id);
798
+
799
+	if (data->trig == NULL)
800
+		return -ENOMEM;
801
+
802
+	ret = devm_request_irq(&indio_dev->dev, irq,
803
+			       &iio_trigger_generic_data_rdy_poll,
804
+			       irq_type, "bmi160", data->trig);
805
+	if (ret)
545806 		return ret;
807
+
808
+	data->trig->dev.parent = regmap_get_device(data->regmap);
809
+	data->trig->ops = &bmi160_trigger_ops;
810
+	iio_trigger_set_drvdata(data->trig, indio_dev);
811
+
812
+	ret = devm_iio_trigger_register(&indio_dev->dev, data->trig);
813
+	if (ret)
814
+		return ret;
815
+
816
+	indio_dev->trig = iio_trigger_get(data->trig);
546817 
547818 	return 0;
548819 }
549820 
550
-static void bmi160_chip_uninit(struct bmi160_data *data)
821
+static void bmi160_chip_uninit(void *data)
551822 {
552
-	bmi160_set_mode(data, BMI160_GYRO, false);
553
-	bmi160_set_mode(data, BMI160_ACCEL, false);
823
+	struct bmi160_data *bmi_data = data;
824
+	struct device *dev = regmap_get_device(bmi_data->regmap);
825
+	int ret;
826
+
827
+	bmi160_set_mode(bmi_data, BMI160_GYRO, false);
828
+	bmi160_set_mode(bmi_data, BMI160_ACCEL, false);
829
+
830
+	ret = regulator_bulk_disable(ARRAY_SIZE(bmi_data->supplies),
831
+				     bmi_data->supplies);
832
+	if (ret)
833
+		dev_err(dev, "Failed to disable regulators: %d\n", ret);
554834 }
555835 
556836 int bmi160_core_probe(struct device *dev, struct regmap *regmap,
....@@ -558,6 +838,8 @@
558838 {
559839 	struct iio_dev *indio_dev;
560840 	struct bmi160_data *data;
841
+	int irq;
842
+	enum bmi160_int_pin int_pin;
561843 	int ret;
562844 
563845 	indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
....@@ -568,49 +850,58 @@
568850 	dev_set_drvdata(dev, indio_dev);
569851 	data->regmap = regmap;
570852 
853
+	data->supplies[0].supply = "vdd";
854
+	data->supplies[1].supply = "vddio";
855
+	ret = devm_regulator_bulk_get(dev,
856
+				      ARRAY_SIZE(data->supplies),
857
+				      data->supplies);
858
+	if (ret) {
859
+		dev_err(dev, "Failed to get regulators: %d\n", ret);
860
+		return ret;
861
+	}
862
+
863
+	ret = iio_read_mount_matrix(dev, "mount-matrix",
864
+				    &data->orientation);
865
+	if (ret)
866
+		return ret;
867
+
571868 	ret = bmi160_chip_init(data, use_spi);
572
-	if (ret < 0)
869
+	if (ret)
870
+		return ret;
871
+
872
+	ret = devm_add_action_or_reset(dev, bmi160_chip_uninit, data);
873
+	if (ret)
573874 		return ret;
574875 
575876 	if (!name && ACPI_HANDLE(dev))
576877 		name = bmi160_match_acpi_device(dev);
577878 
578
-	indio_dev->dev.parent = dev;
579879 	indio_dev->channels = bmi160_channels;
580880 	indio_dev->num_channels = ARRAY_SIZE(bmi160_channels);
581881 	indio_dev->name = name;
582882 	indio_dev->modes = INDIO_DIRECT_MODE;
583883 	indio_dev->info = &bmi160_info;
584884 
585
-	ret = iio_triggered_buffer_setup(indio_dev, NULL,
586
-					 bmi160_trigger_handler, NULL);
587
-	if (ret < 0)
588
-		goto uninit;
885
+	ret = devm_iio_triggered_buffer_setup(dev, indio_dev,
886
+					      iio_pollfunc_store_time,
887
+					      bmi160_trigger_handler, NULL);
888
+	if (ret)
889
+		return ret;
589890 
590
-	ret = iio_device_register(indio_dev);
591
-	if (ret < 0)
592
-		goto buffer_cleanup;
891
+	irq = bmi160_get_irq(dev->of_node, &int_pin);
892
+	if (irq > 0) {
893
+		ret = bmi160_setup_irq(indio_dev, irq, int_pin);
894
+		if (ret)
895
+			dev_err(&indio_dev->dev, "Failed to setup IRQ %d\n",
896
+				irq);
897
+	} else {
898
+		dev_info(&indio_dev->dev, "Not setting up IRQ trigger\n");
899
+	}
593900 
594
-	return 0;
595
-buffer_cleanup:
596
-	iio_triggered_buffer_cleanup(indio_dev);
597
-uninit:
598
-	bmi160_chip_uninit(data);
599
-	return ret;
901
+	return devm_iio_device_register(dev, indio_dev);
600902 }
601903 EXPORT_SYMBOL_GPL(bmi160_core_probe);
602904 
603
-void bmi160_core_remove(struct device *dev)
604
-{
605
-	struct iio_dev *indio_dev = dev_get_drvdata(dev);
606
-	struct bmi160_data *data = iio_priv(indio_dev);
607
-
608
-	iio_device_unregister(indio_dev);
609
-	iio_triggered_buffer_cleanup(indio_dev);
610
-	bmi160_chip_uninit(data);
611
-}
612
-EXPORT_SYMBOL_GPL(bmi160_core_remove);
613
-
614
-MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com");
905
+MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
615906 MODULE_DESCRIPTION("Bosch BMI160 driver");
616907 MODULE_LICENSE("GPL v2");