forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/drivers/iio/adc/exynos_adc.c
....@@ -1,23 +1,10 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23 * exynos_adc.c - Support for ADC in EXYNOS SoCs
34 *
45 * 8 ~ 10 channel, 10/12-bit ADC
56 *
67 * Copyright (C) 2013 Naveen Krishna Chatradhi <ch.naveen@samsung.com>
7
- *
8
- * This program is free software; you can redistribute it and/or modify
9
- * it under the terms of the GNU General Public License as published by
10
- * the Free Software Foundation; either version 2 of the License, or
11
- * (at your option) any later version.
12
- *
13
- * This program is distributed in the hope that it will be useful,
14
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
15
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16
- * GNU General Public License for more details.
17
- *
18
- * You should have received a copy of the GNU General Public License
19
- * along with this program; if not, write to the Free Software
20
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
218 */
229
2310 #include <linux/module.h>
....@@ -151,6 +138,16 @@
151138 bool read_ts;
152139 u32 ts_x;
153140 u32 ts_y;
141
+
142
+ /*
143
+ * Lock to protect from potential concurrent access to the
144
+ * completion callback during a manual conversion. For this driver
145
+ * a wait-callback is used to wait for the conversion result,
146
+ * so in the meantime no other read request (or conversion start)
147
+ * must be performed, otherwise it would interfere with the
148
+ * current conversion result.
149
+ */
150
+ struct mutex lock;
154151 };
155152
156153 struct exynos_adc_data {
....@@ -462,9 +459,6 @@
462459 {
463460 u32 con1, con2;
464461
465
- if (info->data->needs_adc_phy)
466
- regmap_write(info->pmu_map, info->data->phy_offset, 1);
467
-
468462 con1 = ADC_V2_CON1_SOFT_RESET;
469463 writel(con1, ADC_V2_CON1(info->regs));
470464
....@@ -544,10 +538,21 @@
544538 unsigned long timeout;
545539 int ret;
546540
547
- if (mask != IIO_CHAN_INFO_RAW)
548
- return -EINVAL;
541
+ if (mask == IIO_CHAN_INFO_SCALE) {
542
+ ret = regulator_get_voltage(info->vdd);
543
+ if (ret < 0)
544
+ return ret;
549545
550
- mutex_lock(&indio_dev->mlock);
546
+ /* Regulator voltage is in uV, but need mV */
547
+ *val = ret / 1000;
548
+ *val2 = info->data->mask;
549
+
550
+ return IIO_VAL_FRACTIONAL;
551
+ } else if (mask != IIO_CHAN_INFO_RAW) {
552
+ return -EINVAL;
553
+ }
554
+
555
+ mutex_lock(&info->lock);
551556 reinit_completion(&info->completion);
552557
553558 /* Select the channel to be used and Trigger conversion */
....@@ -567,7 +572,7 @@
567572 ret = IIO_VAL_INT;
568573 }
569574
570
- mutex_unlock(&indio_dev->mlock);
575
+ mutex_unlock(&info->lock);
571576
572577 return ret;
573578 }
....@@ -578,7 +583,7 @@
578583 unsigned long timeout;
579584 int ret;
580585
581
- mutex_lock(&indio_dev->mlock);
586
+ mutex_lock(&info->lock);
582587 info->read_ts = true;
583588
584589 reinit_completion(&info->completion);
....@@ -603,7 +608,7 @@
603608 }
604609
605610 info->read_ts = false;
606
- mutex_unlock(&indio_dev->mlock);
611
+ mutex_unlock(&info->lock);
607612
608613 return ret;
609614 }
....@@ -664,7 +669,7 @@
664669 input_sync(info->input);
665670
666671 usleep_range(1000, 1100);
667
- };
672
+ }
668673
669674 writel(0, ADC_V1_CLRINTPNDNUP(info->regs));
670675
....@@ -696,6 +701,7 @@
696701 .channel = _index, \
697702 .address = _index, \
698703 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
704
+ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SCALE), \
699705 .datasheet_name = _id, \
700706 }
701707
....@@ -782,7 +788,6 @@
782788 struct device_node *np = pdev->dev.of_node;
783789 struct s3c2410_ts_mach_info *pdata = dev_get_platdata(&pdev->dev);
784790 struct iio_dev *indio_dev = NULL;
785
- struct resource *mem;
786791 bool has_ts = false;
787792 int ret = -ENODEV;
788793 int irq;
....@@ -801,8 +806,7 @@
801806 return -EINVAL;
802807 }
803808
804
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
805
- info->regs = devm_ioremap_resource(&pdev->dev, mem);
809
+ info->regs = devm_platform_ioremap_resource(pdev, 0);
806810 if (IS_ERR(info->regs))
807811 return PTR_ERR(info->regs);
808812
....@@ -818,10 +822,8 @@
818822 }
819823
820824 irq = platform_get_irq(pdev, 0);
821
- if (irq < 0) {
822
- dev_err(&pdev->dev, "no irq resource?\n");
825
+ if (irq < 0)
823826 return irq;
824
- }
825827 info->irq = irq;
826828
827829 irq = platform_get_irq(pdev, 1);
....@@ -852,11 +854,9 @@
852854 }
853855
854856 info->vdd = devm_regulator_get(&pdev->dev, "vdd");
855
- if (IS_ERR(info->vdd)) {
856
- dev_err(&pdev->dev, "failed getting regulator, err = %ld\n",
857
- PTR_ERR(info->vdd));
858
- return PTR_ERR(info->vdd);
859
- }
857
+ if (IS_ERR(info->vdd))
858
+ return dev_err_probe(&pdev->dev, PTR_ERR(info->vdd),
859
+ "failed getting regulator");
860860
861861 ret = regulator_enable(info->vdd);
862862 if (ret)
....@@ -873,13 +873,13 @@
873873 platform_set_drvdata(pdev, indio_dev);
874874
875875 indio_dev->name = dev_name(&pdev->dev);
876
- indio_dev->dev.parent = &pdev->dev;
877
- indio_dev->dev.of_node = pdev->dev.of_node;
878876 indio_dev->info = &exynos_adc_iio_info;
879877 indio_dev->modes = INDIO_DIRECT_MODE;
880878 indio_dev->channels = exynos_adc_iio_channels;
881879 indio_dev->num_channels = info->data->num_channels;
882880
881
+ mutex_init(&info->lock);
882
+
883883 ret = request_irq(info->irq, exynos_adc_isr,
884884 0, dev_name(&pdev->dev), info);
885885 if (ret < 0) {