.. | .. |
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17 | 17 | |
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18 | 18 | #define DRIVER_NAME "intel_th_pci" |
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19 | 19 | |
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20 | | -#define BAR_MASK (BIT(TH_MMIO_CONFIG) | BIT(TH_MMIO_SW)) |
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| 20 | +enum { |
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| 21 | + TH_PCI_CONFIG_BAR = 0, |
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| 22 | + TH_PCI_STH_SW_BAR = 2, |
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| 23 | + TH_PCI_RTIT_BAR = 4, |
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| 24 | +}; |
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| 25 | + |
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| 26 | +#define BAR_MASK (BIT(TH_PCI_CONFIG_BAR) | BIT(TH_PCI_STH_SW_BAR)) |
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21 | 27 | |
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22 | 28 | #define PCI_REG_NPKDSC 0x80 |
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23 | 29 | #define NPKDSC_TSACT BIT(5) |
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.. | .. |
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66 | 72 | const struct pci_device_id *id) |
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67 | 73 | { |
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68 | 74 | struct intel_th_drvdata *drvdata = (void *)id->driver_data; |
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| 75 | + struct resource resource[TH_MMIO_END + TH_NVEC_MAX] = { |
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| 76 | + [TH_MMIO_CONFIG] = pdev->resource[TH_PCI_CONFIG_BAR], |
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| 77 | + [TH_MMIO_SW] = pdev->resource[TH_PCI_STH_SW_BAR], |
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| 78 | + }; |
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| 79 | + int err, r = TH_MMIO_SW + 1, i; |
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69 | 80 | struct intel_th *th; |
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70 | | - int err; |
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71 | 81 | |
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72 | 82 | err = pcim_enable_device(pdev); |
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73 | 83 | if (err) |
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.. | .. |
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77 | 87 | if (err) |
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78 | 88 | return err; |
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79 | 89 | |
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80 | | - th = intel_th_alloc(&pdev->dev, drvdata, pdev->resource, |
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81 | | - DEVICE_COUNT_RESOURCE, pdev->irq); |
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82 | | - if (IS_ERR(th)) |
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83 | | - return PTR_ERR(th); |
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| 90 | + if (pdev->resource[TH_PCI_RTIT_BAR].start) { |
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| 91 | + resource[TH_MMIO_RTIT] = pdev->resource[TH_PCI_RTIT_BAR]; |
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| 92 | + r++; |
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| 93 | + } |
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| 94 | + |
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| 95 | + err = pci_alloc_irq_vectors(pdev, 1, 8, PCI_IRQ_ALL_TYPES); |
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| 96 | + if (err > 0) |
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| 97 | + for (i = 0; i < err; i++, r++) { |
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| 98 | + resource[r].flags = IORESOURCE_IRQ; |
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| 99 | + resource[r].start = pci_irq_vector(pdev, i); |
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| 100 | + } |
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| 101 | + |
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| 102 | + th = intel_th_alloc(&pdev->dev, drvdata, resource, r); |
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| 103 | + if (IS_ERR(th)) { |
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| 104 | + err = PTR_ERR(th); |
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| 105 | + goto err_free_irq; |
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| 106 | + } |
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84 | 107 | |
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85 | 108 | th->activate = intel_th_pci_activate; |
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86 | 109 | th->deactivate = intel_th_pci_deactivate; |
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.. | .. |
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88 | 111 | pci_set_master(pdev); |
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89 | 112 | |
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90 | 113 | return 0; |
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| 114 | + |
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| 115 | +err_free_irq: |
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| 116 | + pci_free_irq_vectors(pdev); |
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| 117 | + return err; |
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91 | 118 | } |
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92 | 119 | |
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93 | 120 | static void intel_th_pci_remove(struct pci_dev *pdev) |
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.. | .. |
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95 | 122 | struct intel_th *th = pci_get_drvdata(pdev); |
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96 | 123 | |
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97 | 124 | intel_th_free(th); |
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| 125 | + |
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| 126 | + pci_free_irq_vectors(pdev); |
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98 | 127 | } |
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| 128 | + |
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| 129 | +static const struct intel_th_drvdata intel_th_1x_multi_is_broken = { |
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| 130 | + .multi_is_broken = 1, |
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| 131 | +}; |
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99 | 132 | |
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100 | 133 | static const struct intel_th_drvdata intel_th_2x = { |
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101 | 134 | .tscu_enable = 1, |
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| 135 | + .has_mintctl = 1, |
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102 | 136 | }; |
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103 | 137 | |
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104 | 138 | static const struct pci_device_id intel_th_pci_id_table[] = { |
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.. | .. |
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128 | 162 | { |
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129 | 163 | /* Kaby Lake PCH-H */ |
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130 | 164 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa2a6), |
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131 | | - .driver_data = (kernel_ulong_t)0, |
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| 165 | + .driver_data = (kernel_ulong_t)&intel_th_1x_multi_is_broken, |
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132 | 166 | }, |
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133 | 167 | { |
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134 | 168 | /* Denverton */ |
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.. | .. |
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183 | 217 | { |
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184 | 218 | /* Comet Lake PCH-V */ |
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185 | 219 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa3a6), |
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186 | | - .driver_data = (kernel_ulong_t)&intel_th_2x, |
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| 220 | + .driver_data = (kernel_ulong_t)&intel_th_1x_multi_is_broken, |
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187 | 221 | }, |
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188 | 222 | { |
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189 | 223 | /* Ice Lake NNPI */ |
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.. | .. |
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231 | 265 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
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232 | 266 | }, |
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233 | 267 | { |
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234 | | - /* Alder Lake-P */ |
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235 | | - PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x51a6), |
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236 | | - .driver_data = (kernel_ulong_t)&intel_th_2x, |
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237 | | - }, |
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238 | | - { |
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239 | 268 | /* Emmitsburg PCH */ |
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240 | 269 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1bcc), |
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241 | 270 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
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242 | 271 | }, |
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243 | 272 | { |
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| 273 | + /* Alder Lake */ |
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| 274 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x7aa6), |
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| 275 | + .driver_data = (kernel_ulong_t)&intel_th_2x, |
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| 276 | + }, |
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| 277 | + { |
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| 278 | + /* Alder Lake-P */ |
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| 279 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x51a6), |
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| 280 | + .driver_data = (kernel_ulong_t)&intel_th_2x, |
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| 281 | + }, |
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| 282 | + { |
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244 | 283 | /* Alder Lake-M */ |
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245 | 284 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x54a6), |
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246 | 285 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
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247 | 286 | }, |
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248 | 287 | { |
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| 288 | + /* Meteor Lake-P */ |
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| 289 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x7e24), |
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| 290 | + .driver_data = (kernel_ulong_t)&intel_th_2x, |
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| 291 | + }, |
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| 292 | + { |
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| 293 | + /* Raptor Lake-S */ |
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| 294 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x7a26), |
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| 295 | + .driver_data = (kernel_ulong_t)&intel_th_2x, |
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| 296 | + }, |
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| 297 | + { |
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| 298 | + /* Raptor Lake-S CPU */ |
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| 299 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xa76f), |
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| 300 | + .driver_data = (kernel_ulong_t)&intel_th_2x, |
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| 301 | + }, |
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| 302 | + { |
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| 303 | + /* Alder Lake CPU */ |
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| 304 | + PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x466f), |
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| 305 | + .driver_data = (kernel_ulong_t)&intel_th_2x, |
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| 306 | + }, |
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| 307 | + { |
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249 | 308 | /* Rocket Lake CPU */ |
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250 | 309 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4c19), |
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251 | 310 | .driver_data = (kernel_ulong_t)&intel_th_2x, |
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