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2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e 
 kernel/drivers/hwtracing/coresight/coresight-stm.c
....@@ -16,6 +16,7 @@
1616  * (C) 2015-2016 Chunyan Zhang <zhang.chunyan@linaro.org>
1717  */
1818 #include <asm/local.h>
19
+#include <linux/acpi.h>
1920 #include <linux/amba/bus.h>
2021 #include <linux/bitmap.h>
2122 #include <linux/clk.h>
....@@ -107,10 +108,11 @@
107108 	unsigned long		*guaranteed;
108109 };
109110 
111
+DEFINE_CORESIGHT_DEVLIST(stm_devs, "stm");
112
+
110113 /**
111114  * struct stm_drvdata - specifics associated to an STM component
112115  * @base:		memory mapped base address for this component.
113
- * @dev:		the device entity associated to this component.
114116  * @atclk:		optional clock for the core parts of the STM.
115117  * @csdev:		component vitals needed by the framework.
116118  * @spinlock:		only one at a time pls.
....@@ -128,7 +130,6 @@
128130  */
129131 struct stm_drvdata {
130132 	void __iomem		*base;
131
-	struct device		*dev;
132133 	struct clk		*atclk;
133134 	struct coresight_device	*csdev;
134135 	spinlock_t		spinlock;
....@@ -205,13 +206,13 @@
205206 	if (val)
206207 		return -EBUSY;
207208 
208
-	pm_runtime_get_sync(drvdata->dev);
209
+	pm_runtime_get_sync(csdev->dev.parent);
209210 
210211 	spin_lock(&drvdata->spinlock);
211212 	stm_enable_hw(drvdata);
212213 	spin_unlock(&drvdata->spinlock);
213214 
214
-	dev_dbg(drvdata->dev, "STM tracing enabled\n");
215
+	dev_dbg(&csdev->dev, "STM tracing enabled\n");
215216 	return 0;
216217 }
217218 
....@@ -257,6 +258,7 @@
257258 			struct perf_event *event)
258259 {
259260 	struct stm_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
261
+	struct csdev_access *csa = &csdev->access;
260262 
261263 	/*
262264 	 * For as long as the tracer isn't disabled another entity can't
....@@ -269,12 +271,12 @@
269271 		spin_unlock(&drvdata->spinlock);
270272 
271273 		/* Wait until the engine has completely stopped */
272
-		coresight_timeout(drvdata->base, STMTCSR, STMTCSR_BUSY_BIT, 0);
274
+		coresight_timeout(csa, STMTCSR, STMTCSR_BUSY_BIT, 0);
273275 
274
-		pm_runtime_put(drvdata->dev);
276
+		pm_runtime_put(csdev->dev.parent);
275277 
276278 		local_set(&drvdata->mode, CS_MODE_DISABLED);
277
-		dev_dbg(drvdata->dev, "STM tracing disabled\n");
279
+		dev_dbg(&csdev->dev, "STM tracing disabled\n");
278280 	}
279281 }
280282 
....@@ -411,6 +413,7 @@
411413 	void __iomem *ch_addr;
412414 	struct stm_drvdata *drvdata = container_of(stm_data,
413415 						   struct stm_drvdata, stm);
416
+	unsigned int stm_flags;
414417 
415418 	if (!(drvdata && local_read(&drvdata->mode)))
416419 		return -EACCES;
....@@ -420,8 +423,9 @@
420423 
421424 	ch_addr = stm_channel_addr(drvdata, channel);
422425 
423
-	flags = (flags == STP_PACKET_TIMESTAMPED) ? STM_FLAG_TIMESTAMPED : 0;
424
-	flags |= test_bit(channel, drvdata->chs.guaranteed) ?
426
+	stm_flags = (flags & STP_PACKET_TIMESTAMPED) ?
427
+			STM_FLAG_TIMESTAMPED : 0;
428
+	stm_flags |= test_bit(channel, drvdata->chs.guaranteed) ?
425429 			   STM_FLAG_GUARANTEED : 0;
426430 
427431 	if (size > drvdata->write_bytes)
....@@ -431,7 +435,7 @@
431435 
432436 	switch (packet) {
433437 	case STP_PACKET_FLAG:
434
-		ch_addr += stm_channel_off(STM_PKT_TYPE_FLAG, flags);
438
+		ch_addr += stm_channel_off(STM_PKT_TYPE_FLAG, stm_flags);
435439 
436440 		/*
437441 		 * The generic STM core sets a size of '0' on flag packets.
....@@ -443,7 +447,8 @@
443447 		break;
444448 
445449 	case STP_PACKET_DATA:
446
-		ch_addr += stm_channel_off(STM_PKT_TYPE_DATA, flags);
450
+		stm_flags |= (flags & STP_PACKET_MARKED) ? STM_FLAG_MARKED : 0;
451
+		ch_addr += stm_channel_off(STM_PKT_TYPE_DATA, stm_flags);
447452 		stm_send(ch_addr, payload, size,
448453 				drvdata->write_bytes);
449454 		break;
....@@ -685,14 +690,15 @@
685690 	NULL,
686691 };
687692 
688
-static int stm_get_resource_byname(struct device_node *np,
689
-				   char *ch_base, struct resource *res)
693
+#ifdef CONFIG_OF
694
+static int of_stm_get_stimulus_area(struct device *dev, struct resource *res)
690695 {
691696 	const char *name = NULL;
692697 	int index = 0, found = 0;
698
+	struct device_node *np = dev->of_node;
693699 
694700 	while (!of_property_read_string_index(np, "reg-names", index, &name)) {
695
-		if (strcmp(ch_base, name)) {
701
+		if (strcmp("stm-stimulus-base", name)) {
696702 			index++;
697703 			continue;
698704 		}
....@@ -706,6 +712,68 @@
706712 		return -EINVAL;
707713 
708714 	return of_address_to_resource(np, index, res);
715
+}
716
+#else
717
+static inline int of_stm_get_stimulus_area(struct device *dev,
718
+					   struct resource *res)
719
+{
720
+	return -ENOENT;
721
+}
722
+#endif
723
+
724
+#ifdef CONFIG_ACPI
725
+static int acpi_stm_get_stimulus_area(struct device *dev, struct resource *res)
726
+{
727
+	int rc;
728
+	bool found_base = false;
729
+	struct resource_entry *rent;
730
+	LIST_HEAD(res_list);
731
+
732
+	struct acpi_device *adev = ACPI_COMPANION(dev);
733
+
734
+	rc = acpi_dev_get_resources(adev, &res_list, NULL, NULL);
735
+	if (rc < 0)
736
+		return rc;
737
+
738
+	/*
739
+	 * The stimulus base for STM device must be listed as the second memory
740
+	 * resource, followed by the programming base address as described in
741
+	 * "Section 2.3 Resources" in ACPI for CoreSightTM 1.0 Platform Design
742
+	 * document (DEN0067).
743
+	 */
744
+	rc = -ENOENT;
745
+	list_for_each_entry(rent, &res_list, node) {
746
+		if (resource_type(rent->res) != IORESOURCE_MEM)
747
+			continue;
748
+		if (found_base) {
749
+			*res = *rent->res;
750
+			rc = 0;
751
+			break;
752
+		}
753
+
754
+		found_base = true;
755
+	}
756
+
757
+	acpi_dev_free_resource_list(&res_list);
758
+	return rc;
759
+}
760
+#else
761
+static inline int acpi_stm_get_stimulus_area(struct device *dev,
762
+					     struct resource *res)
763
+{
764
+	return -ENOENT;
765
+}
766
+#endif
767
+
768
+static int stm_get_stimulus_area(struct device *dev, struct resource *res)
769
+{
770
+	struct fwnode_handle *fwnode = dev_fwnode(dev);
771
+
772
+	if (is_of_node(fwnode))
773
+		return of_stm_get_stimulus_area(dev, res);
774
+	else if (is_acpi_node(fwnode))
775
+		return acpi_stm_get_stimulus_area(dev, res);
776
+	return -ENOENT;
709777 }
710778 
711779 static u32 stm_fundamental_data_size(struct stm_drvdata *drvdata)
....@@ -763,9 +831,10 @@
763831 	bitmap_clear(drvdata->chs.guaranteed, 0, drvdata->numsp);
764832 }
765833 
766
-static void stm_init_generic_data(struct stm_drvdata *drvdata)
834
+static void stm_init_generic_data(struct stm_drvdata *drvdata,
835
+				  const char *name)
767836 {
768
-	drvdata->stm.name = dev_name(drvdata->dev);
837
+	drvdata->stm.name = name;
769838 
770839 	/*
771840 	 * MasterIDs are assigned at HW design phase. As such the core is
....@@ -793,21 +862,17 @@
793862 	struct stm_drvdata *drvdata;
794863 	struct resource *res = &adev->res;
795864 	struct resource ch_res;
796
-	size_t res_size, bitmap_size;
865
+	size_t bitmap_size;
797866 	struct coresight_desc desc = { 0 };
798
-	struct device_node *np = adev->dev.of_node;
799867 
800
-	if (np) {
801
-		pdata = of_get_coresight_platform_data(dev, np);
802
-		if (IS_ERR(pdata))
803
-			return PTR_ERR(pdata);
804
-		adev->dev.platform_data = pdata;
805
-	}
868
+	desc.name = coresight_alloc_device_name(&stm_devs, dev);
869
+	if (!desc.name)
870
+		return -ENOMEM;
871
+
806872 	drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
807873 	if (!drvdata)
808874 		return -ENOMEM;
809875 
810
-	drvdata->dev = &adev->dev;
811876 	drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
812877 	if (!IS_ERR(drvdata->atclk)) {
813878 		ret = clk_prepare_enable(drvdata->atclk);
....@@ -820,8 +885,9 @@
820885 	if (IS_ERR(base))
821886 		return PTR_ERR(base);
822887 	drvdata->base = base;
888
+	desc.access = CSDEV_ACCESS_IOMEM(base);
823889 
824
-	ret = stm_get_resource_byname(np, "stm-stimulus-base", &ch_res);
890
+	ret = stm_get_stimulus_area(dev, &ch_res);
825891 	if (ret)
826892 		return ret;
827893 	drvdata->chs.phys = ch_res.start;
....@@ -833,15 +899,11 @@
833899 
834900 	drvdata->write_bytes = stm_fundamental_data_size(drvdata);
835901 
836
-	if (boot_nr_channel) {
902
+	if (boot_nr_channel)
837903 		drvdata->numsp = boot_nr_channel;
838
-		res_size = min((resource_size_t)(boot_nr_channel *
839
-				  BYTES_PER_CHANNEL), resource_size(res));
840
-	} else {
904
+	else
841905 		drvdata->numsp = stm_num_stimulus_port(drvdata);
842
-		res_size = min((resource_size_t)(drvdata->numsp *
843
-				 BYTES_PER_CHANNEL), resource_size(res));
844
-	}
906
+
845907 	bitmap_size = BITS_TO_LONGS(drvdata->numsp) * sizeof(long);
846908 
847909 	guaranteed = devm_kzalloc(dev, bitmap_size, GFP_KERNEL);
....@@ -852,13 +914,21 @@
852914 	spin_lock_init(&drvdata->spinlock);
853915 
854916 	stm_init_default_data(drvdata);
855
-	stm_init_generic_data(drvdata);
917
+	stm_init_generic_data(drvdata, desc.name);
856918 
857919 	if (stm_register_device(dev, &drvdata->stm, THIS_MODULE)) {
858920 		dev_info(dev,
859
-			 "stm_register_device failed, probing deffered\n");
921
+			 "%s : stm_register_device failed, probing deferred\n",
922
+			 desc.name);
860923 		return -EPROBE_DEFER;
861924 	}
925
+
926
+	pdata = coresight_get_platform_data(dev);
927
+	if (IS_ERR(pdata)) {
928
+		ret = PTR_ERR(pdata);
929
+		goto stm_unregister;
930
+	}
931
+	adev->dev.platform_data = pdata;
862932 
863933 	desc.type = CORESIGHT_DEV_TYPE_SOURCE;
864934 	desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE;
....@@ -874,12 +944,22 @@
874944 
875945 	pm_runtime_put(&adev->dev);
876946 
877
-	dev_info(dev, "%s initialized\n", (char *)id->data);
947
+	dev_info(&drvdata->csdev->dev, "%s initialized\n",
948
+		 (char *)coresight_get_uci_data(id));
878949 	return 0;
879950 
880951 stm_unregister:
881952 	stm_unregister_device(&drvdata->stm);
882953 	return ret;
954
+}
955
+
956
+static void stm_remove(struct amba_device *adev)
957
+{
958
+	struct stm_drvdata *drvdata = dev_get_drvdata(&adev->dev);
959
+
960
+	coresight_unregister(drvdata->csdev);
961
+
962
+	stm_unregister_device(&drvdata->stm);
883963 }
884964 
885965 #ifdef CONFIG_PM
....@@ -909,18 +989,12 @@
909989 };
910990 
911991 static const struct amba_id stm_ids[] = {
912
-	{
913
-		.id     = 0x000bb962,
914
-		.mask   = 0x000fffff,
915
-		.data	= "STM32",
916
-	},
917
-	{
918
-		.id	= 0x000bb963,
919
-		.mask	= 0x000fffff,
920
-		.data	= "STM500",
921
-	},
992
+	CS_AMBA_ID_DATA(0x000bb962, "STM32"),
993
+	CS_AMBA_ID_DATA(0x000bb963, "STM500"),
922994 	{ 0, 0},
923995 };
996
+
997
+MODULE_DEVICE_TABLE(amba, stm_ids);
924998 
925999 static struct amba_driver stm_driver = {
9261000 	.drv = {
....@@ -930,7 +1004,12 @@
9301004 		.suppress_bind_attrs = true,
9311005 	},
9321006 	.probe          = stm_probe,
1007
+	.remove         = stm_remove,
9331008 	.id_table	= stm_ids,
9341009 };
9351010 
936
-builtin_amba_driver(stm_driver);
1011
+module_amba_driver(stm_driver);
1012
+
1013
+MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
1014
+MODULE_DESCRIPTION("Arm CoreSight System Trace Macrocell driver");
1015
+MODULE_LICENSE("GPL v2");