modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/gpu/drm/tegra/plane.c
..
..
@@ -1,13 +1,14 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Copyright (C) 2017 NVIDIA CORPORATION.  All rights reserved.
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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+
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+#include <linux/iommu.h>
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 #include <drm/drm_atomic.h>
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 #include <drm/drm_atomic_helper.h>
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+#include <drm/drm_fourcc.h>
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+#include <drm/drm_gem_framebuffer_helper.h>
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 #include <drm/drm_plane_helper.h>
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13
 
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 #include "dc.h"
..
..
@@ -25,6 +26,7 @@
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 {
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 	struct tegra_plane *p = to_tegra_plane(plane);
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 	struct tegra_plane_state *state;
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+	unsigned int i;
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 	if (plane->state)
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 		__drm_atomic_helper_plane_destroy_state(plane->state);
..
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@@ -38,6 +40,9 @@
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 		plane->state->plane = plane;
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 		plane->state->zpos = p->index;
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 		plane->state->normalized_zpos = p->index;
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+
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+		for (i = 0; i < 3; i++)
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+			state->iova[i] = DMA_MAPPING_ERROR;
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 	}
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 }
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..
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@@ -56,11 +61,17 @@
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 	copy->tiling = state->tiling;
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 	copy->format = state->format;
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 	copy->swap = state->swap;
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-	copy->bottom_up = state->bottom_up;
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+	copy->reflect_x = state->reflect_x;
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+	copy->reflect_y = state->reflect_y;
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 	copy->opaque = state->opaque;
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 	for (i = 0; i < 2; i++)
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 		copy->blending[i] = state->blending[i];
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+
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+	for (i = 0; i < 3; i++) {
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+		copy->iova[i] = DMA_MAPPING_ERROR;
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+		copy->sgt[i] = NULL;
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+	}
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 	return &copy->base;
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 }
..
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@@ -97,6 +108,110 @@
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 	.format_mod_supported = tegra_plane_format_mod_supported,
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 };
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110
 
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+static int tegra_dc_pin(struct tegra_dc *dc, struct tegra_plane_state *state)
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+{
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+	struct iommu_domain *domain = iommu_get_domain_for_dev(dc->dev);
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+	unsigned int i;
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+	int err;
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+
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+	for (i = 0; i < state->base.fb->format->num_planes; i++) {
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+		struct tegra_bo *bo = tegra_fb_get_plane(state->base.fb, i);
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+		dma_addr_t phys_addr, *phys;
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+		struct sg_table *sgt;
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+
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+		if (!domain || dc->client.group)
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+			phys = &phys_addr;
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+		else
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+			phys = NULL;
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+
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+		sgt = host1x_bo_pin(dc->dev, &bo->base, phys);
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+		if (IS_ERR(sgt)) {
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+			err = PTR_ERR(sgt);
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+			goto unpin;
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+		}
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+
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+		if (sgt) {
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+			err = dma_map_sgtable(dc->dev, sgt, DMA_TO_DEVICE, 0);
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+			if (err)
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+				goto unpin;
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+
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+			/*
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+			 * The display controller needs contiguous memory, so
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+			 * fail if the buffer is discontiguous and we fail to
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+			 * map its SG table to a single contiguous chunk of
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+			 * I/O virtual memory.
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+			 */
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+			if (sgt->nents > 1) {
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+				err = -EINVAL;
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+				goto unpin;
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+			}
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+
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+			state->iova[i] = sg_dma_address(sgt->sgl);
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+			state->sgt[i] = sgt;
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+		} else {
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+			state->iova[i] = phys_addr;
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+		}
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+	}
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+
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+	return 0;
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+
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+unpin:
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+	dev_err(dc->dev, "failed to map plane %u: %d\n", i, err);
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+
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+	while (i--) {
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+		struct tegra_bo *bo = tegra_fb_get_plane(state->base.fb, i);
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+		struct sg_table *sgt = state->sgt[i];
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+
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+		if (sgt)
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+			dma_unmap_sgtable(dc->dev, sgt, DMA_TO_DEVICE, 0);
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+
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+		host1x_bo_unpin(dc->dev, &bo->base, sgt);
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+		state->iova[i] = DMA_MAPPING_ERROR;
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+		state->sgt[i] = NULL;
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+	}
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+
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+	return err;
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+}
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+
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+static void tegra_dc_unpin(struct tegra_dc *dc, struct tegra_plane_state *state)
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+{
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+	unsigned int i;
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+
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+	for (i = 0; i < state->base.fb->format->num_planes; i++) {
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+		struct tegra_bo *bo = tegra_fb_get_plane(state->base.fb, i);
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+		struct sg_table *sgt = state->sgt[i];
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+
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+		if (sgt)
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+			dma_unmap_sgtable(dc->dev, sgt, DMA_TO_DEVICE, 0);
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+
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+		host1x_bo_unpin(dc->dev, &bo->base, sgt);
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+		state->iova[i] = DMA_MAPPING_ERROR;
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+		state->sgt[i] = NULL;
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+	}
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+}
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+
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+int tegra_plane_prepare_fb(struct drm_plane *plane,
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+			   struct drm_plane_state *state)
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+{
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+	struct tegra_dc *dc = to_tegra_dc(state->crtc);
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+
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+	if (!state->fb)
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+		return 0;
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+
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+	drm_gem_fb_prepare_fb(plane, state);
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+
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+	return tegra_dc_pin(dc, to_tegra_plane_state(state));
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+}
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+
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+void tegra_plane_cleanup_fb(struct drm_plane *plane,
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+			    struct drm_plane_state *state)
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+{
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+	struct tegra_dc *dc = to_tegra_dc(state->crtc);
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+
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+	if (dc)
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+		tegra_dc_unpin(dc, to_tegra_plane_state(state));
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+}
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+
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 int tegra_plane_state_add(struct tegra_plane *plane,
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 			  struct drm_plane_state *state)
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 {