forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/drivers/gpu/drm/sun4i/sun8i_ui_scaler.h
....@@ -11,6 +11,9 @@
1111
1212 #include "sun8i_mixer.h"
1313
14
+#define DE2_UI_SCALER_UNIT_SIZE 0x10000
15
+#define DE3_UI_SCALER_UNIT_SIZE 0x08000
16
+
1417 /* this two macros assumes 16 fractional bits which is standard in DRM */
1518 #define SUN8I_UI_SCALER_SCALE_MIN 1
1619 #define SUN8I_UI_SCALER_SCALE_MAX ((1UL << 20) - 1)
....@@ -20,23 +23,14 @@
2023 #define SUN8I_UI_SCALER_COEFF_COUNT 16
2124 #define SUN8I_UI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1))
2225
23
-#define SUN8I_SCALER_GSU_CTRL(vi_cnt, ui_idx) \
24
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x0)
25
-#define SUN8I_SCALER_GSU_OUTSIZE(vi_cnt, ui_idx) \
26
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x40)
27
-#define SUN8I_SCALER_GSU_INSIZE(vi_cnt, ui_idx) \
28
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x80)
29
-#define SUN8I_SCALER_GSU_HSTEP(vi_cnt, ui_idx) \
30
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x88)
31
-#define SUN8I_SCALER_GSU_VSTEP(vi_cnt, ui_idx) \
32
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x8c)
33
-#define SUN8I_SCALER_GSU_HPHASE(vi_cnt, ui_idx) \
34
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x90)
35
-#define SUN8I_SCALER_GSU_VPHASE(vi_cnt, ui_idx) \
36
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x98)
37
-#define SUN8I_SCALER_GSU_HCOEFF(vi_cnt, ui_idx, index) \
38
- (0x20000 + 0x20000 * (vi_cnt) + 0x10000 * (ui_idx) + 0x200 + \
39
- 0x4 * (index))
26
+#define SUN8I_SCALER_GSU_CTRL(base) ((base) + 0x0)
27
+#define SUN8I_SCALER_GSU_OUTSIZE(base) ((base) + 0x40)
28
+#define SUN8I_SCALER_GSU_INSIZE(base) ((base) + 0x80)
29
+#define SUN8I_SCALER_GSU_HSTEP(base) ((base) + 0x88)
30
+#define SUN8I_SCALER_GSU_VSTEP(base) ((base) + 0x8c)
31
+#define SUN8I_SCALER_GSU_HPHASE(base) ((base) + 0x90)
32
+#define SUN8I_SCALER_GSU_VPHASE(base) ((base) + 0x98)
33
+#define SUN8I_SCALER_GSU_HCOEFF(base, index) ((base) + 0x200 + 0x4 * (index))
4034
4135 #define SUN8I_SCALER_GSU_CTRL_EN BIT(0)
4236 #define SUN8I_SCALER_GSU_CTRL_COEFF_RDY BIT(4)