modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/gpu/drm/sun4i/sun8i_ui_layer.c
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@@ -1,3 +1,4 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Copyright (C) Icenowy Zheng <icenowy@aosc.io>
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  *
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@@ -6,31 +7,30 @@
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  *   Copyright (C) 2015 NextThing Co
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  *
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  *   Maxime Ripard <maxime.ripard@free-electrons.com>
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License as
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- * published by the Free Software Foundation; either version 2 of
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- * the License, or (at your option) any later version.
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  */
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 #include <drm/drm_atomic.h>
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 #include <drm/drm_atomic_helper.h>
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 #include <drm/drm_crtc.h>
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-#include <drm/drm_crtc_helper.h>
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 #include <drm/drm_fb_cma_helper.h>
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+#include <drm/drm_fourcc.h>
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 #include <drm/drm_gem_cma_helper.h>
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+#include <drm/drm_gem_framebuffer_helper.h>
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 #include <drm/drm_plane_helper.h>
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-#include <drm/drmP.h>
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+#include <drm/drm_probe_helper.h>
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21
 
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-#include "sun8i_ui_layer.h"
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 #include "sun8i_mixer.h"
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+#include "sun8i_ui_layer.h"
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 #include "sun8i_ui_scaler.h"
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 static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel,
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 				  int overlay, bool enable, unsigned int zpos,
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 				  unsigned int old_zpos)
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 {
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-	u32 val;
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+	u32 val, bld_base, ch_base;
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+
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+	bld_base = sun8i_blender_base(mixer);
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+	ch_base = sun8i_channel_base(mixer, channel);
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 	DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n",
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 			 enable ? "En" : "Dis", channel, overlay);
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@@ -41,17 +41,17 @@
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 		val = 0;
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 	regmap_update_bits(mixer->engine.regs,
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-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(channel, overlay),
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+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
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 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val);
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 	if (!enable || zpos != old_zpos) {
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 		regmap_update_bits(mixer->engine.regs,
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-				   SUN8I_MIXER_BLEND_PIPE_CTL,
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+				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
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 				   SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos),
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 				   0);
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 		regmap_update_bits(mixer->engine.regs,
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-				   SUN8I_MIXER_BLEND_ROUTE,
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+				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
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 				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos),
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 				   0);
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 	}
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@@ -60,12 +60,13 @@
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 		val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos);
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 		regmap_update_bits(mixer->engine.regs,
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-				   SUN8I_MIXER_BLEND_PIPE_CTL, val, val);
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+				   SUN8I_MIXER_BLEND_PIPE_CTL(bld_base),
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+				   val, val);
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 		val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
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 		regmap_update_bits(mixer->engine.regs,
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-				   SUN8I_MIXER_BLEND_ROUTE,
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+				   SUN8I_MIXER_BLEND_ROUTE(bld_base),
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 				   SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos),
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 				   val);
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 	}
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@@ -77,11 +78,15 @@
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 {
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 	struct drm_plane_state *state = plane->state;
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 	u32 src_w, src_h, dst_w, dst_h;
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+	u32 bld_base, ch_base;
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 	u32 outsize, insize;
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 	u32 hphase, vphase;
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 	DRM_DEBUG_DRIVER("Updating UI channel %d overlay %d\n",
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 			 channel, overlay);
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+
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+	bld_base = sun8i_blender_base(mixer);
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+	ch_base = sun8i_channel_base(mixer, channel);
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 	src_w = drm_rect_width(&state->src) >> 16;
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 	src_h = drm_rect_height(&state->src) >> 16;
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@@ -103,8 +108,8 @@
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 		regmap_write(mixer->engine.regs,
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 			     SUN8I_MIXER_GLOBAL_SIZE,
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 			     outsize);
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-		regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_OUTSIZE,
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-			     outsize);
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+		regmap_write(mixer->engine.regs,
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+			     SUN8I_MIXER_BLEND_OUTSIZE(bld_base), outsize);
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 		if (state->crtc)
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 			interlaced = state->crtc->state->adjusted_mode.flags
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@@ -116,7 +121,7 @@
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 			val = 0;
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 		regmap_update_bits(mixer->engine.regs,
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-				   SUN8I_MIXER_BLEND_OUTCTL,
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+				   SUN8I_MIXER_BLEND_OUTCTL(bld_base),
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 				   SUN8I_MIXER_BLEND_OUTCTL_INTERLACED,
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 				   val);
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@@ -129,10 +134,10 @@
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 			 state->src.x1 >> 16, state->src.y1 >> 16);
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 	DRM_DEBUG_DRIVER("Layer source size W: %d H: %d\n", src_w, src_h);
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 	regmap_write(mixer->engine.regs,
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-		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(channel, overlay),
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+		     SUN8I_MIXER_CHAN_UI_LAYER_SIZE(ch_base, overlay),
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 		     insize);
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 	regmap_write(mixer->engine.regs,
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-		     SUN8I_MIXER_CHAN_UI_OVL_SIZE(channel),
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+		     SUN8I_MIXER_CHAN_UI_OVL_SIZE(ch_base),
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 		     insize);
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 	if (insize != outsize || hphase || vphase) {
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@@ -156,10 +161,10 @@
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 			 state->dst.x1, state->dst.y1);
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 	DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h);
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 	regmap_write(mixer->engine.regs,
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-		     SUN8I_MIXER_BLEND_ATTR_COORD(zpos),
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+		     SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos),
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 		     SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1));
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 	regmap_write(mixer->engine.regs,
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-		     SUN8I_MIXER_BLEND_ATTR_INSIZE(zpos),
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+		     SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos),
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 		     outsize);
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 	return 0;
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@@ -169,18 +174,22 @@
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 					 int overlay, struct drm_plane *plane)
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 {
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 	struct drm_plane_state *state = plane->state;
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-	const struct de2_fmt_info *fmt_info;
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-	u32 val;
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+	const struct drm_format_info *fmt;
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+	u32 val, ch_base, hw_fmt;
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+	int ret;
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-	fmt_info = sun8i_mixer_format_info(state->fb->format->format);
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-	if (!fmt_info || !fmt_info->rgb) {
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+	ch_base = sun8i_channel_base(mixer, channel);
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+
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+	fmt = state->fb->format;
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+	ret = sun8i_mixer_drm_format_to_hw(fmt->format, &hw_fmt);
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+	if (ret || fmt->is_yuv) {
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 		DRM_DEBUG_DRIVER("Invalid format\n");
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 		return -EINVAL;
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 	}
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-	val = fmt_info->de2_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
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+	val = hw_fmt << SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_OFFSET;
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 	regmap_update_bits(mixer->engine.regs,
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-			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(channel, overlay),
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+			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay),
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 			   SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val);
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 	return 0;
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@@ -193,7 +202,10 @@
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 	struct drm_framebuffer *fb = state->fb;
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 	struct drm_gem_cma_object *gem;
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 	dma_addr_t paddr;
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+	u32 ch_base;
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 	int bpp;
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+
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+	ch_base = sun8i_channel_base(mixer, channel);
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 	/* Get the physical address of the buffer in memory */
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 	gem = drm_fb_cma_get_gem_obj(fb, 0);
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@@ -211,13 +223,13 @@
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 	/* Set the line width */
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 	DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]);
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 	regmap_write(mixer->engine.regs,
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-		     SUN8I_MIXER_CHAN_UI_LAYER_PITCH(channel, overlay),
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+		     SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, overlay),
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 		     fb->pitches[0]);
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 	DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr);
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 	regmap_write(mixer->engine.regs,
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-		     SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(channel, overlay),
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+		     SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, overlay),
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 		     lower_32_bits(paddr));
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 	return 0;
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@@ -286,7 +298,8 @@
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 			      true, zpos, old_zpos);
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 }
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-static struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
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+static const struct drm_plane_helper_funcs sun8i_ui_layer_helper_funcs = {
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+	.prepare_fb	= drm_gem_fb_prepare_fb,
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 	.atomic_check	= sun8i_ui_layer_atomic_check,
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 	.atomic_disable	= sun8i_ui_layer_atomic_disable,
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 	.atomic_update	= sun8i_ui_layer_atomic_update,