modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
..
..
@@ -1,102 +1,283 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
1
2
 /*
2
3
  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
3
4
  * Author:Mark Yao <mark.yao@rock-chips.com>
4
5
  *
5
6
  * based on exynos_drm_drv.c
6
- *
7
- * This software is licensed under the terms of the GNU General Public
8
- * License version 2, as published by the Free Software Foundation, and
9
- * may be copied, distributed, and modified under those terms.
10
- *
11
- * This program is distributed in the hope that it will be useful,
12
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
- * GNU General Public License for more details.
15
7
  */
16
8
 
17
-#include <drm/drmP.h>
18
-#include <drm/drm_atomic.h>
19
-#include <drm/drm_crtc_helper.h>
20
-#include <drm/drm_fb_helper.h>
21
-#include <drm/drm_gem_cma_helper.h>
22
-#include <drm/drm_of.h>
23
-#include <linux/devfreq.h>
24
-#include <linux/dma-buf.h>
9
+#include <linux/dma-buf-cache.h>
25
10
 #include <linux/dma-mapping.h>
26
11
 #include <linux/dma-iommu.h>
27
12
 #include <linux/genalloc.h>
28
13
 #include <linux/pm_runtime.h>
29
-#include <linux/memblock.h>
30
14
 #include <linux/module.h>
31
15
 #include <linux/of_address.h>
32
16
 #include <linux/of_graph.h>
17
+#include <linux/of_platform.h>
33
18
 #include <linux/clk.h>
34
-#include <linux/clk-provider.h>
35
19
 #include <linux/component.h>
36
20
 #include <linux/console.h>
37
21
 #include <linux/iommu.h>
38
22
 #include <linux/of_reserved_mem.h>
39
23
 
24
+#include <drm/drm_debugfs.h>
25
+#include <drm/drm_drv.h>
26
+#include <drm/drm_displayid.h>
27
+#include <drm/drm_fb_helper.h>
28
+#include <drm/drm_gem_cma_helper.h>
29
+#include <drm/drm_of.h>
30
+#include <drm/drm_probe_helper.h>
31
+#include <drm/drm_vblank.h>
32
+
40
33
 #include "rockchip_drm_drv.h"
41
34
 #include "rockchip_drm_fb.h"
42
35
 #include "rockchip_drm_fbdev.h"
43
36
 #include "rockchip_drm_gem.h"
37
+#include "rockchip_drm_logo.h"
44
38
 
45
-#include "../drm_internal.h"
39
+#include "../drm_crtc_internal.h"
46
40
 
47
41
 #define DRIVER_NAME	"rockchip"
48
42
 #define DRIVER_DESC	"RockChip Soc DRM"
49
43
 #define DRIVER_DATE	"20140818"
50
-#define DRIVER_MAJOR	2
44
+#define DRIVER_MAJOR	3
51
45
 #define DRIVER_MINOR	0
52
-#define DRIVER_PATCH	0
53
-
54
-/***********************************************************************
55
- *  Rockchip DRM driver version
56
- *
57
- *  v2.0.0	: add basic version for linux 4.19 rockchip drm driver(hjc)
58
- *
59
- **********************************************************************/
60
46
 
61
47
 #if IS_ENABLED(CONFIG_DRM_ROCKCHIP_VVOP)
62
48
 static bool is_support_iommu = false;
63
49
 #else
64
50
 static bool is_support_iommu = true;
65
51
 #endif
52
+static bool iommu_reserve_map;
53
+
66
54
 static struct drm_driver rockchip_drm_driver;
67
55
 
68
-struct rockchip_drm_mode_set {
69
-	struct list_head head;
70
-	struct drm_framebuffer *fb;
71
-	struct drm_connector *connector;
72
-	struct drm_crtc *crtc;
73
-	struct drm_display_mode *mode;
74
-	int clock;
75
-	int hdisplay;
76
-	int vdisplay;
77
-	int vrefresh;
78
-	int flags;
79
-	int picture_aspect_ratio;
80
-	int crtc_hsync_end;
81
-	int crtc_vsync_end;
56
+static unsigned int drm_debug;
57
+module_param_named(debug, drm_debug, int, 0600);
82
58
 
83
-	int left_margin;
84
-	int right_margin;
85
-	int top_margin;
86
-	int bottom_margin;
59
+static inline bool rockchip_drm_debug_enabled(enum rockchip_drm_debug_category category)
60
+{
61
+	return unlikely(drm_debug & category);
62
+}
87
63
 
88
-	unsigned int brightness;
89
-	unsigned int contrast;
90
-	unsigned int saturation;
91
-	unsigned int hue;
64
+__printf(3, 4)
65
+void rockchip_drm_dbg(const struct device *dev, enum rockchip_drm_debug_category category,
66
+		      const char *format, ...)
67
+{
68
+	struct va_format vaf;
69
+	va_list args;
92
70
 
93
-	bool mode_changed;
94
-	bool force_output;
95
-	int ratio;
96
-};
71
+	if (!rockchip_drm_debug_enabled(category))
72
+		return;
73
+
74
+	va_start(args, format);
75
+	vaf.fmt = format;
76
+	vaf.va = &args;
77
+
78
+	if (dev)
79
+		dev_printk(KERN_DEBUG, dev, "%pV", &vaf);
80
+	else
81
+		printk(KERN_DEBUG "%pV", &vaf);
82
+
83
+	va_end(args);
84
+}
85
+
86
+/**
87
+ * rockchip_drm_wait_vact_end
88
+ * @crtc: CRTC to enable line flag
89
+ * @mstimeout: millisecond for timeout
90
+ *
91
+ * Wait for vact_end line flag irq or timeout.
92
+ *
93
+ * Returns:
94
+ * Zero on success, negative errno on failure.
95
+ */
96
+int rockchip_drm_wait_vact_end(struct drm_crtc *crtc, unsigned int mstimeout)
97
+{
98
+	struct rockchip_drm_private *priv;
99
+	int pipe, ret = 0;
100
+
101
+	if (!crtc)
102
+		return -ENODEV;
103
+
104
+	if (mstimeout <= 0)
105
+		return -EINVAL;
106
+
107
+	priv = crtc->dev->dev_private;
108
+	pipe = drm_crtc_index(crtc);
109
+
110
+	if (priv->crtc_funcs[pipe] && priv->crtc_funcs[pipe]->wait_vact_end)
111
+		ret = priv->crtc_funcs[pipe]->wait_vact_end(crtc, mstimeout);
112
+
113
+	return ret;
114
+}
115
+EXPORT_SYMBOL(rockchip_drm_wait_vact_end);
116
+
117
+void drm_mode_convert_to_split_mode(struct drm_display_mode *mode)
118
+{
119
+	u16 hactive, hfp, hsync, hbp;
120
+
121
+	hactive = mode->hdisplay;
122
+	hfp = mode->hsync_start - mode->hdisplay;
123
+	hsync = mode->hsync_end - mode->hsync_start;
124
+	hbp = mode->htotal - mode->hsync_end;
125
+
126
+	mode->clock *= 2;
127
+	mode->crtc_clock *= 2;
128
+	mode->hdisplay = hactive * 2;
129
+	mode->hsync_start = mode->hdisplay + hfp * 2;
130
+	mode->hsync_end = mode->hsync_start + hsync * 2;
131
+	mode->htotal = mode->hsync_end + hbp * 2;
132
+	drm_mode_set_name(mode);
133
+}
134
+EXPORT_SYMBOL(drm_mode_convert_to_split_mode);
135
+
136
+void drm_mode_convert_to_origin_mode(struct drm_display_mode *mode)
137
+{
138
+	u16 hactive, hfp, hsync, hbp;
139
+
140
+	hactive = mode->hdisplay;
141
+	hfp = mode->hsync_start - mode->hdisplay;
142
+	hsync = mode->hsync_end - mode->hsync_start;
143
+	hbp = mode->htotal - mode->hsync_end;
144
+
145
+	mode->clock /= 2;
146
+	mode->crtc_clock /= 2;
147
+	mode->hdisplay = hactive / 2;
148
+	mode->hsync_start = mode->hdisplay + hfp / 2;
149
+	mode->hsync_end = mode->hsync_start + hsync / 2;
150
+	mode->htotal = mode->hsync_end + hbp / 2;
151
+}
152
+EXPORT_SYMBOL(drm_mode_convert_to_origin_mode);
153
+
154
+/**
155
+ * drm_connector_oob_hotplug_event - Report out-of-band hotplug event to connector
156
+ * @connector: connector to report the event on
157
+ *
158
+ * On some hardware a hotplug event notification may come from outside the display
159
+ * driver / device. An example of this is some USB Type-C setups where the hardware
160
+ * muxes the DisplayPort data and aux-lines but does not pass the altmode HPD
161
+ * status bit to the GPU's DP HPD pin.
162
+ *
163
+ * This function can be used to report these out-of-band events after obtaining
164
+ * a drm_connector reference through calling drm_connector_find_by_fwnode().
165
+ */
166
+void drm_connector_oob_hotplug_event(struct fwnode_handle *connector_fwnode)
167
+{
168
+	struct rockchip_drm_sub_dev *sub_dev;
169
+
170
+	if (!connector_fwnode || !connector_fwnode->dev)
171
+		return;
172
+
173
+	sub_dev = rockchip_drm_get_sub_dev(dev_of_node(connector_fwnode->dev));
174
+
175
+	if (sub_dev && sub_dev->connector && sub_dev->oob_hotplug_event)
176
+		sub_dev->oob_hotplug_event(sub_dev->connector);
177
+}
178
+EXPORT_SYMBOL(drm_connector_oob_hotplug_event);
179
+
180
+uint32_t rockchip_drm_get_bpp(const struct drm_format_info *info)
181
+{
182
+	/* use whatever a driver has set */
183
+	if (info->cpp[0])
184
+		return info->cpp[0] * 8;
185
+
186
+	switch (info->format) {
187
+	case DRM_FORMAT_YUV420_8BIT:
188
+		return 12;
189
+	case DRM_FORMAT_YUV420_10BIT:
190
+		return 15;
191
+	case DRM_FORMAT_VUY101010:
192
+		return 30;
193
+	default:
194
+		break;
195
+	}
196
+
197
+	/* all attempts failed */
198
+	return 0;
199
+}
200
+EXPORT_SYMBOL(rockchip_drm_get_bpp);
201
+
202
+uint32_t rockchip_drm_get_cycles_per_pixel(uint32_t bus_format)
203
+{
204
+	switch (bus_format) {
205
+	case MEDIA_BUS_FMT_RGB565_1X16:
206
+	case MEDIA_BUS_FMT_RGB666_1X18:
207
+	case MEDIA_BUS_FMT_RGB888_1X24:
208
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
209
+		return 1;
210
+	case MEDIA_BUS_FMT_RGB565_2X8_LE:
211
+	case MEDIA_BUS_FMT_BGR565_2X8_LE:
212
+		return 2;
213
+	case MEDIA_BUS_FMT_RGB666_3X6:
214
+	case MEDIA_BUS_FMT_RGB888_3X8:
215
+	case MEDIA_BUS_FMT_BGR888_3X8:
216
+		return 3;
217
+	case MEDIA_BUS_FMT_RGB888_DUMMY_4X8:
218
+	case MEDIA_BUS_FMT_BGR888_DUMMY_4X8:
219
+		return 4;
220
+	default:
221
+		return 1;
222
+	}
223
+}
224
+EXPORT_SYMBOL(rockchip_drm_get_cycles_per_pixel);
225
+
226
+/**
227
+ * rockchip_drm_of_find_possible_crtcs - find the possible CRTCs for an active
228
+ * encoder port
229
+ * @dev: DRM device
230
+ * @port: encoder port to scan for endpoints
231
+ *
232
+ * Scan all active endpoints attached to a port, locate their attached CRTCs,
233
+ * and generate the DRM mask of CRTCs which may be attached to this
234
+ * encoder.
235
+ *
236
+ * See Documentation/devicetree/bindings/graph.txt for the bindings.
237
+ */
238
+uint32_t rockchip_drm_of_find_possible_crtcs(struct drm_device *dev,
239
+					     struct device_node *port)
240
+{
241
+	struct device_node *remote_port, *ep;
242
+	uint32_t possible_crtcs = 0;
243
+
244
+	for_each_endpoint_of_node(port, ep) {
245
+		if (!of_device_is_available(ep))
246
+			continue;
247
+
248
+		remote_port = of_graph_get_remote_port(ep);
249
+		if (!remote_port) {
250
+			of_node_put(ep);
251
+			continue;
252
+		}
253
+
254
+		possible_crtcs |= drm_of_crtc_port_mask(dev, remote_port);
255
+
256
+		of_node_put(remote_port);
257
+	}
258
+
259
+	return possible_crtcs;
260
+}
261
+EXPORT_SYMBOL(rockchip_drm_of_find_possible_crtcs);
97
262
 
98
263
 static DEFINE_MUTEX(rockchip_drm_sub_dev_lock);
99
264
 static LIST_HEAD(rockchip_drm_sub_dev_list);
265
+
266
+void rockchip_connector_update_vfp_for_vrr(struct drm_crtc *crtc, struct drm_display_mode *mode,
267
+					   int vfp)
268
+{
269
+	struct rockchip_drm_sub_dev *sub_dev;
270
+
271
+	mutex_lock(&rockchip_drm_sub_dev_lock);
272
+	list_for_each_entry(sub_dev, &rockchip_drm_sub_dev_list, list) {
273
+		if (sub_dev->connector->state->crtc == crtc) {
274
+			if (sub_dev->update_vfp_for_vrr)
275
+				sub_dev->update_vfp_for_vrr(sub_dev->connector, mode, vfp);
276
+		}
277
+	}
278
+	mutex_unlock(&rockchip_drm_sub_dev_lock);
279
+}
280
+EXPORT_SYMBOL(rockchip_connector_update_vfp_for_vrr);
100
281
 
101
282
 void rockchip_drm_register_sub_dev(struct rockchip_drm_sub_dev *sub_dev)
102
283
 {
..
..
@@ -150,6 +331,26 @@
150
331
 }
151
332
 EXPORT_SYMBOL(rockchip_drm_get_sub_dev_type);
152
333
 
334
+u32 rockchip_drm_get_scan_line_time_ns(void)
335
+{
336
+	struct rockchip_drm_sub_dev *sub_dev = NULL;
337
+	struct drm_display_mode *mode;
338
+	int linedur_ns = 0;
339
+
340
+	mutex_lock(&rockchip_drm_sub_dev_lock);
341
+	list_for_each_entry(sub_dev, &rockchip_drm_sub_dev_list, list) {
342
+		if (sub_dev->connector->encoder && sub_dev->connector->state->crtc) {
343
+			mode = &sub_dev->connector->state->crtc->state->adjusted_mode;
344
+			linedur_ns  = div_u64((u64) mode->crtc_htotal * 1000000, mode->crtc_clock);
345
+			break;
346
+		}
347
+	}
348
+	mutex_unlock(&rockchip_drm_sub_dev_lock);
349
+
350
+	return linedur_ns;
351
+}
352
+EXPORT_SYMBOL(rockchip_drm_get_scan_line_time_ns);
353
+
153
354
 void rockchip_drm_te_handle(struct drm_crtc *crtc)
154
355
 {
155
356
 	struct rockchip_drm_private *priv = crtc->dev->dev_private;
..
..
@@ -165,22 +366,22 @@
165
366
 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
166
367
 		   1430, 1650, 0, 720, 725, 730, 750, 0,
167
368
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
168
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
369
+	  .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
169
370
 	/* 16 - 1920x1080@60Hz 16:9 */
170
371
 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
171
372
 		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
172
373
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
173
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
374
+	  .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
174
375
 	/* 31 - 1920x1080@50Hz 16:9 */
175
376
 	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
176
377
 		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
177
378
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
178
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
379
+	  .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
179
380
 	/* 19 - 1280x720@50Hz 16:9 */
180
381
 	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
181
382
 		   1760, 1980, 0, 720, 725, 730, 750, 0,
182
383
 		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
183
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
384
+	  .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
184
385
 	/* 0x10 - 1024x768@60Hz */
185
386
 	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
186
387
 		   1184, 1344, 0,  768, 771, 777, 806, 0,
..
..
@@ -189,12 +390,12 @@
189
390
 	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
190
391
 		   796, 864, 0, 576, 581, 586, 625, 0,
191
392
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
192
-	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
393
+	  .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
193
394
 	/* 2 - 720x480@60Hz 4:3 */
194
395
 	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
195
396
 		   798, 858, 0, 480, 489, 495, 525, 0,
196
397
 		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
197
-	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
398
+	  .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
198
399
 };
199
400
 
200
401
 int rockchip_drm_add_modes_noedid(struct drm_connector *connector)
..
..
@@ -223,1013 +424,638 @@
223
424
 }
224
425
 EXPORT_SYMBOL(rockchip_drm_add_modes_noedid);
225
426
 
226
-#ifdef CONFIG_ARCH_ROCKCHIP
227
-struct drm_prime_callback_data {
228
-	struct drm_gem_object *obj;
229
-	struct sg_table *sgt;
427
+static const struct rockchip_drm_width_dclk {
428
+	int width;
429
+	u32 dclk_khz;
430
+} rockchip_drm_dclk[] = {
431
+	{1920, 148500},
432
+	{2048, 200000},
433
+	{2560, 280000},
434
+	{3840, 594000},
435
+	{4096, 594000},
436
+	{7680, 2376000},
230
437
 };
231
-#endif
232
438
 
233
-#ifndef MODULE
234
-static struct drm_crtc *find_crtc_by_node(struct drm_device *drm_dev, struct device_node *node)
439
+u32 rockchip_drm_get_dclk_by_width(int width)
235
440
 {
236
-	struct device_node *np_crtc;
237
-	struct drm_crtc *crtc;
441
+	int i = 0;
442
+	u32 dclk_khz;
238
443
 
239
-	np_crtc = of_get_parent(node);
240
-	if (!np_crtc || !of_device_is_available(np_crtc))
444
+	for (i = 0; i < ARRAY_SIZE(rockchip_drm_dclk); i++) {
445
+		if (width == rockchip_drm_dclk[i].width) {
446
+			dclk_khz = rockchip_drm_dclk[i].dclk_khz;
447
+			break;
448
+		}
449
+	}
450
+
451
+	if (i == ARRAY_SIZE(rockchip_drm_dclk)) {
452
+		DRM_ERROR("Can't not find %d width solution and use 148500 khz as max dclk\n", width);
453
+
454
+		dclk_khz = 148500;
455
+	}
456
+
457
+	return dclk_khz;
458
+}
459
+EXPORT_SYMBOL(rockchip_drm_get_dclk_by_width);
460
+
461
+static int
462
+cea_db_tag(const u8 *db)
463
+{
464
+	return db[0] >> 5;
465
+}
466
+
467
+static int
468
+cea_db_payload_len(const u8 *db)
469
+{
470
+	return db[0] & 0x1f;
471
+}
472
+
473
+#define for_each_cea_db(cea, i, start, end) \
474
+	for ((i) = (start); \
475
+	     (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); \
476
+	     (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
477
+
478
+#define HDMI_NEXT_HDR_VSDB_OUI 0xd04601
479
+
480
+static bool cea_db_is_hdmi_next_hdr_block(const u8 *db)
481
+{
482
+	unsigned int oui;
483
+
484
+	if (cea_db_tag(db) != 0x07)
485
+		return false;
486
+
487
+	if (cea_db_payload_len(db) < 11)
488
+		return false;
489
+
490
+	oui = db[3] << 16 | db[2] << 8 | db[1];
491
+
492
+	return oui == HDMI_NEXT_HDR_VSDB_OUI;
493
+}
494
+
495
+static bool cea_db_is_hdmi_forum_vsdb(const u8 *db)
496
+{
497
+	unsigned int oui;
498
+
499
+	if (cea_db_tag(db) != 0x03)
500
+		return false;
501
+
502
+	if (cea_db_payload_len(db) < 7)
503
+		return false;
504
+
505
+	oui = db[3] << 16 | db[2] << 8 | db[1];
506
+
507
+	return oui == HDMI_FORUM_IEEE_OUI;
508
+}
509
+
510
+static int
511
+cea_db_offsets(const u8 *cea, int *start, int *end)
512
+{
513
+	/* DisplayID CTA extension blocks and top-level CEA EDID
514
+	 * block header definitions differ in the following bytes:
515
+	 *   1) Byte 2 of the header specifies length differently,
516
+	 *   2) Byte 3 is only present in the CEA top level block.
517
+	 *
518
+	 * The different definitions for byte 2 follow.
519
+	 *
520
+	 * DisplayID CTA extension block defines byte 2 as:
521
+	 *   Number of payload bytes
522
+	 *
523
+	 * CEA EDID block defines byte 2 as:
524
+	 *   Byte number (decimal) within this block where the 18-byte
525
+	 *   DTDs begin. If no non-DTD data is present in this extension
526
+	 *   block, the value should be set to 04h (the byte after next).
527
+	 *   If set to 00h, there are no DTDs present in this block and
528
+	 *   no non-DTD data.
529
+	 */
530
+	if (cea[0] == 0x81) {
531
+		/*
532
+		 * for_each_displayid_db() has already verified
533
+		 * that these stay within expected bounds.
534
+		 */
535
+		*start = 3;
536
+		*end = *start + cea[2];
537
+	} else if (cea[0] == 0x02) {
538
+		/* Data block offset in CEA extension block */
539
+		*start = 4;
540
+		*end = cea[2];
541
+		if (*end == 0)
542
+			*end = 127;
543
+		if (*end < 4 || *end > 127)
544
+			return -ERANGE;
545
+	} else {
546
+		return -EOPNOTSUPP;
547
+	}
548
+
549
+	return 0;
550
+}
551
+
552
+static u8 *find_edid_extension(const struct edid *edid,
553
+			       int ext_id, int *ext_index)
554
+{
555
+	u8 *edid_ext = NULL;
556
+	int i;
557
+
558
+	/* No EDID or EDID extensions */
559
+	if (edid == NULL || edid->extensions == 0)
241
560
 		return NULL;
242
561
 
243
-	drm_for_each_crtc(crtc, drm_dev) {
244
-		if (crtc->port == np_crtc)
245
-			return crtc;
562
+	/* Find CEA extension */
563
+	for (i = *ext_index; i < edid->extensions; i++) {
564
+		edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
565
+		if (edid_ext[0] == ext_id)
566
+			break;
567
+	}
568
+
569
+	if (i >= edid->extensions)
570
+		return NULL;
571
+
572
+	*ext_index = i + 1;
573
+
574
+	return edid_ext;
575
+}
576
+
577
+static int validate_displayid(u8 *displayid, int length, int idx)
578
+{
579
+	int i, dispid_length;
580
+	u8 csum = 0;
581
+	struct displayid_hdr *base;
582
+
583
+	base = (struct displayid_hdr *)&displayid[idx];
584
+
585
+	DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
586
+		      base->rev, base->bytes, base->prod_id, base->ext_count);
587
+
588
+	/* +1 for DispID checksum */
589
+	dispid_length = sizeof(*base) + base->bytes + 1;
590
+	if (dispid_length > length - idx)
591
+		return -EINVAL;
592
+
593
+	for (i = 0; i < dispid_length; i++)
594
+		csum += displayid[idx + i];
595
+	if (csum) {
596
+		DRM_NOTE("DisplayID checksum invalid, remainder is %d\n", csum);
597
+		return -EINVAL;
598
+	}
599
+
600
+	return 0;
601
+}
602
+
603
+static u8 *find_displayid_extension(const struct edid *edid,
604
+				    int *length, int *idx,
605
+				    int *ext_index)
606
+{
607
+	u8 *displayid = find_edid_extension(edid, 0x70, ext_index);
608
+	struct displayid_hdr *base;
609
+	int ret;
610
+
611
+	if (!displayid)
612
+		return NULL;
613
+
614
+	/* EDID extensions block checksum isn't for us */
615
+	*length = EDID_LENGTH - 1;
616
+	*idx = 1;
617
+
618
+	ret = validate_displayid(displayid, *length, *idx);
619
+	if (ret)
620
+		return NULL;
621
+
622
+	base = (struct displayid_hdr *)&displayid[*idx];
623
+	*length = *idx + sizeof(*base) + base->bytes;
624
+
625
+	return displayid;
626
+}
627
+
628
+static u8 *find_cea_extension(const struct edid *edid)
629
+{
630
+	int length, idx;
631
+	struct displayid_block *block;
632
+	u8 *cea;
633
+	u8 *displayid;
634
+	int ext_index;
635
+
636
+	/* Look for a top level CEA extension block */
637
+	/* FIXME: make callers iterate through multiple CEA ext blocks? */
638
+	ext_index = 0;
639
+	cea = find_edid_extension(edid, 0x02, &ext_index);
640
+	if (cea)
641
+		return cea;
642
+
643
+	/* CEA blocks can also be found embedded in a DisplayID block */
644
+	ext_index = 0;
645
+	for (;;) {
646
+		displayid = find_displayid_extension(edid, &length, &idx,
647
+						     &ext_index);
648
+		if (!displayid)
649
+			return NULL;
650
+
651
+		idx += sizeof(struct displayid_hdr);
652
+		for_each_displayid_db(displayid, block, idx, length) {
653
+			if (block->tag == 0x81)
654
+				return (u8 *)block;
655
+		}
246
656
 	}
247
657
 
248
658
 	return NULL;
249
659
 }
250
660
 
251
-static struct drm_connector *find_connector_by_node(struct drm_device *drm_dev,
252
-						    struct device_node *node)
661
+#define EDID_CEA_YCRCB422	(1 << 4)
662
+
663
+int rockchip_drm_get_yuv422_format(struct drm_connector *connector,
664
+				   struct edid *edid)
253
665
 {
254
-	struct device_node *np_connector;
255
-	struct rockchip_drm_sub_dev *sub_dev;
666
+	struct drm_display_info *info;
667
+	const u8 *edid_ext;
256
668
 
257
-	np_connector = of_graph_get_remote_port_parent(node);
258
-	if (!np_connector || !of_device_is_available(np_connector))
259
-		return NULL;
669
+	if (!connector || !edid)
670
+		return -EINVAL;
260
671
 
261
-	sub_dev = rockchip_drm_get_sub_dev(np_connector);
262
-	if (!sub_dev)
263
-		return NULL;
672
+	info = &connector->display_info;
264
673
 
265
-	return sub_dev->connector;
266
-}
674
+	edid_ext = find_cea_extension(edid);
675
+	if (!edid_ext)
676
+		return -EINVAL;
267
677
 
268
-static struct drm_connector *find_connector_by_bridge(struct drm_device *drm_dev,
269
-						      struct device_node *node)
270
-{
271
-	struct device_node *np_encoder, *np_connector = NULL;
272
-	struct drm_connector *connector = NULL;
273
-	struct device_node *port, *endpoint;
274
-	struct rockchip_drm_sub_dev *sub_dev;
275
-
276
-	np_encoder = of_graph_get_remote_port_parent(node);
277
-	if (!np_encoder || !of_device_is_available(np_encoder))
278
-		goto err_put_encoder;
279
-
280
-	port = of_graph_get_port_by_id(np_encoder, 1);
281
-	if (!port) {
282
-		dev_err(drm_dev->dev, "can't found port point!\n");
283
-		goto err_put_encoder;
284
-	}
285
-
286
-	for_each_child_of_node(port, endpoint) {
287
-		np_connector = of_graph_get_remote_port_parent(endpoint);
288
-		if (!np_connector) {
289
-			dev_err(drm_dev->dev,
290
-				"can't found connector node, please init!\n");
291
-			goto err_put_port;
292
-		}
293
-		if (!of_device_is_available(np_connector)) {
294
-			of_node_put(np_connector);
295
-			np_connector = NULL;
296
-			continue;
297
-		} else {
298
-			break;
299
-		}
300
-	}
301
-	if (!np_connector) {
302
-		dev_err(drm_dev->dev, "can't found available connector node!\n");
303
-		goto err_put_port;
304
-	}
305
-
306
-	sub_dev = rockchip_drm_get_sub_dev(np_connector);
307
-	if (!sub_dev)
308
-		goto err_put_port;
309
-	connector = sub_dev->connector;
310
-
311
-	of_node_put(np_connector);
312
-err_put_port:
313
-	of_node_put(port);
314
-err_put_encoder:
315
-	of_node_put(np_encoder);
316
-
317
-	return connector;
318
-}
319
-
320
-void rockchip_free_loader_memory(struct drm_device *drm)
321
-{
322
-	struct rockchip_drm_private *private = drm->dev_private;
323
-	struct rockchip_logo *logo;
324
-	void *start, *end;
325
-
326
-	if (!private || !private->logo || --private->logo->count)
327
-		return;
328
-
329
-	logo = private->logo;
330
-	start = phys_to_virt(logo->dma_addr);
331
-	end = phys_to_virt(logo->dma_addr + logo->size);
332
-
333
-	if (private->domain) {
334
-		u32 pg_size = 1UL << __ffs(private->domain->pgsize_bitmap);
335
-
336
-		iommu_unmap(private->domain, logo->dma_addr, ALIGN(logo->size, pg_size));
337
-	}
338
-
339
-	memblock_free(logo->start, logo->size);
340
-	free_reserved_area(start, end, -1, "drm_logo");
341
-	kfree(logo);
342
-	private->logo = NULL;
343
-	private->loader_protect = false;
344
-}
345
-
346
-static int init_loader_memory(struct drm_device *drm_dev)
347
-{
348
-	struct rockchip_drm_private *private = drm_dev->dev_private;
349
-	struct rockchip_logo *logo;
350
-	struct device_node *np = drm_dev->dev->of_node;
351
-	struct device_node *node;
352
-	phys_addr_t start, size;
353
-	u32 pg_size = PAGE_SIZE;
354
-	struct resource res;
355
-	int ret, idx;
356
-
357
-	idx = of_property_match_string(np, "memory-region-names", "drm-logo");
358
-	if (idx >= 0)
359
-		node = of_parse_phandle(np, "memory-region", idx);
360
-	else
361
-		node = of_parse_phandle(np, "logo-memory-region", 0);
362
-	if (!node)
363
-		return -ENOMEM;
364
-
365
-	ret = of_address_to_resource(node, 0, &res);
366
-	if (ret)
367
-		return ret;
368
-	if (private->domain)
369
-		pg_size = 1UL << __ffs(private->domain->pgsize_bitmap);
370
-	start = ALIGN_DOWN(res.start, pg_size);
371
-	size = resource_size(&res);
372
-	if (!size)
373
-		return -ENOMEM;
374
-
375
-	logo = kmalloc(sizeof(*logo), GFP_KERNEL);
376
-	if (!logo)
377
-		return -ENOMEM;
378
-
379
-	logo->kvaddr = phys_to_virt(start);
380
-
381
-	if (private->domain) {
382
-		ret = iommu_map(private->domain, start, start, ALIGN(size, pg_size),
383
-				IOMMU_WRITE | IOMMU_READ);
384
-		if (ret) {
385
-			dev_err(drm_dev->dev, "failed to create 1v1 mapping\n");
386
-			goto err_free_logo;
387
-		}
388
-	}
389
-
390
-	logo->dma_addr = start;
391
-	logo->size = size;
392
-	logo->count = 1;
393
-	private->logo = logo;
394
-
395
-	idx = of_property_match_string(np, "memory-region-names", "drm-cubic-lut");
396
-	if (idx < 0)
397
-		return 0;
398
-
399
-	node = of_parse_phandle(np, "memory-region", idx);
400
-	if (!node)
401
-		return -ENOMEM;
402
-
403
-	ret = of_address_to_resource(node, 0, &res);
404
-	if (ret)
405
-		return ret;
406
-	start = ALIGN_DOWN(res.start, pg_size);
407
-	size = resource_size(&res);
408
-	if (!size)
409
-		return 0;
410
-
411
-	private->cubic_lut_kvaddr = phys_to_virt(start);
412
-	if (private->domain) {
413
-		ret = iommu_map(private->domain, start, start, ALIGN(size, pg_size),
414
-				IOMMU_WRITE | IOMMU_READ);
415
-		if (ret) {
416
-			dev_err(drm_dev->dev, "failed to create 1v1 mapping for cubic lut\n");
417
-			goto err_free_logo;
418
-		}
419
-	}
420
-	private->cubic_lut_dma_addr = start;
678
+	if (edid_ext[3] & EDID_CEA_YCRCB422)
679
+		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
421
680
 
422
681
 	return 0;
423
-
424
-err_free_logo:
425
-	kfree(logo);
426
-
427
-	return ret;
428
682
 }
683
+EXPORT_SYMBOL(rockchip_drm_get_yuv422_format);
429
684
 
430
-static struct drm_framebuffer *
431
-get_framebuffer_by_node(struct drm_device *drm_dev, struct device_node *node)
685
+static
686
+void get_max_frl_rate(int max_frl_rate, u8 *max_lanes, u8 *max_rate_per_lane)
432
687
 {
433
-	struct rockchip_drm_private *private = drm_dev->dev_private;
434
-	struct drm_mode_fb_cmd2 mode_cmd = { 0 };
435
-	u32 val;
436
-	int bpp;
437
-
438
-	if (WARN_ON(!private->logo))
439
-		return NULL;
440
-
441
-	if (of_property_read_u32(node, "logo,offset", &val)) {
442
-		pr_err("%s: failed to get logo,offset\n", __func__);
443
-		return NULL;
444
-	}
445
-	mode_cmd.offsets[0] = val;
446
-
447
-	if (of_property_read_u32(node, "logo,width", &val)) {
448
-		pr_err("%s: failed to get logo,width\n", __func__);
449
-		return NULL;
450
-	}
451
-	mode_cmd.width = val;
452
-
453
-	if (of_property_read_u32(node, "logo,height", &val)) {
454
-		pr_err("%s: failed to get logo,height\n", __func__);
455
-		return NULL;
456
-	}
457
-	mode_cmd.height = val;
458
-
459
-	if (of_property_read_u32(node, "logo,bpp", &val)) {
460
-		pr_err("%s: failed to get logo,bpp\n", __func__);
461
-		return NULL;
462
-	}
463
-	bpp = val;
464
-
465
-	mode_cmd.pitches[0] = ALIGN(mode_cmd.width * bpp, 32) / 8;
466
-
467
-	switch (bpp) {
468
-	case 16:
469
-		mode_cmd.pixel_format = DRM_FORMAT_RGB565;
688
+	switch (max_frl_rate) {
689
+	case 1:
690
+		*max_lanes = 3;
691
+		*max_rate_per_lane = 3;
470
692
 		break;
471
-	case 24:
472
-		mode_cmd.pixel_format = DRM_FORMAT_RGB888;
693
+	case 2:
694
+		*max_lanes = 3;
695
+		*max_rate_per_lane = 6;
473
696
 		break;
474
-	case 32:
475
-		mode_cmd.pixel_format = DRM_FORMAT_XRGB8888;
697
+	case 3:
698
+		*max_lanes = 4;
699
+		*max_rate_per_lane = 6;
476
700
 		break;
701
+	case 4:
702
+		*max_lanes = 4;
703
+		*max_rate_per_lane = 8;
704
+		break;
705
+	case 5:
706
+		*max_lanes = 4;
707
+		*max_rate_per_lane = 10;
708
+		break;
709
+	case 6:
710
+		*max_lanes = 4;
711
+		*max_rate_per_lane = 12;
712
+		break;
713
+	case 0:
477
714
 	default:
478
-		pr_err("%s: unsupported to logo bpp %d\n", __func__, bpp);
479
-		return NULL;
715
+		*max_lanes = 0;
716
+		*max_rate_per_lane = 0;
480
717
 	}
481
-
482
-	return rockchip_fb_alloc(drm_dev, &mode_cmd, NULL, private->logo, 1);
483
718
 }
484
719
 
485
-static struct rockchip_drm_mode_set *
486
-of_parse_display_resource(struct drm_device *drm_dev, struct device_node *route)
720
+#define EDID_DSC_10BPC			(1 << 0)
721
+#define EDID_DSC_12BPC			(1 << 1)
722
+#define EDID_DSC_16BPC			(1 << 2)
723
+#define EDID_DSC_ALL_BPP		(1 << 3)
724
+#define EDID_DSC_NATIVE_420		(1 << 6)
725
+#define EDID_DSC_1P2			(1 << 7)
726
+#define EDID_DSC_MAX_FRL_RATE_MASK	0xf0
727
+#define EDID_DSC_MAX_SLICES		0xf
728
+#define EDID_DSC_TOTAL_CHUNK_KBYTES	0x3f
729
+#define EDID_MAX_FRL_RATE_MASK		0xf0
730
+
731
+static
732
+void parse_edid_forum_vsdb(struct rockchip_drm_dsc_cap *dsc_cap,
733
+			   u8 *max_frl_rate_per_lane, u8 *max_lanes, u8 *add_func,
734
+			   const u8 *hf_vsdb)
487
735
 {
488
-	struct rockchip_drm_private *private = drm_dev->dev_private;
489
-	struct rockchip_drm_mode_set *set;
490
-	struct device_node *connect;
491
-	struct drm_framebuffer *fb;
492
-	struct drm_connector *connector;
493
-	struct drm_crtc *crtc;
494
-	const char *string;
495
-	u32 val;
736
+	u8 max_frl_rate;
737
+	u8 dsc_max_frl_rate;
738
+	u8 dsc_max_slices;
496
739
 
497
-	connect = of_parse_phandle(route, "connect", 0);
498
-	if (!connect)
499
-		return NULL;
500
-
501
-	fb = get_framebuffer_by_node(drm_dev, route);
502
-	if (IS_ERR_OR_NULL(fb))
503
-		return NULL;
504
-
505
-	crtc = find_crtc_by_node(drm_dev, connect);
506
-	connector = find_connector_by_node(drm_dev, connect);
507
-	if (!connector)
508
-		connector = find_connector_by_bridge(drm_dev, connect);
509
-	if (!crtc || !connector) {
510
-		dev_warn(drm_dev->dev,
511
-			 "No available crtc or connector for display");
512
-		drm_framebuffer_put(fb);
513
-		return NULL;
514
-	}
515
-
516
-	set = kzalloc(sizeof(*set), GFP_KERNEL);
517
-	if (!set)
518
-		return NULL;
519
-
520
-	if (!of_property_read_u32(route, "video,clock", &val))
521
-		set->clock = val;
522
-
523
-	if (!of_property_read_u32(route, "video,hdisplay", &val))
524
-		set->hdisplay = val;
525
-
526
-	if (!of_property_read_u32(route, "video,vdisplay", &val))
527
-		set->vdisplay = val;
528
-
529
-	if (!of_property_read_u32(route, "video,crtc_hsync_end", &val))
530
-		set->crtc_hsync_end = val;
531
-
532
-	if (!of_property_read_u32(route, "video,crtc_vsync_end", &val))
533
-		set->crtc_vsync_end = val;
534
-
535
-	if (!of_property_read_u32(route, "video,vrefresh", &val))
536
-		set->vrefresh = val;
537
-
538
-	if (!of_property_read_u32(route, "video,flags", &val))
539
-		set->flags = val;
540
-
541
-	if (!of_property_read_u32(route, "video,aspect_ratio", &val))
542
-		set->picture_aspect_ratio = val;
543
-
544
-	if (!of_property_read_u32(route, "overscan,left_margin", &val))
545
-		set->left_margin = val;
546
-
547
-	if (!of_property_read_u32(route, "overscan,right_margin", &val))
548
-		set->right_margin = val;
549
-
550
-	if (!of_property_read_u32(route, "overscan,top_margin", &val))
551
-		set->top_margin = val;
552
-
553
-	if (!of_property_read_u32(route, "overscan,bottom_margin", &val))
554
-		set->bottom_margin = val;
555
-
556
-	if (!of_property_read_u32(route, "bcsh,brightness", &val))
557
-		set->brightness = val;
558
-	else
559
-		set->brightness = 50;
560
-
561
-	if (!of_property_read_u32(route, "bcsh,contrast", &val))
562
-		set->contrast = val;
563
-	else
564
-		set->contrast = 50;
565
-
566
-	if (!of_property_read_u32(route, "bcsh,saturation", &val))
567
-		set->saturation = val;
568
-	else
569
-		set->saturation = 50;
570
-
571
-	if (!of_property_read_u32(route, "bcsh,hue", &val))
572
-		set->hue = val;
573
-	else
574
-		set->hue = 50;
575
-
576
-	set->force_output = of_property_read_bool(route, "force-output");
577
-
578
-	if (!of_property_read_u32(route, "cubic_lut,offset", &val)) {
579
-		private->cubic_lut[crtc->index].enable = true;
580
-		private->cubic_lut[crtc->index].offset = val;
581
-	}
582
-
583
-	set->ratio = 1;
584
-	if (!of_property_read_string(route, "logo,mode", &string) &&
585
-	    !strcmp(string, "fullscreen"))
586
-		set->ratio = 0;
587
-
588
-	set->fb = fb;
589
-	set->crtc = crtc;
590
-	set->connector = connector;
591
-
592
-	return set;
593
-}
594
-
595
-static int rockchip_drm_fill_connector_modes(struct drm_connector *connector,
596
-					     uint32_t maxX, uint32_t maxY,
597
-					     bool force_output)
598
-{
599
-	struct drm_device *dev = connector->dev;
600
-	struct drm_display_mode *mode;
601
-	const struct drm_connector_helper_funcs *connector_funcs =
602
-		connector->helper_private;
603
-	int count = 0;
604
-	bool verbose_prune = true;
605
-	enum drm_connector_status old_status;
606
-
607
-	WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
608
-
609
-	DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
610
-		      connector->name);
611
-	/* set all modes to the unverified state */
612
-	list_for_each_entry(mode, &connector->modes, head)
613
-		mode->status = MODE_STALE;
614
-
615
-	if (force_output)
616
-		connector->force = DRM_FORCE_ON;
617
-	if (connector->force) {
618
-		if (connector->force == DRM_FORCE_ON ||
619
-		    connector->force == DRM_FORCE_ON_DIGITAL)
620
-			connector->status = connector_status_connected;
621
-		else
622
-			connector->status = connector_status_disconnected;
623
-		if (connector->funcs->force)
624
-			connector->funcs->force(connector);
625
-	} else {
626
-		old_status = connector->status;
627
-
628
-		if (connector->funcs->detect)
629
-			connector->status = connector->funcs->detect(connector, true);
630
-		else
631
-			connector->status  = connector_status_connected;
632
-		/*
633
-		 * Normally either the driver's hpd code or the poll loop should
634
-		 * pick up any changes and fire the hotplug event. But if
635
-		 * userspace sneaks in a probe, we might miss a change. Hence
636
-		 * check here, and if anything changed start the hotplug code.
637
-		 */
638
-		if (old_status != connector->status) {
639
-			DRM_DEBUG_KMS("[CONNECTOR:%d:%s] status updated from %d to %d\n",
640
-				      connector->base.id,
641
-				      connector->name,
642
-				      old_status, connector->status);
643
-
644
-			/*
645
-			 * The hotplug event code might call into the fb
646
-			 * helpers, and so expects that we do not hold any
647
-			 * locks. Fire up the poll struct instead, it will
648
-			 * disable itself again.
649
-			 */
650
-			dev->mode_config.delayed_event = true;
651
-			if (dev->mode_config.poll_enabled)
652
-				schedule_delayed_work(&dev->mode_config.output_poll_work,
653
-						      0);
654
-		}
655
-	}
656
-
657
-	/* Re-enable polling in case the global poll config changed. */
658
-	if (!dev->mode_config.poll_running)
659
-		drm_kms_helper_poll_enable(dev);
660
-
661
-	dev->mode_config.poll_running = true;
662
-
663
-	if (connector->status == connector_status_disconnected) {
664
-		DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
665
-			      connector->base.id, connector->name);
666
-		drm_connector_update_edid_property(connector, NULL);
667
-		verbose_prune = false;
668
-		goto prune;
669
-	}
670
-
671
-	count = (*connector_funcs->get_modes)(connector);
672
-
673
-	if (count == 0 && connector->status == connector_status_connected)
674
-		count = drm_add_modes_noedid(connector, 1024, 768);
675
-	if (force_output)
676
-		count += rockchip_drm_add_modes_noedid(connector);
677
-	if (count == 0)
678
-		goto prune;
679
-
680
-	drm_connector_list_update(connector);
681
-
682
-	list_for_each_entry(mode, &connector->modes, head) {
683
-		if (mode->status == MODE_OK)
684
-			mode->status = drm_mode_validate_driver(dev, mode);
685
-
686
-		if (mode->status == MODE_OK)
687
-			mode->status = drm_mode_validate_size(mode, maxX, maxY);
688
-
689
-		/**
690
-		 * if (mode->status == MODE_OK)
691
-		 *	mode->status = drm_mode_validate_flag(mode, mode_flags);
692
-		 */
693
-		if (mode->status == MODE_OK && connector_funcs->mode_valid)
694
-			mode->status = connector_funcs->mode_valid(connector,
695
-								   mode);
696
-		if (mode->status == MODE_OK)
697
-			mode->status = drm_mode_validate_ycbcr420(mode,
698
-								  connector);
699
-	}
700
-
701
-prune:
702
-	drm_mode_prune_invalid(dev, &connector->modes, verbose_prune);
703
-
704
-	if (list_empty(&connector->modes))
705
-		return 0;
706
-
707
-	list_for_each_entry(mode, &connector->modes, head)
708
-		mode->vrefresh = drm_mode_vrefresh(mode);
709
-
710
-	drm_mode_sort(&connector->modes);
711
-
712
-	DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
713
-		      connector->name);
714
-	list_for_each_entry(mode, &connector->modes, head) {
715
-		drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
716
-		drm_mode_debug_printmodeline(mode);
717
-	}
718
-
719
-	return count;
720
-}
721
-
722
-static int setup_initial_state(struct drm_device *drm_dev,
723
-			       struct drm_atomic_state *state,
724
-			       struct rockchip_drm_mode_set *set)
725
-{
726
-	struct rockchip_drm_private *priv = drm_dev->dev_private;
727
-	struct drm_connector *connector = set->connector;
728
-	struct drm_crtc *crtc = set->crtc;
729
-	struct drm_crtc_state *crtc_state;
730
-	struct drm_connector_state *conn_state;
731
-	struct drm_plane_state *primary_state;
732
-	struct drm_display_mode *mode = NULL;
733
-	const struct drm_connector_helper_funcs *funcs;
734
-	const struct drm_encoder_helper_funcs *encoder_funcs;
735
-	int pipe = drm_crtc_index(crtc);
736
-	bool is_crtc_enabled = true;
737
-	int hdisplay, vdisplay;
738
-	int fb_width, fb_height;
739
-	int found = 0, match = 0;
740
-	int num_modes;
741
-	int ret = 0;
742
-	struct rockchip_crtc_state *s = NULL;
743
-
744
-	if (!set->hdisplay || !set->vdisplay || !set->vrefresh)
745
-		is_crtc_enabled = false;
746
-
747
-	conn_state = drm_atomic_get_connector_state(state, connector);
748
-	if (IS_ERR(conn_state))
749
-		return PTR_ERR(conn_state);
750
-
751
-	funcs = connector->helper_private;
752
-
753
-	if (funcs->best_encoder)
754
-		conn_state->best_encoder = funcs->best_encoder(connector);
755
-	else
756
-		conn_state->best_encoder = drm_atomic_helper_best_encoder(connector);
757
-
758
-	if (funcs->loader_protect)
759
-		funcs->loader_protect(connector, true);
760
-	connector->loader_protect = true;
761
-	encoder_funcs = conn_state->best_encoder->helper_private;
762
-	if (encoder_funcs->loader_protect)
763
-		encoder_funcs->loader_protect(conn_state->best_encoder, true);
764
-	conn_state->best_encoder->loader_protect = true;
765
-	num_modes = rockchip_drm_fill_connector_modes(connector, 4096, 4096, set->force_output);
766
-	if (!num_modes) {
767
-		dev_err(drm_dev->dev, "connector[%s] can't found any modes\n",
768
-			connector->name);
769
-		ret = -EINVAL;
770
-		goto error_conn;
771
-	}
772
-
773
-	list_for_each_entry(mode, &connector->modes, head) {
774
-		if (mode->clock == set->clock &&
775
-		    mode->hdisplay == set->hdisplay &&
776
-		    mode->vdisplay == set->vdisplay &&
777
-		    mode->crtc_hsync_end == set->crtc_hsync_end &&
778
-		    mode->crtc_vsync_end == set->crtc_vsync_end &&
779
-		    drm_mode_vrefresh(mode) == set->vrefresh &&
780
-		    /* we just need to focus on DRM_MODE_FLAG_ALL flag, so here
781
-		     * we compare mode->flags with set->flags & DRM_MODE_FLAG_ALL.
782
-		     */
783
-		    mode->flags == (set->flags & DRM_MODE_FLAG_ALL) &&
784
-		    mode->picture_aspect_ratio == set->picture_aspect_ratio) {
785
-			found = 1;
786
-			match = 1;
787
-			break;
788
-		}
789
-	}
790
-
791
-	if (!found) {
792
-		ret = -EINVAL;
793
-		connector->status = connector_status_disconnected;
794
-		goto error_conn;
795
-	}
796
-
797
-	conn_state->tv.brightness = set->brightness;
798
-	conn_state->tv.contrast = set->contrast;
799
-	conn_state->tv.saturation = set->saturation;
800
-	conn_state->tv.hue = set->hue;
801
-	set->mode = mode;
802
-	crtc_state = drm_atomic_get_crtc_state(state, crtc);
803
-	if (IS_ERR(crtc_state)) {
804
-		ret = PTR_ERR(crtc_state);
805
-		goto error_conn;
806
-	}
807
-
808
-	drm_mode_copy(&crtc_state->adjusted_mode, mode);
809
-	if (!match || !is_crtc_enabled) {
810
-		set->mode_changed = true;
811
-	} else {
812
-		ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);
813
-		if (ret)
814
-			goto error_conn;
815
-
816
-		mode->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
817
-		ret = drm_atomic_set_mode_for_crtc(crtc_state, mode);
818
-		if (ret)
819
-			goto error_conn;
820
-
821
-		crtc_state->active = true;
822
-
823
-		if (priv->crtc_funcs[pipe] &&
824
-		    priv->crtc_funcs[pipe]->loader_protect)
825
-			priv->crtc_funcs[pipe]->loader_protect(crtc, true);
826
-	}
827
-
828
-	if (!set->fb) {
829
-		ret = 0;
830
-		goto error_crtc;
831
-	}
832
-	primary_state = drm_atomic_get_plane_state(state, crtc->primary);
833
-	if (IS_ERR(primary_state)) {
834
-		ret = PTR_ERR(primary_state);
835
-		goto error_crtc;
836
-	}
837
-
838
-	hdisplay = mode->hdisplay;
839
-	vdisplay = mode->vdisplay;
840
-	fb_width = set->fb->width;
841
-	fb_height = set->fb->height;
842
-
843
-	primary_state->crtc = crtc;
844
-	primary_state->src_x = 0;
845
-	primary_state->src_y = 0;
846
-	primary_state->src_w = fb_width << 16;
847
-	primary_state->src_h = fb_height << 16;
848
-	if (set->ratio) {
849
-		if (set->fb->width >= hdisplay) {
850
-			primary_state->crtc_x = 0;
851
-			primary_state->crtc_w = hdisplay;
852
-		} else {
853
-			primary_state->crtc_x = (hdisplay - fb_width) / 2;
854
-			primary_state->crtc_w = set->fb->width;
855
-		}
856
-
857
-		if (set->fb->height >= vdisplay) {
858
-			primary_state->crtc_y = 0;
859
-			primary_state->crtc_h = vdisplay;
860
-		} else {
861
-			primary_state->crtc_y = (vdisplay - fb_height) / 2;
862
-			primary_state->crtc_h = fb_height;
863
-		}
864
-	} else {
865
-		primary_state->crtc_x = 0;
866
-		primary_state->crtc_y = 0;
867
-		primary_state->crtc_w = hdisplay;
868
-		primary_state->crtc_h = vdisplay;
869
-	}
870
-	s = to_rockchip_crtc_state(crtc->state);
871
-	s->output_type = connector->connector_type;
872
-
873
-	return 0;
874
-
875
-error_crtc:
876
-	if (priv->crtc_funcs[pipe] && priv->crtc_funcs[pipe]->loader_protect)
877
-		priv->crtc_funcs[pipe]->loader_protect(crtc, false);
878
-error_conn:
879
-	if (funcs->loader_protect)
880
-		funcs->loader_protect(connector, false);
881
-	connector->loader_protect = false;
882
-	if (encoder_funcs->loader_protect)
883
-		encoder_funcs->loader_protect(conn_state->best_encoder, false);
884
-	conn_state->best_encoder->loader_protect = false;
885
-
886
-	return ret;
887
-}
888
-
889
-static int update_state(struct drm_device *drm_dev,
890
-			struct drm_atomic_state *state,
891
-			struct rockchip_drm_mode_set *set,
892
-			unsigned int *plane_mask)
893
-{
894
-	struct drm_crtc *crtc = set->crtc;
895
-	struct drm_connector *connector = set->connector;
896
-	struct drm_display_mode *mode = set->mode;
897
-	struct drm_plane_state *primary_state;
898
-	struct drm_crtc_state *crtc_state;
899
-	struct drm_connector_state *conn_state;
900
-	int ret;
901
-	struct rockchip_crtc_state *s;
902
-
903
-	crtc_state = drm_atomic_get_crtc_state(state, crtc);
904
-	if (IS_ERR(crtc_state))
905
-		return PTR_ERR(crtc_state);
906
-	conn_state = drm_atomic_get_connector_state(state, connector);
907
-	if (IS_ERR(conn_state))
908
-		return PTR_ERR(conn_state);
909
-	s = to_rockchip_crtc_state(crtc_state);
910
-	s->left_margin = set->left_margin;
911
-	s->right_margin = set->right_margin;
912
-	s->top_margin = set->top_margin;
913
-	s->bottom_margin = set->bottom_margin;
914
-
915
-	if (set->mode_changed) {
916
-		ret = drm_atomic_set_crtc_for_connector(conn_state, crtc);
917
-		if (ret)
918
-			return ret;
919
-
920
-		ret = drm_atomic_set_mode_for_crtc(crtc_state, mode);
921
-		if (ret)
922
-			return ret;
923
-
924
-		crtc_state->active = true;
925
-	} else {
926
-		const struct drm_encoder_helper_funcs *encoder_helper_funcs;
927
-		const struct drm_connector_helper_funcs *connector_helper_funcs;
928
-		struct drm_encoder *encoder;
929
-
930
-		connector_helper_funcs = connector->helper_private;
931
-		if (!connector_helper_funcs)
932
-			return -ENXIO;
933
-		if (connector_helper_funcs->best_encoder)
934
-			encoder = connector_helper_funcs->best_encoder(connector);
935
-		else
936
-			encoder = drm_atomic_helper_best_encoder(connector);
937
-		if (!encoder)
938
-			return -ENXIO;
939
-		encoder_helper_funcs = encoder->helper_private;
940
-		if (!encoder_helper_funcs->atomic_check)
941
-			return -ENXIO;
942
-		ret = encoder_helper_funcs->atomic_check(encoder, crtc->state,
943
-							 conn_state);
944
-		if (ret)
945
-			return ret;
946
-
947
-		if (encoder_helper_funcs->atomic_mode_set)
948
-			encoder_helper_funcs->atomic_mode_set(encoder,
949
-							      crtc_state,
950
-							      conn_state);
951
-		else if (encoder_helper_funcs->mode_set)
952
-			encoder_helper_funcs->mode_set(encoder, mode, mode);
953
-	}
954
-
955
-	primary_state = drm_atomic_get_plane_state(state, crtc->primary);
956
-	if (IS_ERR(primary_state))
957
-		return PTR_ERR(primary_state);
958
-
959
-	crtc_state->plane_mask = 1 << drm_plane_index(crtc->primary);
960
-	*plane_mask |= crtc_state->plane_mask;
961
-
962
-	drm_atomic_set_fb_for_plane(primary_state, set->fb);
963
-	drm_framebuffer_put(set->fb);
964
-	ret = drm_atomic_set_crtc_for_plane(primary_state, crtc);
965
-
966
-	return ret;
967
-}
968
-
969
-static void show_loader_logo(struct drm_device *drm_dev)
970
-{
971
-	struct drm_atomic_state *state, *old_state;
972
-	struct device_node *np = drm_dev->dev->of_node;
973
-	struct drm_mode_config *mode_config = &drm_dev->mode_config;
974
-	struct rockchip_drm_private *private = drm_dev->dev_private;
975
-	struct device_node *root, *route;
976
-	struct rockchip_drm_mode_set *set, *tmp, *unset;
977
-	struct list_head mode_set_list;
978
-	struct list_head mode_unset_list;
979
-	unsigned int plane_mask = 0;
980
-	int ret, i;
981
-
982
-	root = of_get_child_by_name(np, "route");
983
-	if (!root) {
984
-		dev_warn(drm_dev->dev, "failed to parse display resources\n");
740
+	if (!hf_vsdb[7])
985
741
 		return;
986
-	}
987
742
 
988
-	if (init_loader_memory(drm_dev)) {
989
-		dev_warn(drm_dev->dev, "failed to parse loader memory\n");
743
+	DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
744
+	max_frl_rate = (hf_vsdb[7] & EDID_MAX_FRL_RATE_MASK) >> 4;
745
+	get_max_frl_rate(max_frl_rate, max_lanes,
746
+			 max_frl_rate_per_lane);
747
+
748
+	*add_func = hf_vsdb[8];
749
+
750
+	if (cea_db_payload_len(hf_vsdb) < 13)
990
751
 		return;
752
+
753
+	dsc_cap->v_1p2 = hf_vsdb[11] & EDID_DSC_1P2;
754
+
755
+	if (!dsc_cap->v_1p2)
756
+		return;
757
+
758
+	dsc_cap->native_420 = hf_vsdb[11] & EDID_DSC_NATIVE_420;
759
+	dsc_cap->all_bpp = hf_vsdb[11] & EDID_DSC_ALL_BPP;
760
+
761
+	if (hf_vsdb[11] & EDID_DSC_16BPC)
762
+		dsc_cap->bpc_supported = 16;
763
+	else if (hf_vsdb[11] & EDID_DSC_12BPC)
764
+		dsc_cap->bpc_supported = 12;
765
+	else if (hf_vsdb[11] & EDID_DSC_10BPC)
766
+		dsc_cap->bpc_supported = 10;
767
+	else
768
+		dsc_cap->bpc_supported = 0;
769
+
770
+	dsc_max_frl_rate = (hf_vsdb[12] & EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
771
+	get_max_frl_rate(dsc_max_frl_rate, &dsc_cap->max_lanes,
772
+			 &dsc_cap->max_frl_rate_per_lane);
773
+	dsc_cap->total_chunk_kbytes = hf_vsdb[13] & EDID_DSC_TOTAL_CHUNK_KBYTES;
774
+
775
+	dsc_max_slices = hf_vsdb[12] & EDID_DSC_MAX_SLICES;
776
+	switch (dsc_max_slices) {
777
+	case 1:
778
+		dsc_cap->max_slices = 1;
779
+		dsc_cap->clk_per_slice = 340;
780
+		break;
781
+	case 2:
782
+		dsc_cap->max_slices = 2;
783
+		dsc_cap->clk_per_slice = 340;
784
+		break;
785
+	case 3:
786
+		dsc_cap->max_slices = 4;
787
+		dsc_cap->clk_per_slice = 340;
788
+		break;
789
+	case 4:
790
+		dsc_cap->max_slices = 8;
791
+		dsc_cap->clk_per_slice = 340;
792
+		break;
793
+	case 5:
794
+		dsc_cap->max_slices = 8;
795
+		dsc_cap->clk_per_slice = 400;
796
+		break;
797
+	case 6:
798
+		dsc_cap->max_slices = 12;
799
+		dsc_cap->clk_per_slice = 400;
800
+		break;
801
+	case 7:
802
+		dsc_cap->max_slices = 16;
803
+		dsc_cap->clk_per_slice = 400;
804
+		break;
805
+	case 0:
806
+	default:
807
+		dsc_cap->max_slices = 0;
808
+		dsc_cap->clk_per_slice = 0;
991
809
 	}
992
-
993
-	INIT_LIST_HEAD(&mode_set_list);
994
-	INIT_LIST_HEAD(&mode_unset_list);
995
-	drm_modeset_lock_all(drm_dev);
996
-	state = drm_atomic_state_alloc(drm_dev);
997
-	if (!state) {
998
-		dev_err(drm_dev->dev, "failed to alloc atomic state\n");
999
-		ret = -ENOMEM;
1000
-		goto err_unlock;
1001
-	}
1002
-
1003
-	state->acquire_ctx = mode_config->acquire_ctx;
1004
-
1005
-	for_each_child_of_node(root, route) {
1006
-		if (!of_device_is_available(route))
1007
-			continue;
1008
-
1009
-		set = of_parse_display_resource(drm_dev, route);
1010
-		if (!set)
1011
-			continue;
1012
-
1013
-		if (setup_initial_state(drm_dev, state, set)) {
1014
-			drm_framebuffer_put(set->fb);
1015
-			INIT_LIST_HEAD(&set->head);
1016
-			list_add_tail(&set->head, &mode_unset_list);
1017
-			continue;
1018
-		}
1019
-		INIT_LIST_HEAD(&set->head);
1020
-		list_add_tail(&set->head, &mode_set_list);
1021
-	}
1022
-
1023
-	/*
1024
-	 * the mode_unset_list store the unconnected route, if route's crtc
1025
-	 * isn't used, we should close it.
1026
-	 */
1027
-	list_for_each_entry_safe(unset, tmp, &mode_unset_list, head) {
1028
-		struct rockchip_drm_mode_set *tmp_set;
1029
-		int find_used_crtc = 0;
1030
-
1031
-		list_for_each_entry_safe(set, tmp_set, &mode_set_list, head) {
1032
-			if (set->crtc == unset->crtc) {
1033
-				find_used_crtc = 1;
1034
-				continue;
1035
-			}
1036
-		}
1037
-
1038
-		if (!find_used_crtc) {
1039
-			struct drm_crtc *crtc = unset->crtc;
1040
-			int pipe = drm_crtc_index(crtc);
1041
-			struct rockchip_drm_private *priv =
1042
-							drm_dev->dev_private;
1043
-
1044
-			if (unset->hdisplay && unset->vdisplay) {
1045
-				if (priv->crtc_funcs[pipe] &&
1046
-				    priv->crtc_funcs[pipe]->loader_protect)
1047
-					priv->crtc_funcs[pipe]->loader_protect(crtc, true);
1048
-				priv->crtc_funcs[pipe]->crtc_close(crtc);
1049
-				if (priv->crtc_funcs[pipe] &&
1050
-				    priv->crtc_funcs[pipe]->loader_protect)
1051
-					priv->crtc_funcs[pipe]->loader_protect(crtc, false);
1052
-			}
1053
-		}
1054
-
1055
-		list_del(&unset->head);
1056
-		kfree(unset);
1057
-	}
1058
-
1059
-	if (list_empty(&mode_set_list)) {
1060
-		dev_warn(drm_dev->dev, "can't not find any loader display\n");
1061
-		ret = -ENXIO;
1062
-		goto err_free_state;
1063
-	}
1064
-
1065
-	/*
1066
-	 * The state save initial devices status, swap the state into
1067
-	 * drm devices as old state, so if new state come, can compare
1068
-	 * with this state to judge which status need to update.
1069
-	 */
1070
-	WARN_ON(drm_atomic_helper_swap_state(state, false));
1071
-	drm_atomic_state_put(state);
1072
-	old_state = drm_atomic_helper_duplicate_state(drm_dev,
1073
-						      mode_config->acquire_ctx);
1074
-	if (IS_ERR(old_state)) {
1075
-		dev_err(drm_dev->dev, "failed to duplicate atomic state\n");
1076
-		ret = PTR_ERR_OR_ZERO(old_state);
1077
-		goto err_free_state;
1078
-	}
1079
-
1080
-	state = drm_atomic_helper_duplicate_state(drm_dev,
1081
-						  mode_config->acquire_ctx);
1082
-	if (IS_ERR(state)) {
1083
-		dev_err(drm_dev->dev, "failed to duplicate atomic state\n");
1084
-		ret = PTR_ERR_OR_ZERO(state);
1085
-		goto err_free_old_state;
1086
-	}
1087
-	state->acquire_ctx = mode_config->acquire_ctx;
1088
-	list_for_each_entry(set, &mode_set_list, head)
1089
-		/*
1090
-		 * We don't want to see any fail on update_state.
1091
-		 */
1092
-		WARN_ON(update_state(drm_dev, state, set, &plane_mask));
1093
-
1094
-	for (i = 0; i < state->num_connector; i++) {
1095
-		if (state->connectors[i].new_state->connector->status !=
1096
-		    connector_status_connected)
1097
-			state->connectors[i].new_state->best_encoder = NULL;
1098
-	}
1099
-
1100
-	ret = drm_atomic_commit(state);
1101
-	/**
1102
-	 * todo
1103
-	 * drm_atomic_clean_old_fb(drm_dev, plane_mask, ret);
1104
-	 */
1105
-
1106
-	list_for_each_entry_safe(set, tmp, &mode_set_list, head) {
1107
-		if (set->force_output)
1108
-			set->connector->force = DRM_FORCE_UNSPECIFIED;
1109
-		list_del(&set->head);
1110
-		kfree(set);
1111
-	}
1112
-
1113
-	/*
1114
-	 * Is possible get deadlock here?
1115
-	 */
1116
-	WARN_ON(ret == -EDEADLK);
1117
-
1118
-	if (ret) {
1119
-		/*
1120
-		 * restore display status if atomic commit failed.
1121
-		 */
1122
-		WARN_ON(drm_atomic_helper_swap_state(old_state, false));
1123
-		goto err_free_state;
1124
-	}
1125
-
1126
-	rockchip_free_loader_memory(drm_dev);
1127
-	drm_atomic_state_put(old_state);
1128
-	drm_atomic_state_put(state);
1129
-
1130
-	private->loader_protect = true;
1131
-	drm_modeset_unlock_all(drm_dev);
1132
-	return;
1133
-err_free_old_state:
1134
-	drm_atomic_state_put(old_state);
1135
-err_free_state:
1136
-	drm_atomic_state_put(state);
1137
-err_unlock:
1138
-	drm_modeset_unlock_all(drm_dev);
1139
-	if (ret)
1140
-		dev_err(drm_dev->dev, "failed to show loader logo\n");
1141
810
 }
1142
811
 
1143
-static const char *const loader_protect_clocks[] __initconst = {
1144
-	"hclk_vio",
1145
-	"hclk_vop",
1146
-	"hclk_vopb",
1147
-	"hclk_vopl",
1148
-	"aclk_vio",
1149
-	"aclk_vio0",
1150
-	"aclk_vio1",
1151
-	"aclk_vop",
1152
-	"aclk_vopb",
1153
-	"aclk_vopl",
1154
-	"aclk_vo_pre",
1155
-	"aclk_vio_pre",
1156
-	"dclk_vop",
1157
-	"dclk_vop0",
1158
-	"dclk_vop1",
1159
-	"dclk_vopb",
1160
-	"dclk_vopl",
812
+enum {
813
+	VER_26_BYTE_V0,
814
+	VER_15_BYTE_V1,
815
+	VER_12_BYTE_V1,
816
+	VER_12_BYTE_V2,
1161
817
 };
1162
818
 
1163
-static struct clk **loader_clocks __initdata;
1164
-static int __init rockchip_clocks_loader_protect(void)
819
+static int check_next_hdr_version(const u8 *next_hdr_db)
1165
820
 {
1166
-	int nclocks = ARRAY_SIZE(loader_protect_clocks);
1167
-	struct clk *clk;
1168
-	int i;
821
+	u16 ver;
1169
822
 
1170
-	loader_clocks = kcalloc(nclocks, sizeof(void *), GFP_KERNEL);
1171
-	if (!loader_clocks)
1172
-		return -ENOMEM;
823
+	ver = (next_hdr_db[5] & 0xf0) << 8 | next_hdr_db[0];
1173
824
 
1174
-	for (i = 0; i < nclocks; i++) {
1175
-		clk = __clk_lookup(loader_protect_clocks[i]);
1176
-
1177
-		if (clk) {
1178
-			loader_clocks[i] = clk;
1179
-			clk_prepare_enable(clk);
1180
-		}
825
+	switch (ver) {
826
+	case 0x00f9:
827
+		return VER_26_BYTE_V0;
828
+	case 0x20ee:
829
+		return VER_15_BYTE_V1;
830
+	case 0x20eb:
831
+		return VER_12_BYTE_V1;
832
+	case 0x40eb:
833
+		return VER_12_BYTE_V2;
834
+	default:
835
+		return -ENOENT;
1181
836
 	}
1182
-
1183
-	return 0;
1184
837
 }
1185
-arch_initcall_sync(rockchip_clocks_loader_protect);
1186
838
 
1187
-static int __init rockchip_clocks_loader_unprotect(void)
839
+static void parse_ver_26_v0_data(struct ver_26_v0 *hdr, const u8 *data)
1188
840
 {
1189
-	int i;
841
+	hdr->yuv422_12bit = data[5] & BIT(0);
842
+	hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
843
+	hdr->global_dimming = (data[5] & BIT(2)) >> 2;
1190
844
 
1191
-	if (!loader_clocks)
1192
-		return -ENODEV;
845
+	hdr->dm_major_ver = (data[21] & 0xf0) >> 4;
846
+	hdr->dm_minor_ver = data[21] & 0xf;
1193
847
 
1194
-	for (i = 0; i < ARRAY_SIZE(loader_protect_clocks); i++) {
1195
-		struct clk *clk = loader_clocks[i];
848
+	hdr->t_min_pq = (data[19] << 4) | ((data[18] & 0xf0) >> 4);
849
+	hdr->t_max_pq = (data[20] << 4) | (data[18] & 0xf);
1196
850
 
1197
-		if (clk)
1198
-			clk_disable_unprepare(clk);
851
+	hdr->rx = (data[7] << 4) | ((data[6] & 0xf0) >> 4);
852
+	hdr->ry = (data[8] << 4) | (data[6] & 0xf);
853
+	hdr->gx = (data[10] << 4) | ((data[9] & 0xf0) >> 4);
854
+	hdr->gy = (data[11] << 4) | (data[9] & 0xf);
855
+	hdr->bx = (data[13] << 4) | ((data[12] & 0xf0) >> 4);
856
+	hdr->by = (data[14] << 4) | (data[12] & 0xf);
857
+	hdr->wx = (data[16] << 4) | ((data[15] & 0xf0) >> 4);
858
+	hdr->wy = (data[17] << 4) | (data[15] & 0xf);
859
+}
860
+
861
+static void parse_ver_15_v1_data(struct ver_15_v1 *hdr, const u8 *data)
862
+{
863
+	hdr->yuv422_12bit = data[5] & BIT(0);
864
+	hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
865
+	hdr->global_dimming = data[6] & BIT(0);
866
+
867
+	hdr->dm_version = (data[5] & 0x1c) >> 2;
868
+
869
+	hdr->colorimetry = data[7] & BIT(0);
870
+
871
+	hdr->t_max_lum = (data[6] & 0xfe) >> 1;
872
+	hdr->t_min_lum = (data[7] & 0xfe) >> 1;
873
+
874
+	hdr->rx = data[9];
875
+	hdr->ry = data[10];
876
+	hdr->gx = data[11];
877
+	hdr->gy = data[12];
878
+	hdr->bx = data[13];
879
+	hdr->by = data[14];
880
+}
881
+
882
+static void parse_ver_12_v1_data(struct ver_12_v1 *hdr, const u8 *data)
883
+{
884
+	hdr->yuv422_12bit = data[5] & BIT(0);
885
+	hdr->support_2160p_60 = (data[5] & BIT(1)) >> 1;
886
+	hdr->global_dimming = data[6] & BIT(0);
887
+
888
+	hdr->dm_version = (data[5] & 0x1c) >> 2;
889
+
890
+	hdr->colorimetry = data[7] & BIT(0);
891
+
892
+	hdr->t_max_lum = (data[6] & 0xfe) >> 1;
893
+	hdr->t_min_lum = (data[7] & 0xfe) >> 1;
894
+
895
+	hdr->low_latency = data[8] & 0x3;
896
+
897
+	hdr->unique_rx = (data[11] & 0xf8) >> 3;
898
+	hdr->unique_ry = (data[11] & 0x7) << 2 | (data[10] & BIT(0)) << 1 |
899
+		(data[9] & BIT(0));
900
+	hdr->unique_gx = (data[9] & 0xfe) >> 1;
901
+	hdr->unique_gy = (data[10] & 0xfe) >> 1;
902
+	hdr->unique_bx = (data[8] & 0xe0) >> 5;
903
+	hdr->unique_by = (data[8] & 0x1c) >> 2;
904
+}
905
+
906
+static void parse_ver_12_v2_data(struct ver_12_v2 *hdr, const u8 *data)
907
+{
908
+	hdr->yuv422_12bit = data[5] & BIT(0);
909
+	hdr->backlt_ctrl = (data[5] & BIT(1)) >> 1;
910
+	hdr->global_dimming = (data[6] & BIT(2)) >> 2;
911
+
912
+	hdr->dm_version = (data[5] & 0x1c) >> 2;
913
+	hdr->backlt_min_luma = data[6] & 0x3;
914
+	hdr->interface = data[7] & 0x3;
915
+	hdr->yuv444_10b_12b = (data[8] & BIT(0)) << 1 | (data[9] & BIT(0));
916
+
917
+	hdr->t_min_pq_v2 = (data[6] & 0xf8) >> 3;
918
+	hdr->t_max_pq_v2 = (data[7] & 0xf8) >> 3;
919
+
920
+	hdr->unique_rx = (data[10] & 0xf8) >> 3;
921
+	hdr->unique_ry = (data[11] & 0xf8) >> 3;
922
+	hdr->unique_gx = (data[8] & 0xfe) >> 1;
923
+	hdr->unique_gy = (data[9] & 0xfe) >> 1;
924
+	hdr->unique_bx = data[10] & 0x7;
925
+	hdr->unique_by = data[11] & 0x7;
926
+}
927
+
928
+static
929
+void parse_next_hdr_block(struct next_hdr_sink_data *sink_data,
930
+			  const u8 *next_hdr_db)
931
+{
932
+	int version;
933
+
934
+	version = check_next_hdr_version(next_hdr_db);
935
+	if (version < 0)
936
+		return;
937
+
938
+	sink_data->version = version;
939
+
940
+	switch (version) {
941
+	case VER_26_BYTE_V0:
942
+		parse_ver_26_v0_data(&sink_data->ver_26_v0, next_hdr_db);
943
+		break;
944
+	case VER_15_BYTE_V1:
945
+		parse_ver_15_v1_data(&sink_data->ver_15_v1, next_hdr_db);
946
+		break;
947
+	case VER_12_BYTE_V1:
948
+		parse_ver_12_v1_data(&sink_data->ver_12_v1, next_hdr_db);
949
+		break;
950
+	case VER_12_BYTE_V2:
951
+		parse_ver_12_v2_data(&sink_data->ver_12_v2, next_hdr_db);
952
+		break;
953
+	default:
954
+		break;
1199
955
 	}
1200
-	kfree(loader_clocks);
1201
-
1202
-	return 0;
1203
956
 }
1204
-late_initcall_sync(rockchip_clocks_loader_unprotect);
1205
-#endif
1206
957
 
1207
-int rockchip_drm_crtc_send_mcu_cmd(struct drm_device *drm_dev,
1208
-				   struct device_node *np_crtc,
1209
-				   u32 type, u32 value)
958
+int rockchip_drm_parse_cea_ext(struct rockchip_drm_dsc_cap *dsc_cap,
959
+			       u8 *max_frl_rate_per_lane, u8 *max_lanes, u8 *add_func,
960
+			       const struct edid *edid)
1210
961
 {
1211
-	struct drm_crtc *crtc;
1212
-	int pipe = 0;
1213
-	struct rockchip_drm_private *priv;
962
+	const u8 *edid_ext;
963
+	int i, start, end;
1214
964
 
1215
-	if (!np_crtc || !of_device_is_available(np_crtc))
965
+	if (!dsc_cap || !max_frl_rate_per_lane || !max_lanes || !edid || !add_func)
1216
966
 		return -EINVAL;
1217
967
 
1218
-	drm_for_each_crtc(crtc, drm_dev) {
1219
-		if (of_get_parent(crtc->port) == np_crtc)
1220
-			break;
1221
-	}
1222
-
1223
-	pipe = drm_crtc_index(crtc);
1224
-	if (pipe >= ROCKCHIP_MAX_CRTC)
968
+	edid_ext = find_cea_extension(edid);
969
+	if (!edid_ext)
1225
970
 		return -EINVAL;
1226
-	priv = crtc->dev->dev_private;
1227
-	if (priv->crtc_funcs[pipe]->crtc_send_mcu_cmd)
1228
-		priv->crtc_funcs[pipe]->crtc_send_mcu_cmd(crtc, type, value);
971
+
972
+	if (cea_db_offsets(edid_ext, &start, &end))
973
+		return -EINVAL;
974
+
975
+	for_each_cea_db(edid_ext, i, start, end) {
976
+		const u8 *db = &edid_ext[i];
977
+
978
+		if (cea_db_is_hdmi_forum_vsdb(db))
979
+			parse_edid_forum_vsdb(dsc_cap, max_frl_rate_per_lane,
980
+					      max_lanes, add_func, db);
981
+	}
1229
982
 
1230
983
 	return 0;
1231
984
 }
1232
-EXPORT_SYMBOL(rockchip_drm_crtc_send_mcu_cmd);
985
+EXPORT_SYMBOL(rockchip_drm_parse_cea_ext);
986
+
987
+int rockchip_drm_parse_next_hdr(struct next_hdr_sink_data *sink_data,
988
+				const struct edid *edid)
989
+{
990
+	const u8 *edid_ext;
991
+	int i, start, end;
992
+
993
+	if (!sink_data || !edid)
994
+		return -EINVAL;
995
+
996
+	memset(sink_data, 0, sizeof(struct next_hdr_sink_data));
997
+
998
+	edid_ext = find_cea_extension(edid);
999
+	if (!edid_ext)
1000
+		return -EINVAL;
1001
+
1002
+	if (cea_db_offsets(edid_ext, &start, &end))
1003
+		return -EINVAL;
1004
+
1005
+	for_each_cea_db(edid_ext, i, start, end) {
1006
+		const u8 *db = &edid_ext[i];
1007
+
1008
+		if (cea_db_is_hdmi_next_hdr_block(db))
1009
+			parse_next_hdr_block(sink_data, db);
1010
+	}
1011
+
1012
+	return 0;
1013
+}
1014
+EXPORT_SYMBOL(rockchip_drm_parse_next_hdr);
1015
+
1016
+#define COLORIMETRY_DATA_BLOCK		0x5
1017
+#define USE_EXTENDED_TAG		0x07
1018
+
1019
+static bool cea_db_is_hdmi_colorimetry_data_block(const u8 *db)
1020
+{
1021
+	if (cea_db_tag(db) != USE_EXTENDED_TAG)
1022
+		return false;
1023
+
1024
+	if (db[1] != COLORIMETRY_DATA_BLOCK)
1025
+		return false;
1026
+
1027
+	return true;
1028
+}
1029
+
1030
+int
1031
+rockchip_drm_parse_colorimetry_data_block(u8 *colorimetry, const struct edid *edid)
1032
+{
1033
+	const u8 *edid_ext;
1034
+	int i, start, end;
1035
+
1036
+	if (!colorimetry || !edid)
1037
+		return -EINVAL;
1038
+
1039
+	*colorimetry = 0;
1040
+
1041
+	edid_ext = find_cea_extension(edid);
1042
+	if (!edid_ext)
1043
+		return -EINVAL;
1044
+
1045
+	if (cea_db_offsets(edid_ext, &start, &end))
1046
+		return -EINVAL;
1047
+
1048
+	for_each_cea_db(edid_ext, i, start, end) {
1049
+		const u8 *db = &edid_ext[i];
1050
+
1051
+		if (cea_db_is_hdmi_colorimetry_data_block(db))
1052
+			/* As per CEA 861-G spec */
1053
+			*colorimetry = ((db[3] & (0x1 << 7)) << 1) | db[2];
1054
+	}
1055
+
1056
+	return 0;
1057
+}
1058
+EXPORT_SYMBOL(rockchip_drm_parse_colorimetry_data_block);
1233
1059
 
1234
1060
 /*
1235
1061
  * Attach a (component) device to the shared drm dma mapping from master drm
..
..
@@ -1264,6 +1090,17 @@
1264
1090
 		return;
1265
1091
 
1266
1092
 	iommu_detach_device(domain, dev);
1093
+}
1094
+
1095
+void rockchip_drm_crtc_standby(struct drm_crtc *crtc, bool standby)
1096
+{
1097
+	struct rockchip_drm_private *priv = crtc->dev->dev_private;
1098
+	int pipe = drm_crtc_index(crtc);
1099
+
1100
+	if (pipe < ROCKCHIP_MAX_CRTC &&
1101
+	    priv->crtc_funcs[pipe] &&
1102
+	    priv->crtc_funcs[pipe]->crtc_standby)
1103
+		priv->crtc_funcs[pipe]->crtc_standby(crtc, standby);
1267
1104
 }
1268
1105
 
1269
1106
 int rockchip_register_crtc_funcs(struct drm_crtc *crtc,
..
..
@@ -1320,6 +1157,7 @@
1320
1157
 	struct rockchip_drm_private *private = drm_dev->dev_private;
1321
1158
 	struct iommu_domain_geometry *geometry;
1322
1159
 	u64 start, end;
1160
+	int ret = 0;
1323
1161
 
1324
1162
 	if (!is_support_iommu)
1325
1163
 		return 0;
..
..
@@ -1340,7 +1178,23 @@
1340
1178
 	iommu_set_fault_handler(private->domain, rockchip_drm_fault_handler,
1341
1179
 				drm_dev);
1342
1180
 
1343
-	return 0;
1181
+	if (iommu_reserve_map) {
1182
+		/*
1183
+		 * At 32 bit platform size_t maximum value is 0xffffffff, SZ_4G(0x100000000) will be
1184
+		 * cliped to 0, so we split into two mapping
1185
+		 */
1186
+		ret = iommu_map(private->domain, 0, 0, (size_t)SZ_2G,
1187
+				IOMMU_WRITE | IOMMU_READ | IOMMU_PRIV);
1188
+		if (ret)
1189
+			dev_err(drm_dev->dev, "failed to create 0-2G pre mapping\n");
1190
+
1191
+		ret = iommu_map(private->domain, SZ_2G, SZ_2G, (size_t)SZ_2G,
1192
+				IOMMU_WRITE | IOMMU_READ | IOMMU_PRIV);
1193
+		if (ret)
1194
+			dev_err(drm_dev->dev, "failed to create 2G-4G pre mapping\n");
1195
+	}
1196
+
1197
+	return ret;
1344
1198
 }
1345
1199
 
1346
1200
 static void rockchip_iommu_cleanup(struct drm_device *drm_dev)
..
..
@@ -1350,6 +1204,10 @@
1350
1204
 	if (!is_support_iommu)
1351
1205
 		return;
1352
1206
 
1207
+	if (iommu_reserve_map) {
1208
+		iommu_unmap(private->domain, 0, (size_t)SZ_2G);
1209
+		iommu_unmap(private->domain, SZ_2G, (size_t)SZ_2G);
1210
+	}
1353
1211
 	drm_mm_takedown(&private->mm);
1354
1212
 	iommu_domain_free(private->domain);
1355
1213
 }
..
..
@@ -1361,16 +1219,12 @@
1361
1219
 	struct drm_minor *minor = node->minor;
1362
1220
 	struct drm_device *drm_dev = minor->dev;
1363
1221
 	struct rockchip_drm_private *priv = drm_dev->dev_private;
1364
-
1365
1222
 	struct drm_printer p = drm_seq_file_printer(s);
1366
1223
 
1367
1224
 	if (!priv->domain)
1368
1225
 		return 0;
1369
-
1370
1226
 	mutex_lock(&priv->mm_lock);
1371
-
1372
1227
 	drm_mm_print(&priv->mm, &p);
1373
-
1374
1228
 	mutex_unlock(&priv->mm_lock);
1375
1229
 
1376
1230
 	return 0;
..
..
@@ -1440,21 +1294,15 @@
1440
1294
 	{ "mm_dump", rockchip_drm_mm_dump, 0, NULL },
1441
1295
 };
1442
1296
 
1443
-static int rockchip_drm_debugfs_init(struct drm_minor *minor)
1297
+static void rockchip_drm_debugfs_init(struct drm_minor *minor)
1444
1298
 {
1445
1299
 	struct drm_device *dev = minor->dev;
1446
1300
 	struct rockchip_drm_private *priv = dev->dev_private;
1447
1301
 	struct drm_crtc *crtc;
1448
-	int ret;
1449
1302
 
1450
-	ret = drm_debugfs_create_files(rockchip_debugfs_files,
1451
-				       ARRAY_SIZE(rockchip_debugfs_files),
1452
-				       minor->debugfs_root,
1453
-				       minor);
1454
-	if (ret) {
1455
-		dev_err(dev->dev, "could not install rockchip_debugfs_list\n");
1456
-		return ret;
1457
-	}
1303
+	drm_debugfs_create_files(rockchip_debugfs_files,
1304
+				 ARRAY_SIZE(rockchip_debugfs_files),
1305
+				 minor->debugfs_root, minor);
1458
1306
 
1459
1307
 	drm_for_each_crtc(crtc, dev) {
1460
1308
 		int pipe = drm_crtc_index(crtc);
..
..
@@ -1463,10 +1311,14 @@
1463
1311
 		    priv->crtc_funcs[pipe]->debugfs_init)
1464
1312
 			priv->crtc_funcs[pipe]->debugfs_init(minor, crtc);
1465
1313
 	}
1466
-
1467
-	return 0;
1468
1314
 }
1469
1315
 #endif
1316
+
1317
+static const struct drm_prop_enum_list split_area[] = {
1318
+	{ ROCKCHIP_DRM_SPLIT_UNSET, "UNSET" },
1319
+	{ ROCKCHIP_DRM_SPLIT_LEFT_SIDE, "LEFT" },
1320
+	{ ROCKCHIP_DRM_SPLIT_RIGHT_SIDE, "RIGHT" },
1321
+};
1470
1322
 
1471
1323
 static int rockchip_drm_create_properties(struct drm_device *dev)
1472
1324
 {
..
..
@@ -1486,24 +1338,6 @@
1486
1338
 	private->color_space_prop = prop;
1487
1339
 
1488
1340
 	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1489
-					 "GLOBAL_ALPHA", 0, 255);
1490
-	if (!prop)
1491
-		return -ENOMEM;
1492
-	private->global_alpha_prop = prop;
1493
-
1494
-	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1495
-					 "BLEND_MODE", 0, 1);
1496
-	if (!prop)
1497
-		return -ENOMEM;
1498
-	private->blend_mode_prop = prop;
1499
-
1500
-	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1501
-					 "ALPHA_SCALE", 0, 1);
1502
-	if (!prop)
1503
-		return -ENOMEM;
1504
-	private->alpha_scale_prop = prop;
1505
-
1506
-	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1507
1341
 					 "ASYNC_COMMIT", 0, 1);
1508
1342
 	if (!prop)
1509
1343
 		return -ENOMEM;
..
..
@@ -1515,53 +1349,35 @@
1515
1349
 		return -ENOMEM;
1516
1350
 	private->share_id_prop = prop;
1517
1351
 
1518
-	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC,
1352
+	prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC | DRM_MODE_PROP_IMMUTABLE,
1519
1353
 					 "CONNECTOR_ID", 0, 0xf);
1520
1354
 	if (!prop)
1521
1355
 		return -ENOMEM;
1522
1356
 	private->connector_id_prop = prop;
1523
1357
 
1358
+	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "SPLIT_AREA",
1359
+					split_area,
1360
+					ARRAY_SIZE(split_area));
1361
+	private->split_area_prop = prop;
1362
+
1363
+	prop = drm_property_create_object(dev,
1364
+					  DRM_MODE_PROP_ATOMIC | DRM_MODE_PROP_IMMUTABLE,
1365
+					  "SOC_ID", DRM_MODE_OBJECT_CRTC);
1366
+	private->soc_id_prop = prop;
1367
+
1368
+	prop = drm_property_create_object(dev,
1369
+					  DRM_MODE_PROP_ATOMIC | DRM_MODE_PROP_IMMUTABLE,
1370
+					  "PORT_ID", DRM_MODE_OBJECT_CRTC);
1371
+	private->port_id_prop = prop;
1372
+
1373
+	private->aclk_prop = drm_property_create_range(dev, 0, "ACLK", 0, UINT_MAX);
1374
+	private->bg_prop = drm_property_create_range(dev, 0, "BACKGROUND", 0, UINT_MAX);
1375
+	private->line_flag_prop = drm_property_create_range(dev, 0, "LINE_FLAG1", 0, UINT_MAX);
1376
+	private->cubic_lut_prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "CUBIC_LUT", 0);
1377
+	private->cubic_lut_size_prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
1378
+								 "CUBIC_LUT_SIZE", 0, UINT_MAX);
1379
+
1524
1380
 	return drm_mode_create_tv_properties(dev, 0, NULL);
1525
-}
1526
-
1527
-static int rockchip_gem_pool_init(struct drm_device *drm)
1528
-{
1529
-	struct rockchip_drm_private *private = drm->dev_private;
1530
-	struct device_node *np = drm->dev->of_node;
1531
-	struct device_node *node;
1532
-	phys_addr_t start, size;
1533
-	struct resource res;
1534
-	int ret;
1535
-
1536
-	node = of_parse_phandle(np, "secure-memory-region", 0);
1537
-	if (!node)
1538
-		return -ENXIO;
1539
-
1540
-	ret = of_address_to_resource(node, 0, &res);
1541
-	if (ret)
1542
-		return ret;
1543
-	start = res.start;
1544
-	size = resource_size(&res);
1545
-	if (!size)
1546
-		return -ENOMEM;
1547
-
1548
-	private->secure_buffer_pool = gen_pool_create(PAGE_SHIFT, -1);
1549
-	if (!private->secure_buffer_pool)
1550
-		return -ENOMEM;
1551
-
1552
-	gen_pool_add(private->secure_buffer_pool, start, size, -1);
1553
-
1554
-	return 0;
1555
-}
1556
-
1557
-static void rockchip_gem_pool_destroy(struct drm_device *drm)
1558
-{
1559
-	struct rockchip_drm_private *private = drm->dev_private;
1560
-
1561
-	if (!private->secure_buffer_pool)
1562
-		return;
1563
-
1564
-	gen_pool_destroy(private->secure_buffer_pool);
1565
1381
 }
1566
1382
 
1567
1383
 static void rockchip_attach_connector_property(struct drm_device *drm)
..
..
@@ -1633,20 +1449,44 @@
1633
1449
 	drm_modeset_unlock_all(drm);
1634
1450
 }
1635
1451
 
1636
-static bool is_support_hotplug(uint32_t output_type)
1452
+static int rockchip_gem_pool_init(struct drm_device *drm)
1637
1453
 {
1638
-	switch (output_type) {
1639
-	case DRM_MODE_CONNECTOR_DVII:
1640
-	case DRM_MODE_CONNECTOR_DVID:
1641
-	case DRM_MODE_CONNECTOR_DVIA:
1642
-	case DRM_MODE_CONNECTOR_DisplayPort:
1643
-	case DRM_MODE_CONNECTOR_HDMIA:
1644
-	case DRM_MODE_CONNECTOR_HDMIB:
1645
-	case DRM_MODE_CONNECTOR_TV:
1646
-		return true;
1647
-	default:
1648
-		return false;
1649
-	}
1454
+	struct rockchip_drm_private *private = drm->dev_private;
1455
+	struct device_node *np = drm->dev->of_node;
1456
+	struct device_node *node;
1457
+	phys_addr_t start, size;
1458
+	struct resource res;
1459
+	int ret;
1460
+
1461
+	node = of_parse_phandle(np, "secure-memory-region", 0);
1462
+	if (!node)
1463
+		return -ENXIO;
1464
+
1465
+	ret = of_address_to_resource(node, 0, &res);
1466
+	if (ret)
1467
+		return ret;
1468
+	start = res.start;
1469
+	size = resource_size(&res);
1470
+	if (!size)
1471
+		return -ENOMEM;
1472
+
1473
+	private->secure_buffer_pool = gen_pool_create(PAGE_SHIFT, -1);
1474
+	if (!private->secure_buffer_pool)
1475
+		return -ENOMEM;
1476
+
1477
+	gen_pool_add(private->secure_buffer_pool, start, size, -1);
1478
+
1479
+	return 0;
1480
+}
1481
+
1482
+static void rockchip_gem_pool_destroy(struct drm_device *drm)
1483
+{
1484
+	struct rockchip_drm_private *private = drm->dev_private;
1485
+
1486
+	if (!private->secure_buffer_pool)
1487
+		return;
1488
+
1489
+	gen_pool_destroy(private->secure_buffer_pool);
1650
1490
 }
1651
1491
 
1652
1492
 static int rockchip_drm_bind(struct device *dev)
..
..
@@ -1654,9 +1494,6 @@
1654
1494
 	struct drm_device *drm_dev;
1655
1495
 	struct rockchip_drm_private *private;
1656
1496
 	int ret;
1657
-	struct device_node *np = dev->of_node;
1658
-	struct device_node *parent_np;
1659
-	struct drm_crtc *crtc;
1660
1497
 
1661
1498
 	drm_dev = drm_dev_alloc(&rockchip_drm_driver, dev);
1662
1499
 	if (IS_ERR(drm_dev))
..
..
@@ -1670,35 +1507,16 @@
1670
1507
 		goto err_free;
1671
1508
 	}
1672
1509
 
1673
-	mutex_init(&private->commit_lock);
1674
1510
 	mutex_init(&private->ovl_lock);
1675
-	INIT_WORK(&private->commit_work, rockchip_drm_atomic_work);
1511
+
1676
1512
 	drm_dev->dev_private = private;
1677
1513
 
1678
-	private->dmc_support = false;
1679
-	private->devfreq = devfreq_get_devfreq_by_phandle(dev, 0);
1680
-	if (IS_ERR(private->devfreq)) {
1681
-		if (PTR_ERR(private->devfreq) == -EPROBE_DEFER) {
1682
-			parent_np = of_parse_phandle(np, "devfreq", 0);
1683
-			if (parent_np &&
1684
-			    of_device_is_available(parent_np)) {
1685
-				private->dmc_support = true;
1686
-				dev_warn(dev, "defer getting devfreq\n");
1687
-			} else {
1688
-				dev_info(dev, "dmc is disabled\n");
1689
-			}
1690
-		} else {
1691
-			dev_info(dev, "devfreq is not set\n");
1692
-		}
1693
-		private->devfreq = NULL;
1694
-	} else {
1695
-		private->dmc_support = true;
1696
-		dev_info(dev, "devfreq is ready\n");
1697
-	}
1698
-	private->hdmi_pll.pll = devm_clk_get(dev, "hdmi-tmds-pll");
1699
-	if (PTR_ERR(private->hdmi_pll.pll) == -ENOENT) {
1700
-		private->hdmi_pll.pll = NULL;
1701
-	} else if (PTR_ERR(private->hdmi_pll.pll) == -EPROBE_DEFER) {
1514
+	INIT_LIST_HEAD(&private->psr_list);
1515
+	mutex_init(&private->psr_list_lock);
1516
+	mutex_init(&private->commit_lock);
1517
+
1518
+	private->hdmi_pll.pll = devm_clk_get_optional(dev, "hdmi-tmds-pll");
1519
+	if (PTR_ERR(private->hdmi_pll.pll) == -EPROBE_DEFER) {
1702
1520
 		ret = -EPROBE_DEFER;
1703
1521
 		goto err_free;
1704
1522
 	} else if (IS_ERR(private->hdmi_pll.pll)) {
..
..
@@ -1706,10 +1524,8 @@
1706
1524
 		ret = PTR_ERR(private->hdmi_pll.pll);
1707
1525
 		goto err_free;
1708
1526
 	}
1709
-	private->default_pll.pll = devm_clk_get(dev, "default-vop-pll");
1710
-	if (PTR_ERR(private->default_pll.pll) == -ENOENT) {
1711
-		private->default_pll.pll = NULL;
1712
-	} else if (PTR_ERR(private->default_pll.pll) == -EPROBE_DEFER) {
1527
+	private->default_pll.pll = devm_clk_get_optional(dev, "default-vop-pll");
1528
+	if (PTR_ERR(private->default_pll.pll) == -EPROBE_DEFER) {
1713
1529
 		ret = -EPROBE_DEFER;
1714
1530
 		goto err_free;
1715
1531
 	} else if (IS_ERR(private->default_pll.pll)) {
..
..
@@ -1718,14 +1534,9 @@
1718
1534
 		goto err_free;
1719
1535
 	}
1720
1536
 
1721
-	INIT_LIST_HEAD(&private->psr_list);
1722
-	mutex_init(&private->psr_list_lock);
1723
-
1724
-	ret = rockchip_drm_init_iommu(drm_dev);
1537
+	ret = drmm_mode_config_init(drm_dev);
1725
1538
 	if (ret)
1726
1539
 		goto err_free;
1727
-
1728
-	drm_mode_config_init(drm_dev);
1729
1540
 
1730
1541
 	rockchip_drm_mode_config_init(drm_dev);
1731
1542
 	rockchip_drm_create_properties(drm_dev);
..
..
@@ -1751,50 +1562,38 @@
1751
1562
 	/* init kms poll for handling hpd */
1752
1563
 	drm_kms_helper_poll_init(drm_dev);
1753
1564
 
1754
-	private->page_pools = dmabuf_page_pool_create(GFP_HIGHUSER | __GFP_ZERO | __GFP_COMP, 0);
1565
+	ret = rockchip_drm_init_iommu(drm_dev);
1566
+	if (ret)
1567
+		goto err_unbind_all;
1755
1568
 
1756
1569
 	rockchip_gem_pool_init(drm_dev);
1757
-#ifndef MODULE
1758
-	show_loader_logo(drm_dev);
1759
-#endif
1760
1570
 	ret = of_reserved_mem_device_init(drm_dev->dev);
1761
1571
 	if (ret)
1762
1572
 		DRM_DEBUG_KMS("No reserved memory region assign to drm\n");
1763
1573
 
1574
+	rockchip_drm_show_logo(drm_dev);
1575
+
1764
1576
 	ret = rockchip_drm_fbdev_init(drm_dev);
1765
1577
 	if (ret)
1766
-		goto err_kms_helper_poll_fini;
1767
-
1768
-	drm_for_each_crtc(crtc, drm_dev) {
1769
-		struct drm_fb_helper *helper = private->fbdev_helper;
1770
-		struct rockchip_crtc_state *s = NULL;
1771
-
1772
-		if (!helper)
1773
-			break;
1774
-
1775
-		s = to_rockchip_crtc_state(crtc->state);
1776
-		if (is_support_hotplug(s->output_type))
1777
-			drm_framebuffer_get(helper->fb);
1778
-	}
1578
+		goto err_iommu_cleanup;
1779
1579
 
1780
1580
 	drm_dev->mode_config.allow_fb_modifiers = true;
1781
1581
 
1782
1582
 	ret = drm_dev_register(drm_dev, 0);
1783
1583
 	if (ret)
1784
-		goto err_fbdev_fini;
1584
+		goto err_kms_helper_poll_fini;
1785
1585
 
1786
1586
 	return 0;
1787
-err_fbdev_fini:
1788
-	rockchip_drm_fbdev_fini(drm_dev);
1789
1587
 err_kms_helper_poll_fini:
1790
1588
 	rockchip_gem_pool_destroy(drm_dev);
1791
1589
 	drm_kms_helper_poll_fini(drm_dev);
1590
+	rockchip_drm_fbdev_fini(drm_dev);
1591
+err_iommu_cleanup:
1592
+	rockchip_iommu_cleanup(drm_dev);
1792
1593
 err_unbind_all:
1793
-	dmabuf_page_pool_destroy(private->page_pools);
1794
1594
 	component_unbind_all(dev, drm_dev);
1795
1595
 err_mode_config_cleanup:
1796
1596
 	drm_mode_config_cleanup(drm_dev);
1797
-	rockchip_iommu_cleanup(drm_dev);
1798
1597
 err_free:
1799
1598
 	drm_dev->dev_private = NULL;
1800
1599
 	dev_set_drvdata(dev, NULL);
..
..
@@ -1951,61 +1750,20 @@
1951
1750
 	return rockchip_gem_prime_end_cpu_access(obj, dir);
1952
1751
 }
1953
1752
 
1954
-static int rockchip_drm_gem_begin_cpu_access_partial(
1955
-	struct dma_buf *dma_buf,
1956
-	enum dma_data_direction dir,
1957
-	unsigned int offset, unsigned int len)
1958
-{
1959
-	struct drm_gem_object *obj = dma_buf->priv;
1960
-
1961
-	return rockchip_gem_prime_begin_cpu_access_partial(obj, dir, offset, len);
1962
-}
1963
-
1964
-static int rockchip_drm_gem_end_cpu_access_partial(
1965
-	struct dma_buf *dma_buf,
1966
-	enum dma_data_direction dir,
1967
-	unsigned int offset, unsigned int len)
1968
-{
1969
-	struct drm_gem_object *obj = dma_buf->priv;
1970
-
1971
-	return rockchip_gem_prime_end_cpu_access_partial(obj, dir, offset, len);
1972
-}
1973
-
1974
1753
 static const struct dma_buf_ops rockchip_drm_gem_prime_dmabuf_ops = {
1754
+	.cache_sgt_mapping = true,
1975
1755
 	.attach = drm_gem_map_attach,
1976
1756
 	.detach = drm_gem_map_detach,
1977
1757
 	.map_dma_buf = drm_gem_map_dma_buf,
1978
1758
 	.unmap_dma_buf = drm_gem_unmap_dma_buf,
1979
1759
 	.release = drm_gem_dmabuf_release,
1980
-	.map = drm_gem_dmabuf_kmap,
1981
-	.unmap = drm_gem_dmabuf_kunmap,
1982
1760
 	.mmap = drm_gem_dmabuf_mmap,
1983
1761
 	.vmap = drm_gem_dmabuf_vmap,
1984
1762
 	.vunmap = drm_gem_dmabuf_vunmap,
1763
+	.get_uuid = drm_gem_dmabuf_get_uuid,
1985
1764
 	.begin_cpu_access = rockchip_drm_gem_dmabuf_begin_cpu_access,
1986
1765
 	.end_cpu_access = rockchip_drm_gem_dmabuf_end_cpu_access,
1987
-	.begin_cpu_access_partial = rockchip_drm_gem_begin_cpu_access_partial,
1988
-	.end_cpu_access_partial = rockchip_drm_gem_end_cpu_access_partial,
1989
1766
 };
1990
-
1991
-#ifdef CONFIG_ARCH_ROCKCHIP
1992
-static void drm_gem_prime_dmabuf_release_callback(void *data)
1993
-{
1994
-	struct drm_prime_callback_data *cb_data = data;
1995
-
1996
-	if (cb_data && cb_data->obj && cb_data->obj->import_attach) {
1997
-		struct dma_buf_attachment *attach = cb_data->obj->import_attach;
1998
-		struct sg_table *sgt = cb_data->sgt;
1999
-
2000
-		if (sgt)
2001
-			dma_buf_unmap_attachment(attach, sgt,
2002
-						 DMA_BIDIRECTIONAL);
2003
-		dma_buf_detach(attach->dmabuf, attach);
2004
-		drm_gem_object_put_unlocked(cb_data->obj);
2005
-		kfree(cb_data);
2006
-	}
2007
-}
2008
-#endif
2009
1767
 
2010
1768
 static struct drm_gem_object *rockchip_drm_gem_prime_import_dev(struct drm_device *dev,
2011
1769
 								struct dma_buf *dma_buf,
..
..
@@ -2014,9 +1772,6 @@
2014
1772
 	struct dma_buf_attachment *attach;
2015
1773
 	struct sg_table *sgt;
2016
1774
 	struct drm_gem_object *obj;
2017
-#ifdef CONFIG_ARCH_ROCKCHIP
2018
-	struct drm_prime_callback_data *cb_data = NULL;
2019
-#endif
2020
1775
 	int ret;
2021
1776
 
2022
1777
 	if (dma_buf->ops == &rockchip_drm_gem_prime_dmabuf_ops) {
..
..
@@ -2031,15 +1786,6 @@
2031
1786
 		}
2032
1787
 	}
2033
1788
 
2034
-#ifdef CONFIG_ARCH_ROCKCHIP
2035
-	cb_data = dma_buf_get_release_callback_data(dma_buf,
2036
-					drm_gem_prime_dmabuf_release_callback);
2037
-	if (cb_data && cb_data->obj && cb_data->obj->dev == dev) {
2038
-		drm_gem_object_get(cb_data->obj);
2039
-		return cb_data->obj;
2040
-	}
2041
-#endif
2042
-
2043
1789
 	if (!dev->driver->gem_prime_import_sg_table)
2044
1790
 		return ERR_PTR(-EINVAL);
2045
1791
 
..
..
@@ -2048,14 +1794,6 @@
2048
1794
 		return ERR_CAST(attach);
2049
1795
 
2050
1796
 	get_dma_buf(dma_buf);
2051
-
2052
-#ifdef CONFIG_ARCH_ROCKCHIP
2053
-	cb_data = kmalloc(sizeof(*cb_data), GFP_KERNEL);
2054
-	if (!cb_data) {
2055
-		ret = -ENOMEM;
2056
-		goto fail_detach;
2057
-	}
2058
-#endif
2059
1797
 
2060
1798
 	sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
2061
1799
 	if (IS_ERR(sgt)) {
..
..
@@ -2070,24 +1808,13 @@
2070
1808
 	}
2071
1809
 
2072
1810
 	obj->import_attach = attach;
2073
-
2074
-#ifdef CONFIG_ARCH_ROCKCHIP
2075
-	cb_data->obj = obj;
2076
-	cb_data->sgt = sgt;
2077
-	dma_buf_set_release_callback(dma_buf,
2078
-			drm_gem_prime_dmabuf_release_callback, cb_data);
2079
-	dma_buf_put(dma_buf);
2080
-	drm_gem_object_get(obj);
2081
-#endif
1811
+	obj->resv = dma_buf->resv;
2082
1812
 
2083
1813
 	return obj;
2084
1814
 
2085
1815
 fail_unmap:
2086
1816
 	dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
2087
1817
 fail_detach:
2088
-#ifdef CONFIG_ARCH_ROCKCHIP
2089
-	kfree(cb_data);
2090
-#endif
2091
1818
 	dma_buf_detach(dma_buf, attach);
2092
1819
 	dma_buf_put(dma_buf);
2093
1820
 
..
..
@@ -2100,10 +1827,10 @@
2100
1827
 	return rockchip_drm_gem_prime_import_dev(dev, dma_buf, dev->dev);
2101
1828
 }
2102
1829
 
2103
-static struct dma_buf *rockchip_drm_gem_prime_export(struct drm_device *dev,
2104
-						     struct drm_gem_object *obj,
1830
+static struct dma_buf *rockchip_drm_gem_prime_export(struct drm_gem_object *obj,
2105
1831
 						     int flags)
2106
1832
 {
1833
+	struct drm_device *dev = obj->dev;
2107
1834
 	struct dma_buf_export_info exp_info = {
2108
1835
 		.exp_name = KBUILD_MODNAME, /* white lie for debug */
2109
1836
 		.owner = dev->driver->fops->owner,
..
..
@@ -2111,26 +1838,20 @@
2111
1838
 		.size = obj->size,
2112
1839
 		.flags = flags,
2113
1840
 		.priv = obj,
1841
+		.resv = obj->resv,
2114
1842
 	};
2115
-
2116
-	if (dev->driver->gem_prime_res_obj)
2117
-		exp_info.resv = dev->driver->gem_prime_res_obj(obj);
2118
1843
 
2119
1844
 	return drm_gem_dmabuf_export(dev, &exp_info);
2120
1845
 }
2121
1846
 
2122
1847
 static struct drm_driver rockchip_drm_driver = {
2123
-	.driver_features	= DRIVER_MODESET | DRIVER_GEM |
2124
-				  DRIVER_PRIME | DRIVER_ATOMIC |
2125
-				  DRIVER_RENDER,
1848
+	.driver_features	= DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC | DRIVER_RENDER,
2126
1849
 	.postclose		= rockchip_drm_postclose,
2127
1850
 	.lastclose		= rockchip_drm_lastclose,
2128
1851
 	.open			= rockchip_drm_open,
2129
1852
 	.gem_vm_ops		= &drm_gem_cma_vm_ops,
2130
1853
 	.gem_free_object_unlocked = rockchip_gem_free_object,
2131
1854
 	.dumb_create		= rockchip_gem_dumb_create,
2132
-	.dumb_map_offset	= rockchip_gem_dumb_map_offset,
2133
-	.dumb_destroy		= drm_gem_dumb_destroy,
2134
1855
 	.prime_handle_to_fd	= drm_gem_prime_handle_to_fd,
2135
1856
 	.prime_fd_to_handle	= drm_gem_prime_fd_to_handle,
2136
1857
 	.gem_prime_import	= rockchip_drm_gem_prime_import,
..
..
@@ -2151,64 +1872,21 @@
2151
1872
 	.date	= DRIVER_DATE,
2152
1873
 	.major	= DRIVER_MAJOR,
2153
1874
 	.minor	= DRIVER_MINOR,
2154
-	.patchlevel	= DRIVER_PATCH,
2155
1875
 };
2156
1876
 
2157
1877
 #ifdef CONFIG_PM_SLEEP
2158
-static void rockchip_drm_fb_suspend(struct drm_device *drm)
2159
-{
2160
-	struct rockchip_drm_private *priv = drm->dev_private;
2161
-
2162
-	console_lock();
2163
-	drm_fb_helper_set_suspend(priv->fbdev_helper, 1);
2164
-	console_unlock();
2165
-}
2166
-
2167
-static void rockchip_drm_fb_resume(struct drm_device *drm)
2168
-{
2169
-	struct rockchip_drm_private *priv = drm->dev_private;
2170
-
2171
-	console_lock();
2172
-	drm_fb_helper_set_suspend(priv->fbdev_helper, 0);
2173
-	console_unlock();
2174
-}
2175
-
2176
1878
 static int rockchip_drm_sys_suspend(struct device *dev)
2177
1879
 {
2178
1880
 	struct drm_device *drm = dev_get_drvdata(dev);
2179
-	struct rockchip_drm_private *priv;
2180
1881
 
2181
-	if (!drm)
2182
-		return 0;
2183
-
2184
-	drm_kms_helper_poll_disable(drm);
2185
-	rockchip_drm_fb_suspend(drm);
2186
-
2187
-	priv = drm->dev_private;
2188
-	priv->state = drm_atomic_helper_suspend(drm);
2189
-	if (IS_ERR(priv->state)) {
2190
-		rockchip_drm_fb_resume(drm);
2191
-		drm_kms_helper_poll_enable(drm);
2192
-		return PTR_ERR(priv->state);
2193
-	}
2194
-
2195
-	return 0;
1882
+	return drm_mode_config_helper_suspend(drm);
2196
1883
 }
2197
1884
 
2198
1885
 static int rockchip_drm_sys_resume(struct device *dev)
2199
1886
 {
2200
1887
 	struct drm_device *drm = dev_get_drvdata(dev);
2201
-	struct rockchip_drm_private *priv;
2202
1888
 
2203
-	if (!drm)
2204
-		return 0;
2205
-
2206
-	priv = drm->dev_private;
2207
-	drm_atomic_helper_resume(drm, priv->state);
2208
-	rockchip_drm_fb_resume(drm);
2209
-	drm_kms_helper_poll_enable(drm);
2210
-
2211
-	return 0;
1889
+	return drm_mode_config_helper_resume(drm);
2212
1890
 }
2213
1891
 #endif
2214
1892
 
..
..
@@ -2220,6 +1898,53 @@
2220
1898
 #define MAX_ROCKCHIP_SUB_DRIVERS 16
2221
1899
 static struct platform_driver *rockchip_sub_drivers[MAX_ROCKCHIP_SUB_DRIVERS];
2222
1900
 static int num_rockchip_sub_drivers;
1901
+
1902
+/*
1903
+ * Check if a vop endpoint is leading to a rockchip subdriver or bridge.
1904
+ * Should be called from the component bind stage of the drivers
1905
+ * to ensure that all subdrivers are probed.
1906
+ *
1907
+ * @ep: endpoint of a rockchip vop
1908
+ *
1909
+ * returns true if subdriver, false if external bridge and -ENODEV
1910
+ * if remote port does not contain a device.
1911
+ */
1912
+int rockchip_drm_endpoint_is_subdriver(struct device_node *ep)
1913
+{
1914
+	struct device_node *node = of_graph_get_remote_port_parent(ep);
1915
+	struct platform_device *pdev;
1916
+	struct device_driver *drv;
1917
+	int i;
1918
+
1919
+	if (!node)
1920
+		return -ENODEV;
1921
+
1922
+	/* status disabled will prevent creation of platform-devices */
1923
+	pdev = of_find_device_by_node(node);
1924
+	of_node_put(node);
1925
+	if (!pdev)
1926
+		return -ENODEV;
1927
+
1928
+	/*
1929
+	 * All rockchip subdrivers have probed at this point, so
1930
+	 * any device not having a driver now is an external bridge.
1931
+	 */
1932
+	drv = pdev->dev.driver;
1933
+	if (!drv) {
1934
+		platform_device_put(pdev);
1935
+		return false;
1936
+	}
1937
+
1938
+	for (i = 0; i < num_rockchip_sub_drivers; i++) {
1939
+		if (rockchip_sub_drivers[i] == to_platform_driver(drv)) {
1940
+			platform_device_put(pdev);
1941
+			return true;
1942
+		}
1943
+	}
1944
+
1945
+	platform_device_put(pdev);
1946
+	return false;
1947
+}
2223
1948
 
2224
1949
 static int compare_dev(struct device *dev, void *data)
2225
1950
 {
..
..
@@ -2244,8 +1969,7 @@
2244
1969
 		struct device *p = NULL, *d;
2245
1970
 
2246
1971
 		do {
2247
-			d = bus_find_device(&platform_bus_type, p, &drv->driver,
2248
-					    (void *)platform_bus_type.match);
1972
+			d = platform_find_device_by_driver(p, &drv->driver);
2249
1973
 			put_device(p);
2250
1974
 			p = d;
2251
1975
 
..
..
@@ -2291,7 +2015,7 @@
2291
2015
 		}
2292
2016
 
2293
2017
 		iommu = of_parse_phandle(port->parent, "iommus", 0);
2294
-		if (!iommu || !of_device_is_available(iommu->parent)) {
2018
+		if (!iommu || !of_device_is_available(iommu)) {
2295
2019
 			DRM_DEV_DEBUG(dev,
2296
2020
 				      "no iommu attached for %pOF, using non-iommu buffers\n",
2297
2021
 				      port->parent);
..
..
@@ -2304,6 +2028,7 @@
2304
2028
 
2305
2029
 		found = true;
2306
2030
 
2031
+		iommu_reserve_map |= of_property_read_bool(iommu, "rockchip,reserve-map");
2307
2032
 		of_node_put(iommu);
2308
2033
 		of_node_put(port);
2309
2034
 	}
..
..
@@ -2338,14 +2063,19 @@
2338
2063
 	if (IS_ERR(match))
2339
2064
 		return PTR_ERR(match);
2340
2065
 
2066
+	ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
2067
+	if (ret)
2068
+		goto err;
2069
+
2341
2070
 	ret = component_master_add_with_match(dev, &rockchip_drm_ops, match);
2342
-	if (ret < 0) {
2343
-		rockchip_drm_match_remove(dev);
2344
-		return ret;
2345
-	}
2346
-	dev->coherent_dma_mask = DMA_BIT_MASK(64);
2071
+	if (ret < 0)
2072
+		goto err;
2347
2073
 
2348
2074
 	return 0;
2075
+err:
2076
+	rockchip_drm_match_remove(dev);
2077
+
2078
+	return ret;
2349
2079
 }
2350
2080
 
2351
2081
 static int rockchip_drm_platform_remove(struct platform_device *pdev)
..
..
@@ -2361,10 +2091,8 @@
2361
2091
 {
2362
2092
 	struct drm_device *drm = platform_get_drvdata(pdev);
2363
2093
 
2364
-	if (drm) {
2365
-		drm_kms_helper_poll_fini(drm);
2094
+	if (drm)
2366
2095
 		drm_atomic_helper_shutdown(drm);
2367
-	}
2368
2096
 }
2369
2097
 
2370
2098
 static const struct of_device_id rockchip_drm_dt_ids[] = {
..
..
@@ -2400,6 +2128,7 @@
2400
2128
 #else
2401
2129
 	ADD_ROCKCHIP_SUB_DRIVER(vop_platform_driver, CONFIG_ROCKCHIP_VOP);
2402
2130
 	ADD_ROCKCHIP_SUB_DRIVER(vop2_platform_driver, CONFIG_ROCKCHIP_VOP2);
2131
+	ADD_ROCKCHIP_SUB_DRIVER(vconn_platform_driver, CONFIG_ROCKCHIP_VCONN);
2403
2132
 	ADD_ROCKCHIP_SUB_DRIVER(rockchip_lvds_driver,
2404
2133
 				CONFIG_ROCKCHIP_LVDS);
2405
2134
 	ADD_ROCKCHIP_SUB_DRIVER(rockchip_dp_driver,
..
..
@@ -2407,12 +2136,17 @@
2407
2136
 	ADD_ROCKCHIP_SUB_DRIVER(cdn_dp_driver, CONFIG_ROCKCHIP_CDN_DP);
2408
2137
 	ADD_ROCKCHIP_SUB_DRIVER(dw_hdmi_rockchip_pltfm_driver,
2409
2138
 				CONFIG_ROCKCHIP_DW_HDMI);
2410
-	ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi_driver,
2139
+	ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi_rockchip_driver,
2140
+				CONFIG_ROCKCHIP_DW_MIPI_DSI);
2141
+	ADD_ROCKCHIP_SUB_DRIVER(dw_mipi_dsi2_rockchip_driver,
2411
2142
 				CONFIG_ROCKCHIP_DW_MIPI_DSI);
2412
2143
 	ADD_ROCKCHIP_SUB_DRIVER(inno_hdmi_driver, CONFIG_ROCKCHIP_INNO_HDMI);
2413
-	ADD_ROCKCHIP_SUB_DRIVER(rockchip_tve_driver,
2414
-				CONFIG_ROCKCHIP_DRM_TVE);
2144
+	ADD_ROCKCHIP_SUB_DRIVER(rk3066_hdmi_driver,
2145
+				CONFIG_ROCKCHIP_RK3066_HDMI);
2415
2146
 	ADD_ROCKCHIP_SUB_DRIVER(rockchip_rgb_driver, CONFIG_ROCKCHIP_RGB);
2147
+	ADD_ROCKCHIP_SUB_DRIVER(rockchip_tve_driver, CONFIG_ROCKCHIP_DRM_TVE);
2148
+	ADD_ROCKCHIP_SUB_DRIVER(dw_dp_driver, CONFIG_ROCKCHIP_DW_DP);
2149
+
2416
2150
 #endif
2417
2151
 	ret = platform_register_drivers(rockchip_sub_drivers,
2418
2152
 					num_rockchip_sub_drivers);
..
..
@@ -2422,6 +2156,8 @@
2422
2156
 	ret = platform_driver_register(&rockchip_drm_platform_driver);
2423
2157
 	if (ret)
2424
2158
 		goto err_unreg_drivers;
2159
+
2160
+	rockchip_gem_get_ddr_info();
2425
2161
 
2426
2162
 	return 0;
2427
2163
 
..
..
@@ -2439,7 +2175,11 @@
2439
2175
 				    num_rockchip_sub_drivers);
2440
2176
 }
2441
2177
 
2178
+#ifdef CONFIG_VIDEO_REVERSE_IMAGE
2179
+fs_initcall(rockchip_drm_init);
2180
+#else
2442
2181
 module_init(rockchip_drm_init);
2182
+#endif
2443
2183
 module_exit(rockchip_drm_fini);
2444
2184
 
2445
2185
 MODULE_AUTHOR("Mark Yao <mark.yao@rock-chips.com>");