modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/gpu/drm/rockchip/rockchip_drm_drv.c
..
..
@@ -37,7 +37,6 @@
37
37
 #include "rockchip_drm_logo.h"
38
38
 
39
39
 #include "../drm_crtc_internal.h"
40
-#include "../drivers/clk/rockchip/clk.h"
41
40
 
42
41
 #define DRIVER_NAME	"rockchip"
43
42
 #define DRIVER_DESC	"RockChip Soc DRM"
..
..
@@ -125,6 +124,7 @@
125
124
 	hbp = mode->htotal - mode->hsync_end;
126
125
 
127
126
 	mode->clock *= 2;
127
+	mode->crtc_clock *= 2;
128
128
 	mode->hdisplay = hactive * 2;
129
129
 	mode->hsync_start = mode->hdisplay + hfp * 2;
130
130
 	mode->hsync_end = mode->hsync_start + hsync * 2;
..
..
@@ -143,6 +143,7 @@
143
143
 	hbp = mode->htotal - mode->hsync_end;
144
144
 
145
145
 	mode->clock /= 2;
146
+	mode->crtc_clock /= 2;
146
147
 	mode->hdisplay = hactive / 2;
147
148
 	mode->hsync_start = mode->hdisplay + hfp / 2;
148
149
 	mode->hsync_end = mode->hsync_start + hsync / 2;
..
..
@@ -197,6 +198,30 @@
197
198
 	return 0;
198
199
 }
199
200
 EXPORT_SYMBOL(rockchip_drm_get_bpp);
201
+
202
+uint32_t rockchip_drm_get_cycles_per_pixel(uint32_t bus_format)
203
+{
204
+	switch (bus_format) {
205
+	case MEDIA_BUS_FMT_RGB565_1X16:
206
+	case MEDIA_BUS_FMT_RGB666_1X18:
207
+	case MEDIA_BUS_FMT_RGB888_1X24:
208
+	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
209
+		return 1;
210
+	case MEDIA_BUS_FMT_RGB565_2X8_LE:
211
+	case MEDIA_BUS_FMT_BGR565_2X8_LE:
212
+		return 2;
213
+	case MEDIA_BUS_FMT_RGB666_3X6:
214
+	case MEDIA_BUS_FMT_RGB888_3X8:
215
+	case MEDIA_BUS_FMT_BGR888_3X8:
216
+		return 3;
217
+	case MEDIA_BUS_FMT_RGB888_DUMMY_4X8:
218
+	case MEDIA_BUS_FMT_BGR888_DUMMY_4X8:
219
+		return 4;
220
+	default:
221
+		return 1;
222
+	}
223
+}
224
+EXPORT_SYMBOL(rockchip_drm_get_cycles_per_pixel);
200
225
 
201
226
 /**
202
227
  * rockchip_drm_of_find_possible_crtcs - find the possible CRTCs for an active
..
..
@@ -1289,6 +1314,12 @@
1289
1314
 }
1290
1315
 #endif
1291
1316
 
1317
+static const struct drm_prop_enum_list split_area[] = {
1318
+	{ ROCKCHIP_DRM_SPLIT_UNSET, "UNSET" },
1319
+	{ ROCKCHIP_DRM_SPLIT_LEFT_SIDE, "LEFT" },
1320
+	{ ROCKCHIP_DRM_SPLIT_RIGHT_SIDE, "RIGHT" },
1321
+};
1322
+
1292
1323
 static int rockchip_drm_create_properties(struct drm_device *dev)
1293
1324
 {
1294
1325
 	struct drm_property *prop;
..
..
@@ -1324,6 +1355,11 @@
1324
1355
 		return -ENOMEM;
1325
1356
 	private->connector_id_prop = prop;
1326
1357
 
1358
+	prop = drm_property_create_enum(dev, DRM_MODE_PROP_ENUM, "SPLIT_AREA",
1359
+					split_area,
1360
+					ARRAY_SIZE(split_area));
1361
+	private->split_area_prop = prop;
1362
+
1327
1363
 	prop = drm_property_create_object(dev,
1328
1364
 					  DRM_MODE_PROP_ATOMIC | DRM_MODE_PROP_IMMUTABLE,
1329
1365
 					  "SOC_ID", DRM_MODE_OBJECT_CRTC);
..
..
@@ -1337,6 +1373,9 @@
1337
1373
 	private->aclk_prop = drm_property_create_range(dev, 0, "ACLK", 0, UINT_MAX);
1338
1374
 	private->bg_prop = drm_property_create_range(dev, 0, "BACKGROUND", 0, UINT_MAX);
1339
1375
 	private->line_flag_prop = drm_property_create_range(dev, 0, "LINE_FLAG1", 0, UINT_MAX);
1376
+	private->cubic_lut_prop = drm_property_create(dev, DRM_MODE_PROP_BLOB, "CUBIC_LUT", 0);
1377
+	private->cubic_lut_size_prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE,
1378
+								 "CUBIC_LUT_SIZE", 0, UINT_MAX);
1340
1379
 
1341
1380
 	return drm_mode_create_tv_properties(dev, 0, NULL);
1342
1381
 }
..
..
@@ -1543,8 +1582,6 @@
1543
1582
 	ret = drm_dev_register(drm_dev, 0);
1544
1583
 	if (ret)
1545
1584
 		goto err_kms_helper_poll_fini;
1546
-
1547
-	rockchip_clk_unprotect();
1548
1585
 
1549
1586
 	return 0;
1550
1587
 err_kms_helper_poll_fini: