modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/drivers/gpu/drm/rockchip/cdn-dp-reg.h
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@@ -1,15 +1,7 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
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  * Author: Chris Zhong <zyw@rock-chips.com>
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- *
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- * This software is licensed under the terms of the GNU General Public
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- * License version 2, as published by the Free Software Foundation, and
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- * may be copied, distributed, and modified under those terms.
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- *
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- * This program is distributed in the hope that it will be useful,
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- * but WITHOUT ANY WARRANTY; without even the implied warranty of
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- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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- * GNU General Public License for more details.
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  */
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 #ifndef _CDN_DP_REG_H
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@@ -17,7 +9,6 @@
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 #include <linux/bitops.h>
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 #include <linux/phy/phy.h>
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-#include <linux/phy/phy-rockchip-typec.h>
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 #define ADDR_IMEM		0x10000
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 #define ADDR_DMEM		0x20000
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@@ -430,18 +421,6 @@
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 #define SPDIF_JITTER_THRSH(x)			(((x) & 0xff) << 3)
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 #define SPDIF_JITTER_AVG_WIN(x)			((x) & 0x7)
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-/* SOURCE_PIF_WR_REQ */
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-#define HOST_WR			BIT(0)
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-
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-/* SOURCE_PIF_PKT_ALLOC_REG */
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-#define ACTIVE_IDLE_TYPE(x)	(((x) & 0x1) << 17)
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-#define TYPE_VALID		BIT(16)
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-#define PACKET_TYPE(x)		(((x) & 0xff) << 8)
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-#define PKT_ALLOC_ADDRESS(x)	(((x) & 0xf) << 0)
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-
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-/* SOURCE_PIF_PKT_ALLOC_WR_EN */
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-#define PKT_ALLOC_WR_EN		BIT(0)
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-
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 /* Reference cycles when using lane clock as reference */
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 #define LANE_REF_CYC				0x8000
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@@ -539,6 +518,4 @@
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 int cdn_dp_audio_mute(struct cdn_dp_device *dp, bool enable);
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 int cdn_dp_audio_config(struct cdn_dp_device *dp, struct audio_info *audio);
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 int cdn_dp_software_train_link(struct cdn_dp_device *dp);
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-void cdn_dp_infoframe_set(struct cdn_dp_device *dp, int entry_id, u8 *buf,
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-			  u32 len, int type);
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 #endif /* _CDN_DP_REG_H */