.. | .. |
---|
87 | 87 | #define R600_MEDIUM_VID_LOWER_GPIO_CNTL 0x720 |
---|
88 | 88 | #define R600_LOW_VID_LOWER_GPIO_CNTL 0x724 |
---|
89 | 89 | |
---|
90 | | -#define R600_D1GRPH_SWAP_CONTROL 0x610C |
---|
91 | | -# define R600_D1GRPH_SWAP_ENDIAN_NONE (0 << 0) |
---|
92 | | -# define R600_D1GRPH_SWAP_ENDIAN_16BIT (1 << 0) |
---|
93 | | -# define R600_D1GRPH_SWAP_ENDIAN_32BIT (2 << 0) |
---|
94 | | -# define R600_D1GRPH_SWAP_ENDIAN_64BIT (3 << 0) |
---|
| 90 | +#define R600_D1GRPH_SWAP_CONTROL 0x610C |
---|
| 91 | +# define R600_D1GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) |
---|
| 92 | +# define R600_D1GRPH_SWAP_ENDIAN_NONE 0 |
---|
| 93 | +# define R600_D1GRPH_SWAP_ENDIAN_16BIT 1 |
---|
| 94 | +# define R600_D1GRPH_SWAP_ENDIAN_32BIT 2 |
---|
| 95 | +# define R600_D1GRPH_SWAP_ENDIAN_64BIT 3 |
---|
| 96 | +# define R600_D1GRPH_RED_CROSSBAR(x) (((x) & 0x3) << 4) |
---|
| 97 | +# define R600_D1GRPH_RED_SEL_R 0 |
---|
| 98 | +# define R600_D1GRPH_RED_SEL_G 1 |
---|
| 99 | +# define R600_D1GRPH_RED_SEL_B 2 |
---|
| 100 | +# define R600_D1GRPH_RED_SEL_A 3 |
---|
| 101 | +# define R600_D1GRPH_GREEN_CROSSBAR(x) (((x) & 0x3) << 6) |
---|
| 102 | +# define R600_D1GRPH_GREEN_SEL_G 0 |
---|
| 103 | +# define R600_D1GRPH_GREEN_SEL_B 1 |
---|
| 104 | +# define R600_D1GRPH_GREEN_SEL_A 2 |
---|
| 105 | +# define R600_D1GRPH_GREEN_SEL_R 3 |
---|
| 106 | +# define R600_D1GRPH_BLUE_CROSSBAR(x) (((x) & 0x3) << 8) |
---|
| 107 | +# define R600_D1GRPH_BLUE_SEL_B 0 |
---|
| 108 | +# define R600_D1GRPH_BLUE_SEL_A 1 |
---|
| 109 | +# define R600_D1GRPH_BLUE_SEL_R 2 |
---|
| 110 | +# define R600_D1GRPH_BLUE_SEL_G 3 |
---|
| 111 | +# define R600_D1GRPH_ALPHA_CROSSBAR(x) (((x) & 0x3) << 10) |
---|
| 112 | +# define R600_D1GRPH_ALPHA_SEL_A 0 |
---|
| 113 | +# define R600_D1GRPH_ALPHA_SEL_R 1 |
---|
| 114 | +# define R600_D1GRPH_ALPHA_SEL_G 2 |
---|
| 115 | +# define R600_D1GRPH_ALPHA_SEL_B 3 |
---|
95 | 116 | |
---|
96 | 117 | #define R600_HDP_NONSURFACE_BASE 0x2c04 |
---|
97 | 118 | |
---|