~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,31 +1,31 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
3	4	* Copyright (C) 2013 Red Hat
4	5	* Author: Rob Clark <robdclark@gmail.com>
5		- *
6		- * This program is free software; you can redistribute it and/or modify it
7		- * under the terms of the GNU General Public License version 2 as published by
8		- * the Free Software Foundation.
9		- *
10		- * This program is distributed in the hope that it will be useful, but WITHOUT
11		- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12		- * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13		- * more details.
14		- *
15		- * You should have received a copy of the GNU General Public License along with
16		- * this program. If not, see <http://www.gnu.org/licenses/>.
17	6	*/
18	7
	8	+#include <linux/dma-mapping.h>
19	9	#include <linux/kthread.h>
	10	+#include <linux/uaccess.h>
20	11	#include <uapi/linux/sched/types.h>
	12	+
	13	+#include <drm/drm_bridge.h>
	14	+#include <drm/drm_drv.h>
	15	+#include <drm/drm_file.h>
	16	+#include <drm/drm_ioctl.h>
	17	+#include <drm/drm_irq.h>
	18	+#include <drm/drm_prime.h>
21	19	#include <drm/drm_of.h>
	20	+#include <drm/drm_vblank.h>
22	21
23	22	#include "msm_drv.h"
24	23	#include "msm_debugfs.h"
25	24	#include "msm_fence.h"
	25	+#include "msm_gem.h"
26	26	#include "msm_gpu.h"
27	27	#include "msm_kms.h"
28		-
	28	+#include "adreno/adreno_gpu.h"
29	29
30	30	/*
31	31	* MSM driver version:
..	..	@@ -35,9 +35,13 @@
35	35	* - 1.3.0 - adds GMEM_BASE + NR_RINGS params, SUBMITQUEUE_NEW +
36	36	* SUBMITQUEUE_CLOSE ioctls, and MSM_INFO_IOVA flag for
37	37	* MSM_GEM_INFO ioctl.
	38	+ * - 1.4.0 - softpin, MSM_RELOC_BO_DUMP, and GEM_INFO support to set/get
	39	+ * GEM object's debug name
	40	+ * - 1.5.0 - Add SUBMITQUERY_QUERY ioctl
	41	+ * - 1.6.0 - Syncobj support
38	42	*/
39	43	#define MSM_VERSION_MAJOR 1
40		-#define MSM_VERSION_MINOR 3
	44	+#define MSM_VERSION_MINOR 6
41	45	#define MSM_VERSION_PATCHLEVEL 0
42	46
43	47	static const struct drm_mode_config_funcs mode_config_funcs = {
..	..	@@ -81,46 +85,6 @@
81	85	* Util/helpers:
82	86	*/
83	87
84		-int msm_clk_bulk_get(struct device dev, struct clk_bulk_data *bulk)
85		-{
86		- struct property *prop;
87		- const char *name;
88		- struct clk_bulk_data *local;
89		- int i = 0, ret, count;
90		-
91		- count = of_property_count_strings(dev->of_node, "clock-names");
92		- if (count < 1)
93		- return 0;
94		-
95		- local = devm_kcalloc(dev, sizeof(struct clk_bulk_data *),
96		- count, GFP_KERNEL);
97		- if (!local)
98		- return -ENOMEM;
99		-
100		- of_property_for_each_string(dev->of_node, "clock-names", prop, name) {
101		- local[i].id = devm_kstrdup(dev, name, GFP_KERNEL);
102		- if (!local[i].id) {
103		- devm_kfree(dev, local);
104		- return -ENOMEM;
105		- }
106		-
107		- i++;
108		- }
109		-
110		- ret = devm_clk_bulk_get(dev, count, local);
111		-
112		- if (ret) {
113		- for (i = 0; i < count; i++)
114		- devm_kfree(dev, (void *) local[i].id);
115		- devm_kfree(dev, local);
116		-
117		- return ret;
118		- }
119		-
120		- *bulk = local;
121		- return count;
122		-}
123		-
124	88	struct clk msm_clk_bulk_get_clock(struct clk_bulk_data bulk, int count,
125	89	const char *name)
126	90	{
..	..	@@ -157,8 +121,8 @@
157	121	return clk;
158	122	}
159	123
160		-void __iomem msm_ioremap(struct platform_device pdev, const char *name,
161		- const char *dbgname)
	124	+void __iomem _msm_ioremap(struct platform_device pdev, const char *name,
	125	+ const char *dbgname, bool quiet)
162	126	{
163	127	struct resource *res;
164	128	unsigned long size;
..	..	@@ -170,15 +134,17 @@
170	134	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
171	135
172	136	if (!res) {
173		- dev_err(&pdev->dev, "failed to get memory resource: %s\n", name);
	137	+ if (!quiet)
	138	+ DRM_DEV_ERROR(&pdev->dev, "failed to get memory resource: %s\n", name);
174	139	return ERR_PTR(-EINVAL);
175	140	}
176	141
177	142	size = resource_size(res);
178	143
179		- ptr = devm_ioremap_nocache(&pdev->dev, res->start, size);
	144	+ ptr = devm_ioremap(&pdev->dev, res->start, size);
180	145	if (!ptr) {
181		- dev_err(&pdev->dev, "failed to ioremap: %s\n", name);
	146	+ if (!quiet)
	147	+ DRM_DEV_ERROR(&pdev->dev, "failed to ioremap: %s\n", name);
182	148	return ERR_PTR(-ENOMEM);
183	149	}
184	150
..	..	@@ -186,6 +152,18 @@
186	152	printk(KERN_DEBUG "IO:region %s %p %08lx\n", dbgname, ptr, size);
187	153
188	154	return ptr;
	155	+}
	156	+
	157	+void __iomem msm_ioremap(struct platform_device pdev, const char *name,
	158	+ const char *dbgname)
	159	+{
	160	+ return _msm_ioremap(pdev, name, dbgname, false);
	161	+}
	162	+
	163	+void __iomem msm_ioremap_quiet(struct platform_device pdev, const char *name,
	164	+ const char *dbgname)
	165	+{
	166	+ return _msm_ioremap(pdev, name, dbgname, true);
189	167	}
190	168
191	169	void msm_writel(u32 data, void __iomem *addr)
..	..	@@ -203,62 +181,44 @@
203	181	return val;
204	182	}
205	183
206		-struct vblank_event {
207		- struct list_head node;
	184	+struct msm_vblank_work {
	185	+ struct work_struct work;
208	186	int crtc_id;
209	187	bool enable;
	188	+ struct msm_drm_private *priv;
210	189	};
211	190
212		-static void vblank_ctrl_worker(struct kthread_work *work)
	191	+static void vblank_ctrl_worker(struct work_struct *work)
213	192	{
214		- struct msm_vblank_ctrl *vbl_ctrl = container_of(work,
215		- struct msm_vblank_ctrl, work);
216		- struct msm_drm_private *priv = container_of(vbl_ctrl,
217		- struct msm_drm_private, vblank_ctrl);
	193	+ struct msm_vblank_work *vbl_work = container_of(work,
	194	+ struct msm_vblank_work, work);
	195	+ struct msm_drm_private *priv = vbl_work->priv;
218	196	struct msm_kms *kms = priv->kms;
219		- struct vblank_event vbl_ev, tmp;
220		- unsigned long flags;
221	197
222		- spin_lock_irqsave(&vbl_ctrl->lock, flags);
223		- list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
224		- list_del(&vbl_ev->node);
225		- spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
	198	+ if (vbl_work->enable)
	199	+ kms->funcs->enable_vblank(kms, priv->crtcs[vbl_work->crtc_id]);
	200	+ else
	201	+ kms->funcs->disable_vblank(kms, priv->crtcs[vbl_work->crtc_id]);
226	202
227		- if (vbl_ev->enable)
228		- kms->funcs->enable_vblank(kms,
229		- priv->crtcs[vbl_ev->crtc_id]);
230		- else
231		- kms->funcs->disable_vblank(kms,
232		- priv->crtcs[vbl_ev->crtc_id]);
233		-
234		- kfree(vbl_ev);
235		-
236		- spin_lock_irqsave(&vbl_ctrl->lock, flags);
237		- }
238		-
239		- spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
	203	+ kfree(vbl_work);
240	204	}
241	205
242	206	static int vblank_ctrl_queue_work(struct msm_drm_private *priv,
243	207	int crtc_id, bool enable)
244	208	{
245		- struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
246		- struct vblank_event *vbl_ev;
247		- unsigned long flags;
	209	+ struct msm_vblank_work *vbl_work;
248	210
249		- vbl_ev = kzalloc(sizeof(*vbl_ev), GFP_ATOMIC);
250		- if (!vbl_ev)
	211	+ vbl_work = kzalloc(sizeof(*vbl_work), GFP_ATOMIC);
	212	+ if (!vbl_work)
251	213	return -ENOMEM;
252	214
253		- vbl_ev->crtc_id = crtc_id;
254		- vbl_ev->enable = enable;
	215	+ INIT_WORK(&vbl_work->work, vblank_ctrl_worker);
255	216
256		- spin_lock_irqsave(&vbl_ctrl->lock, flags);
257		- list_add_tail(&vbl_ev->node, &vbl_ctrl->event_list);
258		- spin_unlock_irqrestore(&vbl_ctrl->lock, flags);
	217	+ vbl_work->crtc_id = crtc_id;
	218	+ vbl_work->enable = enable;
	219	+ vbl_work->priv = priv;
259	220
260		- kthread_queue_work(&priv->disp_thread[crtc_id].worker,
261		- &vbl_ctrl->work);
	221	+ queue_work(priv->wq, &vbl_work->work);
262	222
263	223	return 0;
264	224	}
..	..	@@ -270,40 +230,36 @@
270	230	struct msm_drm_private *priv = ddev->dev_private;
271	231	struct msm_kms *kms = priv->kms;
272	232	struct msm_mdss *mdss = priv->mdss;
273		- struct msm_vblank_ctrl *vbl_ctrl = &priv->vblank_ctrl;
274		- struct vblank_event vbl_ev, tmp;
275	233	int i;
	234	+
	235	+ /*
	236	+ * Shutdown the hw if we're far enough along where things might be on.
	237	+ * If we run this too early, we'll end up panicking in any variety of
	238	+ * places. Since we don't register the drm device until late in
	239	+ * msm_drm_init, drm_dev->registered is used as an indicator that the
	240	+ * shutdown will be successful.
	241	+ */
	242	+ if (ddev->registered) {
	243	+ drm_dev_unregister(ddev);
	244	+ drm_atomic_helper_shutdown(ddev);
	245	+ }
276	246
277	247	/* We must cancel and cleanup any pending vblank enable/disable
278	248	* work before drm_irq_uninstall() to avoid work re-enabling an
279	249	* irq after uninstall has disabled it.
280	250	*/
281		- kthread_flush_work(&vbl_ctrl->work);
282		- list_for_each_entry_safe(vbl_ev, tmp, &vbl_ctrl->event_list, node) {
283		- list_del(&vbl_ev->node);
284		- kfree(vbl_ev);
285		- }
286	251
287		- /* clean up display commit/event worker threads */
	252	+ flush_workqueue(priv->wq);
	253	+
	254	+ /* clean up event worker threads */
288	255	for (i = 0; i < priv->num_crtcs; i++) {
289		- if (priv->disp_thread[i].thread) {
290		- kthread_flush_worker(&priv->disp_thread[i].worker);
291		- kthread_stop(priv->disp_thread[i].thread);
292		- priv->disp_thread[i].thread = NULL;
293		- }
294		-
295		- if (priv->event_thread[i].thread) {
296		- kthread_flush_worker(&priv->event_thread[i].worker);
297		- kthread_stop(priv->event_thread[i].thread);
298		- priv->event_thread[i].thread = NULL;
299		- }
	256	+ if (priv->event_thread[i].worker)
	257	+ kthread_destroy_worker(priv->event_thread[i].worker);
300	258	}
301	259
302	260	msm_gem_shrinker_cleanup(ddev);
303	261
304	262	drm_kms_helper_poll_fini(ddev);
305		-
306		- drm_dev_unregister(ddev);
307	263
308	264	msm_perf_debugfs_cleanup(priv);
309	265	msm_rd_debugfs_cleanup(priv);
..	..	@@ -312,14 +268,12 @@
312	268	if (fbdev && priv->fbdev)
313	269	msm_fbdev_free(ddev);
314	270	#endif
	271	+
315	272	drm_mode_config_cleanup(ddev);
316	273
317	274	pm_runtime_get_sync(dev);
318	275	drm_irq_uninstall(ddev);
319	276	pm_runtime_put_sync(dev);
320		-
321		- flush_workqueue(priv->wq);
322		- destroy_workqueue(priv->wq);
323	277
324	278	if (kms && kms->funcs)
325	279	kms->funcs->destroy(kms);
..	..	@@ -337,8 +291,9 @@
337	291	mdss->funcs->destroy(ddev);
338	292
339	293	ddev->dev_private = NULL;
340		- drm_dev_unref(ddev);
	294	+ drm_dev_put(ddev);
341	295
	296	+ destroy_workqueue(priv->wq);
342	297	kfree(priv);
343	298
344	299	return 0;
..	..	@@ -356,6 +311,14 @@
356	311	}
357	312
358	313	#include <linux/of_address.h>
	314	+
	315	+bool msm_use_mmu(struct drm_device *dev)
	316	+{
	317	+ struct msm_drm_private *priv = dev->dev_private;
	318	+
	319	+ /* a2xx comes with its own MMU */
	320	+ return priv->is_a2xx \|\| iommu_present(&platform_bus_type);
	321	+}
359	322
360	323	static int msm_init_vram(struct drm_device *dev)
361	324	{
..	..	@@ -395,7 +358,7 @@
395	358	* Grab the entire CMA chunk carved out in early startup in
396	359	* mach-msm:
397	360	*/
398		- } else if (!iommu_present(&platform_bus_type)) {
	361	+ } else if (!msm_use_mmu(dev)) {
399	362	DRM_INFO("using %s VRAM carveout\n", vram);
400	363	size = memparse(vram, NULL);
401	364	}
..	..	@@ -418,12 +381,12 @@
418	381	p = dma_alloc_attrs(dev->dev, size,
419	382	&priv->vram.paddr, GFP_KERNEL, attrs);
420	383	if (!p) {
421		- dev_err(dev->dev, "failed to allocate VRAM\n");
	384	+ DRM_DEV_ERROR(dev->dev, "failed to allocate VRAM\n");
422	385	priv->vram.paddr = 0;
423	386	return -ENOMEM;
424	387	}
425	388
426		- dev_info(dev->dev, "VRAM: %08x->%08x\n",
	389	+ DRM_DEV_INFO(dev->dev, "VRAM: %08x->%08x\n",
427	390	(uint32_t)priv->vram.paddr,
428	391	(uint32_t)(priv->vram.paddr + size));
429	392	}
..	..	@@ -439,11 +402,10 @@
439	402	struct msm_kms *kms;
440	403	struct msm_mdss *mdss;
441	404	int ret, i;
442		- struct sched_param param;
443	405
444	406	ddev = drm_dev_alloc(drv, dev);
445	407	if (IS_ERR(ddev)) {
446		- dev_err(dev, "failed to allocate drm_device\n");
	408	+ DRM_DEV_ERROR(dev, "failed to allocate drm_device\n");
447	409	return PTR_ERR(ddev);
448	410	}
449	411
..	..	@@ -452,7 +414,7 @@
452	414	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
453	415	if (!priv) {
454	416	ret = -ENOMEM;
455		- goto err_unref_drm_dev;
	417	+ goto err_put_drm_dev;
456	418	}
457	419
458	420	ddev->dev_private = priv;
..	..	@@ -476,10 +438,10 @@
476	438
477	439	priv->wq = alloc_ordered_workqueue("msm", 0);
478	440
	441	+ INIT_WORK(&priv->free_work, msm_gem_free_work);
	442	+ init_llist_head(&priv->free_list);
	443	+
479	444	INIT_LIST_HEAD(&priv->inactive_list);
480		- INIT_LIST_HEAD(&priv->vblank_ctrl.event_list);
481		- kthread_init_work(&priv->vblank_ctrl.work, vblank_ctrl_worker);
482		- spin_lock_init(&priv->vblank_ctrl.lock);
483	445
484	446	drm_mode_config_init(ddev);
485	447
..	..	@@ -492,15 +454,7 @@
492	454	if (ret)
493	455	goto err_destroy_mdss;
494	456
495		- if (!dev->dma_parms) {
496		- dev->dma_parms = devm_kzalloc(dev, sizeof(*dev->dma_parms),
497		- GFP_KERNEL);
498		- if (!dev->dma_parms) {
499		- ret = -ENOMEM;
500		- goto err_msm_uninit;
501		- }
502		- }
503		- dma_set_max_seg_size(dev, DMA_BIT_MASK(32));
	457	+ dma_set_max_seg_size(dev, UINT_MAX);
504	458
505	459	msm_gem_shrinker_init(ddev);
506	460
..	..	@@ -517,19 +471,16 @@
517	471	priv->kms = kms;
518	472	break;
519	473	default:
520		- kms = ERR_PTR(-ENODEV);
	474	+ /* valid only for the dummy headless case, where of_node=NULL */
	475	+ WARN_ON(dev->of_node);
	476	+ kms = NULL;
521	477	break;
522	478	}
523	479
524	480	if (IS_ERR(kms)) {
525		- /*
526		- * NOTE: once we have GPU support, having no kms should not
527		- * be considered fatal.. ideally we would still support gpu
528		- * and (for example) use dmabuf/prime to share buffers with
529		- * imx drm driver on iMX5
530		- */
531		- dev_err(dev, "failed to load kms\n");
	481	+ DRM_DEV_ERROR(dev, "failed to load kms\n");
532	482	ret = PTR_ERR(kms);
	483	+ priv->kms = NULL;
533	484	goto err_msm_uninit;
534	485	}
535	486
..	..	@@ -537,9 +488,10 @@
537	488	ddev->mode_config.normalize_zpos = true;
538	489
539	490	if (kms) {
	491	+ kms->dev = ddev;
540	492	ret = kms->funcs->hw_init(kms);
541	493	if (ret) {
542		- dev_err(dev, "kms hw init failed: %d\n", ret);
	494	+ DRM_DEV_ERROR(dev, "kms hw init failed: %d\n", ret);
543	495	goto err_msm_uninit;
544	496	}
545	497	}
..	..	@@ -547,82 +499,24 @@
547	499	ddev->mode_config.funcs = &mode_config_funcs;
548	500	ddev->mode_config.helper_private = &mode_config_helper_funcs;
549	501
550		- /**
551		- * this priority was found during empiric testing to have appropriate
552		- * realtime scheduling to process display updates and interact with
553		- * other real time and normal priority task
554		- */
555		- param.sched_priority = 16;
556	502	for (i = 0; i < priv->num_crtcs; i++) {
557		-
558		- /* initialize display thread */
559		- priv->disp_thread[i].crtc_id = priv->crtcs[i]->base.id;
560		- kthread_init_worker(&priv->disp_thread[i].worker);
561		- priv->disp_thread[i].dev = ddev;
562		- priv->disp_thread[i].thread =
563		- kthread_run(kthread_worker_fn,
564		- &priv->disp_thread[i].worker,
565		- "crtc_commit:%d", priv->disp_thread[i].crtc_id);
566		- ret = sched_setscheduler(priv->disp_thread[i].thread,
567		- SCHED_FIFO, &param);
568		- if (ret)
569		- pr_warn("display thread priority update failed: %d\n",
570		- ret);
571		-
572		- if (IS_ERR(priv->disp_thread[i].thread)) {
573		- dev_err(dev, "failed to create crtc_commit kthread\n");
574		- priv->disp_thread[i].thread = NULL;
575		- }
576		-
577	503	/* initialize event thread */
578	504	priv->event_thread[i].crtc_id = priv->crtcs[i]->base.id;
579		- kthread_init_worker(&priv->event_thread[i].worker);
580	505	priv->event_thread[i].dev = ddev;
581		- priv->event_thread[i].thread =
582		- kthread_run(kthread_worker_fn,
583		- &priv->event_thread[i].worker,
584		- "crtc_event:%d", priv->event_thread[i].crtc_id);
585		- /**
586		- * event thread should also run at same priority as disp_thread
587		- * because it is handling frame_done events. A lower priority
588		- * event thread and higher priority disp_thread can causes
589		- * frame_pending counters beyond 2. This can lead to commit
590		- * failure at crtc commit level.
591		- */
592		- ret = sched_setscheduler(priv->event_thread[i].thread,
593		- SCHED_FIFO, &param);
594		- if (ret)
595		- pr_warn("display event thread priority update failed: %d\n",
596		- ret);
597		-
598		- if (IS_ERR(priv->event_thread[i].thread)) {
599		- dev_err(dev, "failed to create crtc_event kthread\n");
600		- priv->event_thread[i].thread = NULL;
601		- }
602		-
603		- if ((!priv->disp_thread[i].thread) \|\|
604		- !priv->event_thread[i].thread) {
605		- /* clean up previously created threads if any */
606		- for ( ; i >= 0; i--) {
607		- if (priv->disp_thread[i].thread) {
608		- kthread_stop(
609		- priv->disp_thread[i].thread);
610		- priv->disp_thread[i].thread = NULL;
611		- }
612		-
613		- if (priv->event_thread[i].thread) {
614		- kthread_stop(
615		- priv->event_thread[i].thread);
616		- priv->event_thread[i].thread = NULL;
617		- }
618		- }
	506	+ priv->event_thread[i].worker = kthread_create_worker(0,
	507	+ "crtc_event:%d", priv->event_thread[i].crtc_id);
	508	+ if (IS_ERR(priv->event_thread[i].worker)) {
	509	+ ret = PTR_ERR(priv->event_thread[i].worker);
	510	+ DRM_DEV_ERROR(dev, "failed to create crtc_event kthread\n");
619	511	goto err_msm_uninit;
620	512	}
	513	+
	514	+ sched_set_fifo(priv->event_thread[i].worker->task);
621	515	}
622	516
623	517	ret = drm_vblank_init(ddev, priv->num_crtcs);
624	518	if (ret < 0) {
625		- dev_err(dev, "failed to initialize vblank\n");
	519	+ DRM_DEV_ERROR(dev, "failed to initialize vblank\n");
626	520	goto err_msm_uninit;
627	521	}
628	522
..	..	@@ -631,7 +525,7 @@
631	525	ret = drm_irq_install(ddev, kms->irq);
632	526	pm_runtime_put_sync(dev);
633	527	if (ret < 0) {
634		- dev_err(dev, "failed to install IRQ handler\n");
	528	+ DRM_DEV_ERROR(dev, "failed to install IRQ handler\n");
635	529	goto err_msm_uninit;
636	530	}
637	531	}
..	..	@@ -643,7 +537,7 @@
643	537	drm_mode_config_reset(ddev);
644	538
645	539	#ifdef CONFIG_DRM_FBDEV_EMULATION
646		- if (fbdev)
	540	+ if (kms && fbdev)
647	541	priv->fbdev = msm_fbdev_init(ddev);
648	542	#endif
649	543
..	..	@@ -663,8 +557,9 @@
663	557	mdss->funcs->destroy(ddev);
664	558	err_free_priv:
665	559	kfree(priv);
666		-err_unref_drm_dev:
667		- drm_dev_unref(ddev);
	560	+err_put_drm_dev:
	561	+ drm_dev_put(ddev);
	562	+ platform_set_drvdata(pdev, NULL);
668	563	return ret;
669	564	}
670	565
..	..	@@ -687,15 +582,21 @@
687	582
688	583	static int context_init(struct drm_device dev, struct drm_file file)
689	584	{
	585	+ static atomic_t ident = ATOMIC_INIT(0);
	586	+ struct msm_drm_private *priv = dev->dev_private;
690	587	struct msm_file_private *ctx;
691	588
692	589	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
693	590	if (!ctx)
694	591	return -ENOMEM;
695	592
	593	+ kref_init(&ctx->ref);
696	594	msm_submitqueue_init(dev, ctx);
697	595
	596	+ ctx->aspace = msm_gpu_create_private_address_space(priv->gpu, current);
698	597	file->driver_priv = ctx;
	598	+
	599	+ ctx->seqno = atomic_inc_return(&ident);
699	600
700	601	return 0;
701	602	}
..	..	@@ -713,7 +614,7 @@
713	614	static void context_close(struct msm_file_private *ctx)
714	615	{
715	616	msm_submitqueue_close(ctx);
716		- kfree(ctx);
	617	+ msm_file_private_put(ctx);
717	618	}
718	619
719	620	static void msm_postclose(struct drm_device dev, struct drm_file file)
..	..	@@ -751,7 +652,11 @@
751	652	struct msm_drm_private *priv = dev->dev_private;
752	653	struct msm_kms *kms = priv->kms;
753	654	BUG_ON(!kms);
754		- return kms->funcs->irq_postinstall(kms);
	655	+
	656	+ if (kms->funcs->irq_postinstall)
	657	+ return kms->funcs->irq_postinstall(kms);
	658	+
	659	+ return 0;
755	660	}
756	661
757	662	static void msm_irq_uninstall(struct drm_device *dev)
..	..	@@ -762,8 +667,10 @@
762	667	kms->funcs->irq_uninstall(kms);
763	668	}
764	669
765		-static int msm_enable_vblank(struct drm_device *dev, unsigned int pipe)
	670	+int msm_crtc_enable_vblank(struct drm_crtc *crtc)
766	671	{
	672	+ struct drm_device *dev = crtc->dev;
	673	+ unsigned int pipe = crtc->index;
767	674	struct msm_drm_private *priv = dev->dev_private;
768	675	struct msm_kms *kms = priv->kms;
769	676	if (!kms)
..	..	@@ -772,8 +679,10 @@
772	679	return vblank_ctrl_queue_work(priv, pipe, true);
773	680	}
774	681
775		-static void msm_disable_vblank(struct drm_device *dev, unsigned int pipe)
	682	+void msm_crtc_disable_vblank(struct drm_crtc *crtc)
776	683	{
	684	+ struct drm_device *dev = crtc->dev;
	685	+ unsigned int pipe = crtc->index;
777	686	struct msm_drm_private *priv = dev->dev_private;
778	687	struct msm_kms *kms = priv->kms;
779	688	if (!kms)
..	..	@@ -818,7 +727,7 @@
818	727	}
819	728
820	729	return msm_gem_new_handle(dev, file, args->size,
821		- args->flags, &args->handle);
	730	+ args->flags, &args->handle, NULL);
822	731	}
823	732
824	733	static inline ktime_t to_ktime(struct drm_msm_timespec timeout)
..	..	@@ -845,7 +754,7 @@
845	754
846	755	ret = msm_gem_cpu_prep(obj, args->op, &timeout);
847	756
848		- drm_gem_object_put_unlocked(obj);
	757	+ drm_gem_object_put(obj);
849	758
850	759	return ret;
851	760	}
..	..	@@ -863,20 +772,26 @@
863	772
864	773	ret = msm_gem_cpu_fini(obj);
865	774
866		- drm_gem_object_put_unlocked(obj);
	775	+ drm_gem_object_put(obj);
867	776
868	777	return ret;
869	778	}
870	779
871	780	static int msm_ioctl_gem_info_iova(struct drm_device *dev,
872		- struct drm_gem_object obj, uint64_t iova)
	781	+ struct drm_file file, struct drm_gem_object obj,
	782	+ uint64_t *iova)
873	783	{
874	784	struct msm_drm_private *priv = dev->dev_private;
	785	+ struct msm_file_private *ctx = file->driver_priv;
875	786
876	787	if (!priv->gpu)
877	788	return -EINVAL;
878	789
879		- return msm_gem_get_iova(obj, priv->gpu->aspace, iova);
	790	+ /*
	791	+ * Don't pin the memory here - just get an address so that userspace can
	792	+ * be productive
	793	+ */
	794	+ return msm_gem_get_iova(obj, ctx->aspace, iova);
880	795	}
881	796
882	797	static int msm_ioctl_gem_info(struct drm_device dev, void data,
..	..	@@ -884,26 +799,74 @@
884	799	{
885	800	struct drm_msm_gem_info *args = data;
886	801	struct drm_gem_object *obj;
887		- int ret = 0;
	802	+ struct msm_gem_object *msm_obj;
	803	+ int i, ret = 0;
888	804
889		- if (args->flags & ~MSM_INFO_FLAGS)
	805	+ if (args->pad)
890	806	return -EINVAL;
	807	+
	808	+ switch (args->info) {
	809	+ case MSM_INFO_GET_OFFSET:
	810	+ case MSM_INFO_GET_IOVA:
	811	+ /* value returned as immediate, not pointer, so len==0: */
	812	+ if (args->len)
	813	+ return -EINVAL;
	814	+ break;
	815	+ case MSM_INFO_SET_NAME:
	816	+ case MSM_INFO_GET_NAME:
	817	+ break;
	818	+ default:
	819	+ return -EINVAL;
	820	+ }
891	821
892	822	obj = drm_gem_object_lookup(file, args->handle);
893	823	if (!obj)
894	824	return -ENOENT;
895	825
896		- if (args->flags & MSM_INFO_IOVA) {
897		- uint64_t iova;
	826	+ msm_obj = to_msm_bo(obj);
898	827
899		- ret = msm_ioctl_gem_info_iova(dev, obj, &iova);
900		- if (!ret)
901		- args->offset = iova;
902		- } else {
903		- args->offset = msm_gem_mmap_offset(obj);
	828	+ switch (args->info) {
	829	+ case MSM_INFO_GET_OFFSET:
	830	+ args->value = msm_gem_mmap_offset(obj);
	831	+ break;
	832	+ case MSM_INFO_GET_IOVA:
	833	+ ret = msm_ioctl_gem_info_iova(dev, file, obj, &args->value);
	834	+ break;
	835	+ case MSM_INFO_SET_NAME:
	836	+ /* length check should leave room for terminating null: */
	837	+ if (args->len >= sizeof(msm_obj->name)) {
	838	+ ret = -EINVAL;
	839	+ break;
	840	+ }
	841	+ if (copy_from_user(msm_obj->name, u64_to_user_ptr(args->value),
	842	+ args->len)) {
	843	+ msm_obj->name[0] = '\0';
	844	+ ret = -EFAULT;
	845	+ break;
	846	+ }
	847	+ msm_obj->name[args->len] = '\0';
	848	+ for (i = 0; i < args->len; i++) {
	849	+ if (!isprint(msm_obj->name[i])) {
	850	+ msm_obj->name[i] = '\0';
	851	+ break;
	852	+ }
	853	+ }
	854	+ break;
	855	+ case MSM_INFO_GET_NAME:
	856	+ if (args->value && (args->len < strlen(msm_obj->name))) {
	857	+ ret = -EINVAL;
	858	+ break;
	859	+ }
	860	+ args->len = strlen(msm_obj->name);
	861	+ if (args->value) {
	862	+ if (copy_to_user(u64_to_user_ptr(args->value),
	863	+ msm_obj->name, args->len))
	864	+ ret = -EFAULT;
	865	+ }
	866	+ break;
904	867	}
905	868
906		- drm_gem_object_put_unlocked(obj);
	869	+ drm_gem_object_put(obj);
907	870
908	871	return ret;
909	872	}
..	..	@@ -968,7 +931,7 @@
968	931	ret = 0;
969	932	}
970	933
971		- drm_gem_object_put(obj);
	934	+ drm_gem_object_put_locked(obj);
972	935
973	936	unlock:
974	937	mutex_unlock(&dev->struct_mutex);
..	..	@@ -988,6 +951,11 @@
988	951	args->flags, &args->id);
989	952	}
990	953
	954	+static int msm_ioctl_submitqueue_query(struct drm_device dev, void data,
	955	+ struct drm_file *file)
	956	+{
	957	+ return msm_submitqueue_query(dev, file->driver_priv, data);
	958	+}
991	959
992	960	static int msm_ioctl_submitqueue_close(struct drm_device dev, void data,
993	961	struct drm_file *file)
..	..	@@ -998,16 +966,17 @@
998	966	}
999	967
1000	968	static const struct drm_ioctl_desc msm_ioctls[] = {
1001		- DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_AUTH\|DRM_RENDER_ALLOW),
1002		- DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_AUTH\|DRM_RENDER_ALLOW),
1003		- DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_AUTH\|DRM_RENDER_ALLOW),
1004		- DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_AUTH\|DRM_RENDER_ALLOW),
1005		- DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_AUTH\|DRM_RENDER_ALLOW),
1006		- DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_AUTH\|DRM_RENDER_ALLOW),
1007		- DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_AUTH\|DRM_RENDER_ALLOW),
1008		- DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_AUTH\|DRM_RENDER_ALLOW),
1009		- DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_NEW, msm_ioctl_submitqueue_new, DRM_AUTH\|DRM_RENDER_ALLOW),
1010		- DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLOSE, msm_ioctl_submitqueue_close, DRM_AUTH\|DRM_RENDER_ALLOW),
	969	+ DRM_IOCTL_DEF_DRV(MSM_GET_PARAM, msm_ioctl_get_param, DRM_RENDER_ALLOW),
	970	+ DRM_IOCTL_DEF_DRV(MSM_GEM_NEW, msm_ioctl_gem_new, DRM_RENDER_ALLOW),
	971	+ DRM_IOCTL_DEF_DRV(MSM_GEM_INFO, msm_ioctl_gem_info, DRM_RENDER_ALLOW),
	972	+ DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP, msm_ioctl_gem_cpu_prep, DRM_RENDER_ALLOW),
	973	+ DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI, msm_ioctl_gem_cpu_fini, DRM_RENDER_ALLOW),
	974	+ DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT, msm_ioctl_gem_submit, DRM_RENDER_ALLOW),
	975	+ DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE, msm_ioctl_wait_fence, DRM_RENDER_ALLOW),
	976	+ DRM_IOCTL_DEF_DRV(MSM_GEM_MADVISE, msm_ioctl_gem_madvise, DRM_RENDER_ALLOW),
	977	+ DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_NEW, msm_ioctl_submitqueue_new, DRM_RENDER_ALLOW),
	978	+ DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_CLOSE, msm_ioctl_submitqueue_close, DRM_RENDER_ALLOW),
	979	+ DRM_IOCTL_DEF_DRV(MSM_SUBMITQUEUE_QUERY, msm_ioctl_submitqueue_query, DRM_RENDER_ALLOW),
1011	980	};
1012	981
1013	982	static const struct vm_operations_struct vm_ops = {
..	..	@@ -1029,12 +998,11 @@
1029	998	};
1030	999
1031	1000	static struct drm_driver msm_driver = {
1032		- .driver_features = DRIVER_HAVE_IRQ \|
1033		- DRIVER_GEM \|
1034		- DRIVER_PRIME \|
	1001	+ .driver_features = DRIVER_GEM \|
1035	1002	DRIVER_RENDER \|
1036	1003	DRIVER_ATOMIC \|
1037		- DRIVER_MODESET,
	1004	+ DRIVER_MODESET \|
	1005	+ DRIVER_SYNCOBJ,
1038	1006	.open = msm_open,
1039	1007	.postclose = msm_postclose,
1040	1008	.lastclose = drm_fb_helper_lastclose,
..	..	@@ -1042,17 +1010,12 @@
1042	1010	.irq_preinstall = msm_irq_preinstall,
1043	1011	.irq_postinstall = msm_irq_postinstall,
1044	1012	.irq_uninstall = msm_irq_uninstall,
1045		- .enable_vblank = msm_enable_vblank,
1046		- .disable_vblank = msm_disable_vblank,
1047		- .gem_free_object = msm_gem_free_object,
	1013	+ .gem_free_object_unlocked = msm_gem_free_object,
1048	1014	.gem_vm_ops = &vm_ops,
1049	1015	.dumb_create = msm_gem_dumb_create,
1050	1016	.dumb_map_offset = msm_gem_dumb_map_offset,
1051	1017	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1052	1018	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1053		- .gem_prime_export = drm_gem_prime_export,
1054		- .gem_prime_import = drm_gem_prime_import,
1055		- .gem_prime_res_obj = msm_gem_prime_res_obj,
1056	1019	.gem_prime_pin = msm_gem_prime_pin,
1057	1020	.gem_prime_unpin = msm_gem_prime_unpin,
1058	1021	.gem_prime_get_sg_table = msm_gem_prime_get_sg_table,
..	..	@@ -1074,47 +1037,7 @@
1074	1037	.patchlevel = MSM_VERSION_PATCHLEVEL,
1075	1038	};
1076	1039
1077		-#ifdef CONFIG_PM_SLEEP
1078		-static int msm_pm_suspend(struct device *dev)
1079		-{
1080		- struct drm_device *ddev = dev_get_drvdata(dev);
1081		- struct msm_drm_private *priv = ddev->dev_private;
1082		- struct msm_kms *kms = priv->kms;
1083		-
1084		- /* TODO: Use atomic helper suspend/resume */
1085		- if (kms && kms->funcs && kms->funcs->pm_suspend)
1086		- return kms->funcs->pm_suspend(dev);
1087		-
1088		- drm_kms_helper_poll_disable(ddev);
1089		-
1090		- priv->pm_state = drm_atomic_helper_suspend(ddev);
1091		- if (IS_ERR(priv->pm_state)) {
1092		- drm_kms_helper_poll_enable(ddev);
1093		- return PTR_ERR(priv->pm_state);
1094		- }
1095		-
1096		- return 0;
1097		-}
1098		-
1099		-static int msm_pm_resume(struct device *dev)
1100		-{
1101		- struct drm_device *ddev = dev_get_drvdata(dev);
1102		- struct msm_drm_private *priv = ddev->dev_private;
1103		- struct msm_kms *kms = priv->kms;
1104		-
1105		- /* TODO: Use atomic helper suspend/resume */
1106		- if (kms && kms->funcs && kms->funcs->pm_resume)
1107		- return kms->funcs->pm_resume(dev);
1108		-
1109		- drm_atomic_helper_resume(ddev, priv->pm_state);
1110		- drm_kms_helper_poll_enable(ddev);
1111		-
1112		- return 0;
1113		-}
1114		-#endif
1115		-
1116		-#ifdef CONFIG_PM
1117		-static int msm_runtime_suspend(struct device *dev)
	1040	+static int __maybe_unused msm_runtime_suspend(struct device *dev)
1118	1041	{
1119	1042	struct drm_device *ddev = dev_get_drvdata(dev);
1120	1043	struct msm_drm_private *priv = ddev->dev_private;
..	..	@@ -1128,7 +1051,7 @@
1128	1051	return 0;
1129	1052	}
1130	1053
1131		-static int msm_runtime_resume(struct device *dev)
	1054	+static int __maybe_unused msm_runtime_resume(struct device *dev)
1132	1055	{
1133	1056	struct drm_device *ddev = dev_get_drvdata(dev);
1134	1057	struct msm_drm_private *priv = ddev->dev_private;
..	..	@@ -1141,11 +1064,51 @@
1141	1064
1142	1065	return 0;
1143	1066	}
1144		-#endif
	1067	+
	1068	+static int __maybe_unused msm_pm_suspend(struct device *dev)
	1069	+{
	1070	+
	1071	+ if (pm_runtime_suspended(dev))
	1072	+ return 0;
	1073	+
	1074	+ return msm_runtime_suspend(dev);
	1075	+}
	1076	+
	1077	+static int __maybe_unused msm_pm_resume(struct device *dev)
	1078	+{
	1079	+ if (pm_runtime_suspended(dev))
	1080	+ return 0;
	1081	+
	1082	+ return msm_runtime_resume(dev);
	1083	+}
	1084	+
	1085	+static int __maybe_unused msm_pm_prepare(struct device *dev)
	1086	+{
	1087	+ struct drm_device *ddev = dev_get_drvdata(dev);
	1088	+ struct msm_drm_private *priv = ddev ? ddev->dev_private : NULL;
	1089	+
	1090	+ if (!priv \|\| !priv->kms)
	1091	+ return 0;
	1092	+
	1093	+ return drm_mode_config_helper_suspend(ddev);
	1094	+}
	1095	+
	1096	+static void __maybe_unused msm_pm_complete(struct device *dev)
	1097	+{
	1098	+ struct drm_device *ddev = dev_get_drvdata(dev);
	1099	+ struct msm_drm_private *priv = ddev ? ddev->dev_private : NULL;
	1100	+
	1101	+ if (!priv \|\| !priv->kms)
	1102	+ return;
	1103	+
	1104	+ drm_mode_config_helper_resume(ddev);
	1105	+}
1145	1106
1146	1107	static const struct dev_pm_ops msm_pm_ops = {
1147	1108	SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
1148	1109	SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
	1110	+ .prepare = msm_pm_prepare,
	1111	+ .complete = msm_pm_complete,
1149	1112	};
1150	1113
1151	1114	/*
..	..	@@ -1194,7 +1157,7 @@
1194	1157
1195	1158	ret = of_graph_parse_endpoint(ep_node, &ep);
1196	1159	if (ret) {
1197		- dev_err(mdp_dev, "unable to parse port endpoint\n");
	1160	+ DRM_DEV_ERROR(mdp_dev, "unable to parse port endpoint\n");
1198	1161	of_node_put(ep_node);
1199	1162	return ret;
1200	1163	}
..	..	@@ -1216,8 +1179,10 @@
1216	1179	if (!intf)
1217	1180	continue;
1218	1181
1219		- drm_of_component_match_add(master_dev, matchptr, compare_of,
1220		- intf);
	1182	+ if (of_device_is_available(intf))
	1183	+ drm_of_component_match_add(master_dev, matchptr,
	1184	+ compare_of, intf);
	1185	+
1221	1186	of_node_put(intf);
1222	1187	}
1223	1188
..	..	@@ -1242,16 +1207,17 @@
1242	1207	* the interfaces to our components list.
1243	1208	*/
1244	1209	if (of_device_is_compatible(dev->of_node, "qcom,mdss") \|\|
1245		- of_device_is_compatible(dev->of_node, "qcom,sdm845-mdss")) {
	1210	+ of_device_is_compatible(dev->of_node, "qcom,sdm845-mdss") \|\|
	1211	+ of_device_is_compatible(dev->of_node, "qcom,sc7180-mdss")) {
1246	1212	ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
1247	1213	if (ret) {
1248		- dev_err(dev, "failed to populate children devices\n");
	1214	+ DRM_DEV_ERROR(dev, "failed to populate children devices\n");
1249	1215	return ret;
1250	1216	}
1251	1217
1252	1218	mdp_dev = device_find_child(dev, NULL, compare_name_mdp);
1253	1219	if (!mdp_dev) {
1254		- dev_err(dev, "failed to find MDSS MDP node\n");
	1220	+ DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
1255	1221	of_platform_depopulate(dev);
1256	1222	return -ENODEV;
1257	1223	}
..	..	@@ -1281,6 +1247,7 @@
1281	1247	static const struct of_device_id msm_gpu_match[] = {
1282	1248	{ .compatible = "qcom,adreno" },
1283	1249	{ .compatible = "qcom,adreno-3xx" },
	1250	+ { .compatible = "amd,imageon" },
1284	1251	{ .compatible = "qcom,kgsl-3d0" },
1285	1252	{ },
1286	1253	};
..	..	@@ -1326,9 +1293,11 @@
1326	1293	struct component_match *match = NULL;
1327	1294	int ret;
1328	1295
1329		- ret = add_display_components(&pdev->dev, &match);
1330		- if (ret)
1331		- return ret;
	1296	+ if (get_mdp_ver(pdev)) {
	1297	+ ret = add_display_components(&pdev->dev, &match);
	1298	+ if (ret)
	1299	+ return ret;
	1300	+ }
1332	1301
1333	1302	ret = add_gpu_components(&pdev->dev, &match);
1334	1303	if (ret)
..	..	@@ -1375,6 +1344,7 @@
1375	1344	{ .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
1376	1345	{ .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
1377	1346	{ .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
	1347	+ { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
1378	1348	{}
1379	1349	};
1380	1350	MODULE_DEVICE_TABLE(of, dt_match);
..	..	@@ -1401,6 +1371,7 @@
1401	1371	msm_dsi_register();
1402	1372	msm_edp_register();
1403	1373	msm_hdmi_register();
	1374	+ msm_dp_register();
1404	1375	adreno_register();
1405	1376	return platform_driver_register(&msm_platform_driver);
1406	1377	}
..	..	@@ -1409,6 +1380,7 @@
1409	1380	{
1410	1381	DBG("fini");
1411	1382	platform_driver_unregister(&msm_platform_driver);
	1383	+ msm_dp_unregister();
1412	1384	msm_hdmi_unregister();
1413	1385	adreno_unregister();
1414	1386	msm_edp_unregister();