forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h
....@@ -1,13 +1,5 @@
1
+/* SPDX-License-Identifier: GPL-2.0-only */
12 /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
2
- *
3
- * This program is free software; you can redistribute it and/or modify
4
- * it under the terms of the GNU General Public License version 2 and
5
- * only version 2 as published by the Free Software Foundation.
6
- *
7
- * This program is distributed in the hope that it will be useful,
8
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
9
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10
- * GNU General Public License for more details.
113 */
124
135 #ifndef _DPU_CORE_PERF_H_
....@@ -19,7 +11,6 @@
1911 #include <drm/drm_crtc.h>
2012
2113 #include "dpu_hw_catalog.h"
22
-#include "dpu_power_handle.h"
2314
2415 #define DPU_PERF_DEFAULT_MAX_CORE_CLK_RATE 412500000
2516
....@@ -30,8 +21,8 @@
3021 * @core_clk_rate: core clock rate request
3122 */
3223 struct dpu_core_perf_params {
33
- u64 max_per_pipe_ib[DPU_POWER_HANDLE_DBUS_ID_MAX];
34
- u64 bw_ctl[DPU_POWER_HANDLE_DBUS_ID_MAX];
24
+ u64 max_per_pipe_ib;
25
+ u64 bw_ctl;
3526 u64 core_clk_rate;
3627 };
3728
....@@ -52,7 +43,6 @@
5243 * @dev: Pointer to drm device
5344 * @debugfs_root: top level debug folder
5445 * @catalog: Pointer to catalog configuration
55
- * @phandle: Pointer to power handler
5646 * @core_clk: Pointer to core clock structure
5747 * @core_clk_rate: current core clock rate
5848 * @max_core_clk_rate: maximum allowable core clock rate
....@@ -66,7 +56,6 @@
6656 struct drm_device *dev;
6757 struct dentry *debugfs_root;
6858 struct dpu_mdss_cfg *catalog;
69
- struct dpu_power_handle *phandle;
7059 struct dss_clk *core_clk;
7160 u64 core_clk_rate;
7261 u64 max_core_clk_rate;
....@@ -113,21 +102,20 @@
113102 * @perf: Pointer to core performance context
114103 * @dev: Pointer to drm device
115104 * @catalog: Pointer to catalog
116
- * @phandle: Pointer to power handle
117105 * @core_clk: pointer to core clock
118106 */
119107 int dpu_core_perf_init(struct dpu_core_perf *perf,
120108 struct drm_device *dev,
121109 struct dpu_mdss_cfg *catalog,
122
- struct dpu_power_handle *phandle,
123110 struct dss_clk *core_clk);
111
+
112
+struct dpu_kms;
124113
125114 /**
126115 * dpu_core_perf_debugfs_init - initialize debugfs for core performance context
127
- * @perf: Pointer to core performance context
116
+ * @dpu_kms: Pointer to the dpu_kms struct
128117 * @debugfs_parent: Pointer to parent debugfs
129118 */
130
-int dpu_core_perf_debugfs_init(struct dpu_core_perf *perf,
131
- struct dentry *parent);
119
+int dpu_core_perf_debugfs_init(struct dpu_kms *dpu_kms, struct dentry *parent);
132120
133121 #endif /* _DPU_CORE_PERF_H_ */