.. | .. |
---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
---|
1 | 2 | /* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. |
---|
2 | | - * |
---|
3 | | - * This program is free software; you can redistribute it and/or modify |
---|
4 | | - * it under the terms of the GNU General Public License version 2 and |
---|
5 | | - * only version 2 as published by the Free Software Foundation. |
---|
6 | | - * |
---|
7 | | - * This program is distributed in the hope that it will be useful, |
---|
8 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
---|
9 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
---|
10 | | - * GNU General Public License for more details. |
---|
11 | | - * |
---|
12 | 3 | */ |
---|
13 | | - |
---|
14 | 4 | |
---|
15 | 5 | #include <linux/types.h> |
---|
16 | 6 | #include <linux/debugfs.h> |
---|
| 7 | + |
---|
| 8 | +#include <drm/drm_debugfs.h> |
---|
| 9 | +#include <drm/drm_file.h> |
---|
17 | 10 | #include <drm/drm_print.h> |
---|
18 | 11 | |
---|
19 | 12 | #include "a5xx_gpu.h" |
---|
20 | 13 | |
---|
21 | | -static int pfp_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
| 14 | +static void pfp_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
22 | 15 | { |
---|
23 | 16 | int i; |
---|
24 | 17 | |
---|
.. | .. |
---|
29 | 22 | drm_printf(p, " %02x: %08x\n", i, |
---|
30 | 23 | gpu_read(gpu, REG_A5XX_CP_PFP_STAT_DATA)); |
---|
31 | 24 | } |
---|
32 | | - |
---|
33 | | - return 0; |
---|
34 | 25 | } |
---|
35 | 26 | |
---|
36 | | -static int me_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
| 27 | +static void me_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
37 | 28 | { |
---|
38 | 29 | int i; |
---|
39 | 30 | |
---|
.. | .. |
---|
44 | 35 | drm_printf(p, " %02x: %08x\n", i, |
---|
45 | 36 | gpu_read(gpu, REG_A5XX_CP_ME_STAT_DATA)); |
---|
46 | 37 | } |
---|
47 | | - |
---|
48 | | - return 0; |
---|
49 | 38 | } |
---|
50 | 39 | |
---|
51 | | -static int meq_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
| 40 | +static void meq_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
52 | 41 | { |
---|
53 | 42 | int i; |
---|
54 | 43 | |
---|
.. | .. |
---|
59 | 48 | drm_printf(p, " %02x: %08x\n", i, |
---|
60 | 49 | gpu_read(gpu, REG_A5XX_CP_MEQ_DBG_DATA)); |
---|
61 | 50 | } |
---|
62 | | - |
---|
63 | | - return 0; |
---|
64 | 51 | } |
---|
65 | 52 | |
---|
66 | | -static int roq_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
| 53 | +static void roq_print(struct msm_gpu *gpu, struct drm_printer *p) |
---|
67 | 54 | { |
---|
68 | 55 | int i; |
---|
69 | 56 | |
---|
.. | .. |
---|
78 | 65 | drm_printf(p, " %02x: %08x %08x %08x %08x\n", i, |
---|
79 | 66 | val[0], val[1], val[2], val[3]); |
---|
80 | 67 | } |
---|
81 | | - |
---|
82 | | - return 0; |
---|
83 | 68 | } |
---|
84 | 69 | |
---|
85 | 70 | static int show(struct seq_file *m, void *arg) |
---|
.. | .. |
---|
88 | 73 | struct drm_device *dev = node->minor->dev; |
---|
89 | 74 | struct msm_drm_private *priv = dev->dev_private; |
---|
90 | 75 | struct drm_printer p = drm_seq_file_printer(m); |
---|
91 | | - int (*show)(struct msm_gpu *gpu, struct drm_printer *p) = |
---|
| 76 | + void (*show)(struct msm_gpu *gpu, struct drm_printer *p) = |
---|
92 | 77 | node->info_ent->data; |
---|
93 | 78 | |
---|
94 | | - return show(priv->gpu, &p); |
---|
| 79 | + show(priv->gpu, &p); |
---|
| 80 | + return 0; |
---|
95 | 81 | } |
---|
96 | 82 | |
---|
97 | 83 | #define ENT(n) { .name = #n, .show = show, .data = n ##_print } |
---|
.. | .. |
---|
130 | 116 | adreno_gpu->fw[ADRENO_FW_PFP] = NULL; |
---|
131 | 117 | |
---|
132 | 118 | if (a5xx_gpu->pm4_bo) { |
---|
133 | | - if (a5xx_gpu->pm4_iova) |
---|
134 | | - msm_gem_put_iova(a5xx_gpu->pm4_bo, gpu->aspace); |
---|
135 | | - drm_gem_object_unreference(a5xx_gpu->pm4_bo); |
---|
| 119 | + msm_gem_unpin_iova(a5xx_gpu->pm4_bo, gpu->aspace); |
---|
| 120 | + drm_gem_object_put_locked(a5xx_gpu->pm4_bo); |
---|
136 | 121 | a5xx_gpu->pm4_bo = NULL; |
---|
137 | 122 | } |
---|
138 | 123 | |
---|
139 | 124 | if (a5xx_gpu->pfp_bo) { |
---|
140 | | - if (a5xx_gpu->pfp_iova) |
---|
141 | | - msm_gem_put_iova(a5xx_gpu->pfp_bo, gpu->aspace); |
---|
142 | | - drm_gem_object_unreference(a5xx_gpu->pfp_bo); |
---|
| 125 | + msm_gem_unpin_iova(a5xx_gpu->pfp_bo, gpu->aspace); |
---|
| 126 | + drm_gem_object_put_locked(a5xx_gpu->pfp_bo); |
---|
143 | 127 | a5xx_gpu->pfp_bo = NULL; |
---|
144 | 128 | } |
---|
145 | 129 | |
---|
.. | .. |
---|
157 | 141 | DEFINE_SIMPLE_ATTRIBUTE(reset_fops, NULL, reset_set, "%llx\n"); |
---|
158 | 142 | |
---|
159 | 143 | |
---|
160 | | -int a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) |
---|
| 144 | +void a5xx_debugfs_init(struct msm_gpu *gpu, struct drm_minor *minor) |
---|
161 | 145 | { |
---|
162 | 146 | struct drm_device *dev; |
---|
163 | | - struct dentry *ent; |
---|
164 | | - int ret; |
---|
165 | 147 | |
---|
166 | 148 | if (!minor) |
---|
167 | | - return 0; |
---|
| 149 | + return; |
---|
168 | 150 | |
---|
169 | 151 | dev = minor->dev; |
---|
170 | 152 | |
---|
171 | | - ret = drm_debugfs_create_files(a5xx_debugfs_list, |
---|
172 | | - ARRAY_SIZE(a5xx_debugfs_list), |
---|
173 | | - minor->debugfs_root, minor); |
---|
| 153 | + drm_debugfs_create_files(a5xx_debugfs_list, |
---|
| 154 | + ARRAY_SIZE(a5xx_debugfs_list), |
---|
| 155 | + minor->debugfs_root, minor); |
---|
174 | 156 | |
---|
175 | | - if (ret) { |
---|
176 | | - dev_err(dev->dev, "could not install a5xx_debugfs_list\n"); |
---|
177 | | - return ret; |
---|
178 | | - } |
---|
179 | | - |
---|
180 | | - ent = debugfs_create_file("reset", S_IWUGO, |
---|
181 | | - minor->debugfs_root, |
---|
182 | | - dev, &reset_fops); |
---|
183 | | - if (!ent) |
---|
184 | | - return -ENOMEM; |
---|
185 | | - |
---|
186 | | - return 0; |
---|
| 157 | + debugfs_create_file("reset", S_IWUGO, minor->debugfs_root, dev, |
---|
| 158 | + &reset_fops); |
---|
187 | 159 | } |
---|