forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/drivers/gpu/drm/mga/mga_drv.h
....@@ -31,7 +31,20 @@
3131 #ifndef __MGA_DRV_H__
3232 #define __MGA_DRV_H__
3333
34
+#include <linux/irqreturn.h>
35
+#include <linux/pci.h>
36
+#include <linux/slab.h>
37
+
38
+#include <drm/drm_agpsupport.h>
39
+#include <drm/drm_device.h>
40
+#include <drm/drm_file.h>
41
+#include <drm/drm_ioctl.h>
42
+#include <drm/drm_irq.h>
3443 #include <drm/drm_legacy.h>
44
+#include <drm/drm_print.h>
45
+#include <drm/drm_sarea.h>
46
+#include <drm/drm_vblank.h>
47
+#include <drm/mga_drm.h>
3548
3649 /* General customization:
3750 */
....@@ -188,7 +201,7 @@
188201 extern int mga_enable_vblank(struct drm_device *dev, unsigned int pipe);
189202 extern void mga_disable_vblank(struct drm_device *dev, unsigned int pipe);
190203 extern u32 mga_get_vblank_counter(struct drm_device *dev, unsigned int pipe);
191
-extern int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);
204
+extern void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);
192205 extern int mga_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence);
193206 extern irqreturn_t mga_driver_irq_handler(int irq, void *arg);
194207 extern void mga_driver_irq_preinstall(struct drm_device *dev);
....@@ -199,10 +212,14 @@
199212
200213 #define mga_flush_write_combine() wmb()
201214
202
-#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
203
-#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
204
-#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
205
-#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
215
+#define MGA_READ8(reg) \
216
+ readb(((void __iomem *)dev_priv->mmio->handle) + (reg))
217
+#define MGA_READ(reg) \
218
+ readl(((void __iomem *)dev_priv->mmio->handle) + (reg))
219
+#define MGA_WRITE8(reg, val) \
220
+ writeb(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))
221
+#define MGA_WRITE(reg, val) \
222
+ writel(val, ((void __iomem *)dev_priv->mmio->handle) + (reg))
206223
207224 #define DWGREG0 0x1c00
208225 #define DWGREG0_END 0x1dff