modify sin led gpio

hc

2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e

 kernel/arch/powerpc/sysdev/xive/spapr.c
..
..
@@ -1,10 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later
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 /*
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  * Copyright 2016,2017 IBM Corporation.
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- *
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- * This program is free software; you can redistribute it and/or
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- * modify it under the terms of the GNU General Public License
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- * as published by the Free Software Foundation; either version
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- * 2 of the License, or (at your option) any later version.
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  */
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5
 
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 #define pr_fmt(fmt) "xive: " fmt
..
..
@@ -20,7 +16,9 @@
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 #include <linux/cpumask.h>
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 #include <linux/mm.h>
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 #include <linux/delay.h>
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+#include <linux/libfdt.h>
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20
 
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+#include <asm/machdep.h>
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 #include <asm/prom.h>
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 #include <asm/io.h>
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 #include <asm/smp.h>
..
..
@@ -29,6 +27,8 @@
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 #include <asm/xive.h>
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 #include <asm/xive-regs.h>
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 #include <asm/hvcall.h>
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+#include <asm/svm.h>
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+#include <asm/ultravisor.h>
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32
 
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 #include "xive-internal.h"
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34
 
..
..
@@ -48,7 +48,7 @@
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 {
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 	struct xive_irq_bitmap *xibm;
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50
 
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-	xibm = kzalloc(sizeof(*xibm), GFP_ATOMIC);
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+	xibm = kzalloc(sizeof(*xibm), GFP_KERNEL);
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 	if (!xibm)
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 		return -ENOMEM;
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54
 
..
..
@@ -56,6 +56,10 @@
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 	xibm->base = base;
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 	xibm->count = count;
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 	xibm->bitmap = kzalloc(xibm->count, GFP_KERNEL);
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+	if (!xibm->bitmap) {
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+		kfree(xibm);
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+		return -ENOMEM;
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+	}
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 	list_add(&xibm->list, &xive_irq_bitmaps);
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64
 
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 	pr_info("Using IRQ range [%x-%x]", xibm->base,
..
..
@@ -210,6 +214,38 @@
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 		       lisn, target, prio, rc);
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 		return rc;
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 	}
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+
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+	return 0;
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+}
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+
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+static long plpar_int_get_source_config(unsigned long flags,
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+					unsigned long lisn,
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+					unsigned long *target,
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+					unsigned long *prio,
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+					unsigned long *sw_irq)
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+{
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+	unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
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+	long rc;
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+
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+	pr_devel("H_INT_GET_SOURCE_CONFIG flags=%lx lisn=%lx\n", flags, lisn);
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+
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+	do {
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+		rc = plpar_hcall(H_INT_GET_SOURCE_CONFIG, retbuf, flags, lisn,
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+				 target, prio, sw_irq);
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+	} while (plpar_busy_delay(rc));
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+
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+	if (rc) {
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+		pr_err("H_INT_GET_SOURCE_CONFIG lisn=%ld failed %ld\n",
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+		       lisn, rc);
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+		return rc;
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+	}
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+
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+	*target = retbuf[0];
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+	*prio   = retbuf[1];
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+	*sw_irq = retbuf[2];
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+
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+	pr_devel("H_INT_GET_SOURCE_CONFIG target=%lx prio=%lx sw_irq=%lx\n",
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+		retbuf[0], retbuf[1], retbuf[2]);
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 	return 0;
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 }
..
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@@ -389,6 +425,7 @@
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425
 
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 	data->trig_mmio = ioremap(data->trig_page, 1u << data->esb_shift);
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 	if (!data->trig_mmio) {
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+		iounmap(data->eoi_mmio);
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 		pr_err("Failed to map trigger page for irq 0x%x\n", hw_irq);
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 		return -ENOMEM;
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 	}
..
..
@@ -401,6 +438,24 @@
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438
 
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 	rc = plpar_int_set_source_config(XIVE_SRC_SET_EISN, hw_irq, target,
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 					 prio, sw_irq);
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+
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+	return rc == 0 ? 0 : -ENXIO;
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+}
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+
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+static int xive_spapr_get_irq_config(u32 hw_irq, u32 *target, u8 *prio,
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+				     u32 *sw_irq)
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+{
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+	long rc;
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+	unsigned long h_target;
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+	unsigned long h_prio;
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+	unsigned long h_sw_irq;
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+
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+	rc = plpar_int_get_source_config(0, hw_irq, &h_target, &h_prio,
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+					 &h_sw_irq);
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+
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+	*target = h_target;
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+	*prio = h_prio;
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+	*sw_irq = h_sw_irq;
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 	return rc == 0 ? 0 : -ENXIO;
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 }
..
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@@ -450,6 +505,9 @@
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 		rc = -EIO;
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 	} else {
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 		q->qpage = qpage;
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+		if (is_secure_guest())
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+			uv_share_page(PHYS_PFN(qpage_phys),
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+					1 << xive_alloc_order(order));
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 	}
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 fail:
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 	return rc;
..
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@@ -483,6 +541,8 @@
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 		       hw_cpu, prio);
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542
 
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 	alloc_order = xive_alloc_order(xive_queue_shift);
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+	if (is_secure_guest())
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+		uv_unshare_page(PHYS_PFN(__pa(q->qpage)), 1 << alloc_order);
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 	free_pages((unsigned long)q->qpage, alloc_order);
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 	q->qpage = NULL;
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 }
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@@ -594,9 +654,28 @@
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 	plpar_int_sync(0, hw_irq);
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 }
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656
 
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+static int xive_spapr_debug_show(struct seq_file *m, void *private)
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+{
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+	struct xive_irq_bitmap *xibm;
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+	char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
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+
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+	if (!buf)
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+		return -ENOMEM;
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+
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+	list_for_each_entry(xibm, &xive_irq_bitmaps, list) {
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+		memset(buf, 0, PAGE_SIZE);
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+		bitmap_print_to_pagebuf(true, buf, xibm->bitmap, xibm->count);
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+		seq_printf(m, "bitmap #%d: %s", xibm->count, buf);
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+	}
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+	kfree(buf);
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+
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+	return 0;
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+}
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+
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 static const struct xive_ops xive_spapr_ops = {
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 	.populate_irq_data	= xive_spapr_populate_irq_data,
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 	.configure_irq		= xive_spapr_configure_irq,
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+	.get_irq_config		= xive_spapr_get_irq_config,
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 	.setup_queue		= xive_spapr_setup_queue,
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 	.cleanup_queue		= xive_spapr_cleanup_queue,
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 	.match			= xive_spapr_match,
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@@ -610,6 +689,7 @@
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 #ifdef CONFIG_SMP
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 	.get_ipi		= xive_spapr_get_ipi,
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 	.put_ipi		= xive_spapr_put_ipi,
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+	.debug_show		= xive_spapr_debug_show,
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 #endif /* CONFIG_SMP */
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 	.name			= "spapr",
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 };
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@@ -631,6 +711,7 @@
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 	}
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712
 
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 	reg = of_get_property(rootdn, "ibm,plat-res-int-priorities", &len);
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+	of_node_put(rootdn);
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 	if (!reg) {
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 		pr_err("Failed to read 'ibm,plat-res-int-priorities' property\n");
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 		return false;
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@@ -671,6 +752,55 @@
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 	return true;
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 }
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754
 
755
+static const u8 *get_vec5_feature(unsigned int index)
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+{
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+	unsigned long root, chosen;
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+	int size;
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+	const u8 *vec5;
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+
761
+	root = of_get_flat_dt_root();
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+	chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
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+	if (chosen == -FDT_ERR_NOTFOUND)
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+		return NULL;
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+
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+	vec5 = of_get_flat_dt_prop(chosen, "ibm,architecture-vec-5", &size);
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+	if (!vec5)
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+		return NULL;
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+
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+	if (size <= index)
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+		return NULL;
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+
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+	return vec5 + index;
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+}
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+
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+static bool __init xive_spapr_disabled(void)
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+{
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+	const u8 *vec5_xive;
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+
780
+	vec5_xive = get_vec5_feature(OV5_INDX(OV5_XIVE_SUPPORT));
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+	if (vec5_xive) {
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+		u8 val;
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+
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+		val = *vec5_xive & OV5_FEAT(OV5_XIVE_SUPPORT);
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+		switch (val) {
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+		case OV5_FEAT(OV5_XIVE_EITHER):
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+		case OV5_FEAT(OV5_XIVE_LEGACY):
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+			break;
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+		case OV5_FEAT(OV5_XIVE_EXPLOIT):
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+			/* Hypervisor only supports XIVE */
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+			if (xive_cmdline_disabled)
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+				pr_warn("WARNING: Ignoring cmdline option xive=off\n");
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+			return false;
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+		default:
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+			pr_warn("%s: Unknown xive support option: 0x%x\n",
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+				__func__, val);
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+			break;
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+		}
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+	}
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+
801
+	return xive_cmdline_disabled;
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+}
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+
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 bool __init xive_spapr_init(void)
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 {
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 	struct device_node *np;
..
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@@ -683,7 +813,7 @@
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 	const __be32 *reg;
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814
 	int i;
685
815
 
686
-	if (xive_cmdline_disabled)
816
+	if (xive_spapr_disabled())
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817
 		return false;
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818
 
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 	pr_devel("%s()\n", __func__);
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@@ -738,3 +868,5 @@
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 	pr_info("Using %dkB queues\n", 1 << (xive_queue_shift - 10));
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 	return true;
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 }
871
+
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+machine_arch_initcall(pseries, xive_core_debug_init);