.. | .. |
---|
| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
---|
1 | 2 | /* |
---|
2 | 3 | * Machine check exception handling CPU-side for power7 and power8 |
---|
3 | | - * |
---|
4 | | - * This program is free software; you can redistribute it and/or modify |
---|
5 | | - * it under the terms of the GNU General Public License as published by |
---|
6 | | - * the Free Software Foundation; either version 2 of the License, or |
---|
7 | | - * (at your option) any later version. |
---|
8 | | - * |
---|
9 | | - * This program is distributed in the hope that it will be useful, |
---|
10 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
---|
11 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
---|
12 | | - * GNU General Public License for more details. |
---|
13 | | - * |
---|
14 | | - * You should have received a copy of the GNU General Public License |
---|
15 | | - * along with this program; if not, write to the Free Software |
---|
16 | | - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
---|
17 | 4 | * |
---|
18 | 5 | * Copyright 2013 IBM Corporation |
---|
19 | 6 | * Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com> |
---|
.. | .. |
---|
24 | 11 | |
---|
25 | 12 | #include <linux/types.h> |
---|
26 | 13 | #include <linux/ptrace.h> |
---|
| 14 | +#include <linux/extable.h> |
---|
| 15 | +#include <linux/pgtable.h> |
---|
27 | 16 | #include <asm/mmu.h> |
---|
28 | 17 | #include <asm/mce.h> |
---|
29 | 18 | #include <asm/machdep.h> |
---|
30 | | -#include <asm/pgtable.h> |
---|
31 | 19 | #include <asm/pte-walk.h> |
---|
32 | 20 | #include <asm/sstep.h> |
---|
33 | 21 | #include <asm/exception-64s.h> |
---|
| 22 | +#include <asm/extable.h> |
---|
| 23 | +#include <asm/inst.h> |
---|
34 | 24 | |
---|
35 | 25 | /* |
---|
36 | 26 | * Convert an address related to an mm to a PFN. NOTE: we are in real |
---|
37 | 27 | * mode, we could potentially race with page table updates. |
---|
38 | 28 | */ |
---|
39 | | -static unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr) |
---|
| 29 | +unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr) |
---|
40 | 30 | { |
---|
41 | | - pte_t *ptep; |
---|
| 31 | + pte_t *ptep, pte; |
---|
42 | 32 | unsigned int shift; |
---|
43 | 33 | unsigned long pfn, flags; |
---|
44 | 34 | struct mm_struct *mm; |
---|
.. | .. |
---|
50 | 40 | |
---|
51 | 41 | local_irq_save(flags); |
---|
52 | 42 | ptep = __find_linux_pte(mm->pgd, addr, NULL, &shift); |
---|
| 43 | + if (!ptep) { |
---|
| 44 | + pfn = ULONG_MAX; |
---|
| 45 | + goto out; |
---|
| 46 | + } |
---|
| 47 | + pte = READ_ONCE(*ptep); |
---|
53 | 48 | |
---|
54 | | - if (!ptep || pte_special(*ptep)) { |
---|
| 49 | + if (!pte_present(pte) || pte_special(pte)) { |
---|
55 | 50 | pfn = ULONG_MAX; |
---|
56 | 51 | goto out; |
---|
57 | 52 | } |
---|
58 | 53 | |
---|
59 | 54 | if (shift <= PAGE_SHIFT) |
---|
60 | | - pfn = pte_pfn(*ptep); |
---|
| 55 | + pfn = pte_pfn(pte); |
---|
61 | 56 | else { |
---|
62 | 57 | unsigned long rpnmask = (1ul << shift) - PAGE_SIZE; |
---|
63 | | - pfn = pte_pfn(__pte(pte_val(*ptep) | (addr & rpnmask))); |
---|
| 58 | + pfn = pte_pfn(__pte(pte_val(pte) | (addr & rpnmask))); |
---|
64 | 59 | } |
---|
65 | | - |
---|
66 | 60 | out: |
---|
67 | 61 | local_irq_restore(flags); |
---|
68 | 62 | return pfn; |
---|
.. | .. |
---|
70 | 64 | |
---|
71 | 65 | /* flush SLBs and reload */ |
---|
72 | 66 | #ifdef CONFIG_PPC_BOOK3S_64 |
---|
73 | | -static void flush_and_reload_slb(void) |
---|
| 67 | +void flush_and_reload_slb(void) |
---|
74 | 68 | { |
---|
75 | 69 | /* Invalidate all SLBs */ |
---|
76 | 70 | slb_flush_all_realmode(); |
---|
.. | .. |
---|
105 | 99 | return; |
---|
106 | 100 | } |
---|
107 | 101 | #endif |
---|
108 | | - /* PPC_INVALIDATE_ERAT can only be used on ISA v3 and newer */ |
---|
109 | | - asm volatile(PPC_INVALIDATE_ERAT : : :"memory"); |
---|
| 102 | + asm volatile(PPC_ISA_3_0_INVALIDATE_ERAT : : :"memory"); |
---|
110 | 103 | } |
---|
111 | 104 | |
---|
112 | 105 | #define MCE_FLUSH_SLB 1 |
---|
.. | .. |
---|
141 | 134 | bool nip_valid; /* nip is a valid indicator of faulting address */ |
---|
142 | 135 | unsigned int error_type; |
---|
143 | 136 | unsigned int error_subtype; |
---|
| 137 | + unsigned int error_class; |
---|
144 | 138 | unsigned int initiator; |
---|
145 | 139 | unsigned int severity; |
---|
| 140 | + bool sync_error; |
---|
146 | 141 | }; |
---|
147 | 142 | |
---|
148 | 143 | static const struct mce_ierror_table mce_p7_ierror_table[] = { |
---|
149 | 144 | { 0x00000000001c0000, 0x0000000000040000, true, |
---|
150 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, |
---|
151 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 145 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 146 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
152 | 147 | { 0x00000000001c0000, 0x0000000000080000, true, |
---|
153 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, |
---|
154 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 148 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 149 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
155 | 150 | { 0x00000000001c0000, 0x00000000000c0000, true, |
---|
156 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, |
---|
157 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 151 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 152 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
158 | 153 | { 0x00000000001c0000, 0x0000000000100000, true, |
---|
159 | 154 | MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */ |
---|
160 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 155 | + MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 156 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
161 | 157 | { 0x00000000001c0000, 0x0000000000140000, true, |
---|
162 | | - MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, |
---|
163 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 158 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 159 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
164 | 160 | { 0x00000000001c0000, 0x0000000000180000, true, |
---|
165 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, |
---|
166 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 161 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 162 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
167 | 163 | { 0x00000000001c0000, 0x00000000001c0000, true, |
---|
168 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, |
---|
169 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
170 | | -{ 0, 0, 0, 0, 0, 0 } }; |
---|
| 164 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 165 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 166 | +{ 0, 0, 0, 0, 0, 0, 0 } }; |
---|
171 | 167 | |
---|
172 | 168 | static const struct mce_ierror_table mce_p8_ierror_table[] = { |
---|
173 | 169 | { 0x00000000081c0000, 0x0000000000040000, true, |
---|
174 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, |
---|
175 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 170 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 171 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
176 | 172 | { 0x00000000081c0000, 0x0000000000080000, true, |
---|
177 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, |
---|
178 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 173 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 174 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
179 | 175 | { 0x00000000081c0000, 0x00000000000c0000, true, |
---|
180 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, |
---|
181 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 176 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 177 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
182 | 178 | { 0x00000000081c0000, 0x0000000000100000, true, |
---|
183 | | - MCE_ERROR_TYPE_ERAT,MCE_ERAT_ERROR_MULTIHIT, |
---|
184 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 179 | + MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 180 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
185 | 181 | { 0x00000000081c0000, 0x0000000000140000, true, |
---|
186 | | - MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, |
---|
187 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 182 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 183 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
188 | 184 | { 0x00000000081c0000, 0x0000000000180000, true, |
---|
189 | 185 | MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, |
---|
190 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 186 | + MCE_ECLASS_HARDWARE, |
---|
| 187 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
191 | 188 | { 0x00000000081c0000, 0x00000000001c0000, true, |
---|
192 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, |
---|
193 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 189 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 190 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
194 | 191 | { 0x00000000081c0000, 0x0000000008000000, true, |
---|
195 | | - MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_IFETCH_TIMEOUT, |
---|
196 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 192 | + MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_IFETCH_TIMEOUT, MCE_ECLASS_HARDWARE, |
---|
| 193 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
197 | 194 | { 0x00000000081c0000, 0x0000000008040000, true, |
---|
198 | 195 | MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT, |
---|
199 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
200 | | -{ 0, 0, 0, 0, 0, 0 } }; |
---|
| 196 | + MCE_ECLASS_HARDWARE, |
---|
| 197 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 198 | +{ 0, 0, 0, 0, 0, 0, 0 } }; |
---|
201 | 199 | |
---|
202 | 200 | static const struct mce_ierror_table mce_p9_ierror_table[] = { |
---|
203 | 201 | { 0x00000000081c0000, 0x0000000000040000, true, |
---|
204 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, |
---|
205 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 202 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 203 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
206 | 204 | { 0x00000000081c0000, 0x0000000000080000, true, |
---|
207 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, |
---|
208 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 205 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 206 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
209 | 207 | { 0x00000000081c0000, 0x00000000000c0000, true, |
---|
210 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, |
---|
211 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 208 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 209 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
212 | 210 | { 0x00000000081c0000, 0x0000000000100000, true, |
---|
213 | | - MCE_ERROR_TYPE_ERAT,MCE_ERAT_ERROR_MULTIHIT, |
---|
214 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 211 | + MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 212 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
215 | 213 | { 0x00000000081c0000, 0x0000000000140000, true, |
---|
216 | | - MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, |
---|
217 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 214 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 215 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
218 | 216 | { 0x00000000081c0000, 0x0000000000180000, true, |
---|
219 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, |
---|
220 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 217 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 218 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
221 | 219 | { 0x00000000081c0000, 0x00000000001c0000, true, |
---|
222 | | - MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH_FOREIGN, |
---|
223 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 220 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH_FOREIGN, MCE_ECLASS_SOFTWARE, |
---|
| 221 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
224 | 222 | { 0x00000000081c0000, 0x0000000008000000, true, |
---|
225 | | - MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_IFETCH_TIMEOUT, |
---|
226 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 223 | + MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_IFETCH_TIMEOUT, MCE_ECLASS_HARDWARE, |
---|
| 224 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
227 | 225 | { 0x00000000081c0000, 0x0000000008040000, true, |
---|
228 | 226 | MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT, |
---|
229 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 227 | + MCE_ECLASS_HARDWARE, |
---|
| 228 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
230 | 229 | { 0x00000000081c0000, 0x00000000080c0000, true, |
---|
231 | | - MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH, |
---|
232 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 230 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH, MCE_ECLASS_SOFTWARE, |
---|
| 231 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
233 | 232 | { 0x00000000081c0000, 0x0000000008100000, true, |
---|
234 | | - MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH, |
---|
235 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 233 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_SOFTWARE, |
---|
| 234 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
236 | 235 | { 0x00000000081c0000, 0x0000000008140000, false, |
---|
237 | | - MCE_ERROR_TYPE_RA, MCE_RA_ERROR_STORE, |
---|
238 | | - MCE_INITIATOR_CPU, MCE_SEV_FATAL, }, /* ASYNC is fatal */ |
---|
| 236 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_STORE, MCE_ECLASS_HARDWARE, |
---|
| 237 | + MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */ |
---|
239 | 238 | { 0x00000000081c0000, 0x0000000008180000, false, |
---|
240 | 239 | MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_STORE_TIMEOUT, |
---|
241 | | - MCE_INITIATOR_CPU, MCE_SEV_FATAL, }, /* ASYNC is fatal */ |
---|
242 | | -{ 0x00000000081c0000, 0x00000000081c0000, true, |
---|
| 240 | + MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */ |
---|
| 241 | +{ 0x00000000081c0000, 0x00000000081c0000, true, MCE_ECLASS_HARDWARE, |
---|
243 | 242 | MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN, |
---|
244 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
245 | | -{ 0, 0, 0, 0, 0, 0 } }; |
---|
| 243 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 244 | +{ 0, 0, 0, 0, 0, 0, 0 } }; |
---|
| 245 | + |
---|
| 246 | +static const struct mce_ierror_table mce_p10_ierror_table[] = { |
---|
| 247 | +{ 0x00000000081c0000, 0x0000000000040000, true, |
---|
| 248 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 249 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 250 | +{ 0x00000000081c0000, 0x0000000000080000, true, |
---|
| 251 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 252 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 253 | +{ 0x00000000081c0000, 0x00000000000c0000, true, |
---|
| 254 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 255 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 256 | +{ 0x00000000081c0000, 0x0000000000100000, true, |
---|
| 257 | + MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 258 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 259 | +{ 0x00000000081c0000, 0x0000000000140000, true, |
---|
| 260 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 261 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 262 | +{ 0x00000000081c0000, 0x0000000000180000, true, |
---|
| 263 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE, |
---|
| 264 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 265 | +{ 0x00000000081c0000, 0x00000000001c0000, true, |
---|
| 266 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH_FOREIGN, MCE_ECLASS_SOFTWARE, |
---|
| 267 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 268 | +{ 0x00000000081c0000, 0x0000000008080000, true, |
---|
| 269 | + MCE_ERROR_TYPE_USER,MCE_USER_ERROR_SCV, MCE_ECLASS_SOFTWARE, |
---|
| 270 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 271 | +{ 0x00000000081c0000, 0x00000000080c0000, true, |
---|
| 272 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH, MCE_ECLASS_SOFTWARE, |
---|
| 273 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 274 | +{ 0x00000000081c0000, 0x0000000008100000, true, |
---|
| 275 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_SOFTWARE, |
---|
| 276 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 277 | +{ 0x00000000081c0000, 0x0000000008140000, false, |
---|
| 278 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_STORE, MCE_ECLASS_HARDWARE, |
---|
| 279 | + MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */ |
---|
| 280 | +{ 0x00000000081c0000, 0x00000000081c0000, true, MCE_ECLASS_HARDWARE, |
---|
| 281 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN, |
---|
| 282 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 283 | +{ 0, 0, 0, 0, 0, 0, 0 } }; |
---|
246 | 284 | |
---|
247 | 285 | struct mce_derror_table { |
---|
248 | 286 | unsigned long dsisr_value; |
---|
249 | 287 | bool dar_valid; /* dar is a valid indicator of faulting address */ |
---|
250 | 288 | unsigned int error_type; |
---|
251 | 289 | unsigned int error_subtype; |
---|
| 290 | + unsigned int error_class; |
---|
252 | 291 | unsigned int initiator; |
---|
253 | 292 | unsigned int severity; |
---|
| 293 | + bool sync_error; |
---|
254 | 294 | }; |
---|
255 | 295 | |
---|
256 | 296 | static const struct mce_derror_table mce_p7_derror_table[] = { |
---|
257 | 297 | { 0x00008000, false, |
---|
258 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, |
---|
259 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 298 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE, |
---|
| 299 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
260 | 300 | { 0x00004000, true, |
---|
261 | 301 | MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE, |
---|
262 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 302 | + MCE_ECLASS_HARDWARE, |
---|
| 303 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
263 | 304 | { 0x00000800, true, |
---|
264 | | - MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, |
---|
265 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 305 | + MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 306 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
266 | 307 | { 0x00000400, true, |
---|
267 | | - MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, |
---|
268 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 308 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 309 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
269 | 310 | { 0x00000080, true, |
---|
270 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */ |
---|
271 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 311 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 312 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
272 | 313 | { 0x00000100, true, |
---|
273 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, |
---|
274 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 314 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 315 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
275 | 316 | { 0x00000040, true, |
---|
276 | 317 | MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */ |
---|
277 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
278 | | -{ 0, false, 0, 0, 0, 0 } }; |
---|
| 318 | + MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 319 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 320 | +{ 0, false, 0, 0, 0, 0, 0 } }; |
---|
279 | 321 | |
---|
280 | 322 | static const struct mce_derror_table mce_p8_derror_table[] = { |
---|
281 | 323 | { 0x00008000, false, |
---|
282 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, |
---|
283 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 324 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE, |
---|
| 325 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
284 | 326 | { 0x00004000, true, |
---|
285 | 327 | MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE, |
---|
286 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 328 | + MCE_ECLASS_HARDWARE, |
---|
| 329 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
287 | 330 | { 0x00002000, true, |
---|
288 | | - MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, |
---|
289 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 331 | + MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, MCE_ECLASS_HARDWARE, |
---|
| 332 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
290 | 333 | { 0x00001000, true, |
---|
291 | 334 | MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT, |
---|
292 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 335 | + MCE_ECLASS_HARDWARE, |
---|
| 336 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
293 | 337 | { 0x00000800, true, |
---|
294 | | - MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, |
---|
295 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 338 | + MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 339 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
296 | 340 | { 0x00000400, true, |
---|
297 | | - MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, |
---|
298 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 341 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 342 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
299 | 343 | { 0x00000200, true, |
---|
300 | 344 | MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, /* SECONDARY ERAT */ |
---|
301 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 345 | + MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 346 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
302 | 347 | { 0x00000080, true, |
---|
303 | 348 | MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */ |
---|
304 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 349 | + MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 350 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
305 | 351 | { 0x00000100, true, |
---|
306 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, |
---|
307 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
308 | | -{ 0, false, 0, 0, 0, 0 } }; |
---|
| 352 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 353 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 354 | +{ 0, false, 0, 0, 0, 0, 0 } }; |
---|
309 | 355 | |
---|
310 | 356 | static const struct mce_derror_table mce_p9_derror_table[] = { |
---|
311 | 357 | { 0x00008000, false, |
---|
312 | | - MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, |
---|
313 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 358 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE, |
---|
| 359 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
314 | 360 | { 0x00004000, true, |
---|
315 | 361 | MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE, |
---|
316 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 362 | + MCE_ECLASS_HARDWARE, |
---|
| 363 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
317 | 364 | { 0x00002000, true, |
---|
318 | | - MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, |
---|
319 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 365 | + MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, MCE_ECLASS_HARDWARE, |
---|
| 366 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
320 | 367 | { 0x00001000, true, |
---|
321 | 368 | MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT, |
---|
322 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 369 | + MCE_ECLASS_HARDWARE, |
---|
| 370 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
323 | 371 | { 0x00000800, true, |
---|
324 | | - MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, |
---|
325 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 372 | + MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 373 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
326 | 374 | { 0x00000400, true, |
---|
327 | | - MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, |
---|
328 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 375 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 376 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
329 | 377 | { 0x00000200, false, |
---|
330 | | - MCE_ERROR_TYPE_USER, MCE_USER_ERROR_TLBIE, |
---|
331 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 378 | + MCE_ERROR_TYPE_USER, MCE_USER_ERROR_TLBIE, MCE_ECLASS_SOFTWARE, |
---|
| 379 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
332 | 380 | { 0x00000080, true, |
---|
333 | 381 | MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */ |
---|
334 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 382 | + MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 383 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
335 | 384 | { 0x00000100, true, |
---|
336 | | - MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, |
---|
337 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 385 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 386 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
338 | 387 | { 0x00000040, true, |
---|
339 | | - MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD, |
---|
340 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 388 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD, MCE_ECLASS_HARDWARE, |
---|
| 389 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
341 | 390 | { 0x00000020, false, |
---|
342 | 391 | MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE, |
---|
343 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 392 | + MCE_ECLASS_HARDWARE, |
---|
| 393 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
344 | 394 | { 0x00000010, false, |
---|
345 | 395 | MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN, |
---|
346 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
| 396 | + MCE_ECLASS_HARDWARE, |
---|
| 397 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
347 | 398 | { 0x00000008, false, |
---|
348 | | - MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD_STORE_FOREIGN, |
---|
349 | | - MCE_INITIATOR_CPU, MCE_SEV_ERROR_SYNC, }, |
---|
350 | | -{ 0, false, 0, 0, 0, 0 } }; |
---|
| 399 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD_STORE_FOREIGN, MCE_ECLASS_HARDWARE, |
---|
| 400 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 401 | +{ 0, false, 0, 0, 0, 0, 0 } }; |
---|
| 402 | + |
---|
| 403 | +static const struct mce_derror_table mce_p10_derror_table[] = { |
---|
| 404 | +{ 0x00008000, false, |
---|
| 405 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE, |
---|
| 406 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 407 | +{ 0x00004000, true, |
---|
| 408 | + MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE, |
---|
| 409 | + MCE_ECLASS_HARDWARE, |
---|
| 410 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 411 | +{ 0x00000800, true, |
---|
| 412 | + MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 413 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 414 | +{ 0x00000400, true, |
---|
| 415 | + MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 416 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 417 | +{ 0x00000200, false, |
---|
| 418 | + MCE_ERROR_TYPE_USER, MCE_USER_ERROR_TLBIE, MCE_ECLASS_SOFTWARE, |
---|
| 419 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 420 | +{ 0x00000080, true, |
---|
| 421 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */ |
---|
| 422 | + MCE_ECLASS_SOFT_INDETERMINATE, |
---|
| 423 | + MCE_INITIATOR_CPU, MCE_SEV_WARNING, true }, |
---|
| 424 | +{ 0x00000100, true, |
---|
| 425 | + MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE, |
---|
| 426 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 427 | +{ 0x00000040, true, |
---|
| 428 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD, MCE_ECLASS_HARDWARE, |
---|
| 429 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 430 | +{ 0x00000020, false, |
---|
| 431 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE, |
---|
| 432 | + MCE_ECLASS_HARDWARE, |
---|
| 433 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 434 | +{ 0x00000010, false, |
---|
| 435 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN, |
---|
| 436 | + MCE_ECLASS_HARDWARE, |
---|
| 437 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 438 | +{ 0x00000008, false, |
---|
| 439 | + MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD_STORE_FOREIGN, MCE_ECLASS_HARDWARE, |
---|
| 440 | + MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true }, |
---|
| 441 | +{ 0, false, 0, 0, 0, 0, 0 } }; |
---|
351 | 442 | |
---|
352 | 443 | static int mce_find_instr_ea_and_phys(struct pt_regs *regs, uint64_t *addr, |
---|
353 | 444 | uint64_t *phys_addr) |
---|
.. | .. |
---|
358 | 449 | * in real-mode is tricky and can lead to recursive |
---|
359 | 450 | * faults |
---|
360 | 451 | */ |
---|
361 | | - int instr; |
---|
| 452 | + struct ppc_inst instr; |
---|
362 | 453 | unsigned long pfn, instr_addr; |
---|
363 | 454 | struct instruction_op op; |
---|
364 | 455 | struct pt_regs tmp = *regs; |
---|
.. | .. |
---|
366 | 457 | pfn = addr_to_pfn(regs, regs->nip); |
---|
367 | 458 | if (pfn != ULONG_MAX) { |
---|
368 | 459 | instr_addr = (pfn << PAGE_SHIFT) + (regs->nip & ~PAGE_MASK); |
---|
369 | | - instr = *(unsigned int *)(instr_addr); |
---|
| 460 | + instr = ppc_inst_read((struct ppc_inst *)instr_addr); |
---|
370 | 461 | if (!analyse_instr(&op, &tmp, instr)) { |
---|
371 | 462 | pfn = addr_to_pfn(regs, op.ea); |
---|
372 | 463 | *addr = op.ea; |
---|
.. | .. |
---|
384 | 475 | return -1; |
---|
385 | 476 | } |
---|
386 | 477 | |
---|
387 | | -static int mce_handle_ierror(struct pt_regs *regs, |
---|
| 478 | +static int mce_handle_ierror(struct pt_regs *regs, unsigned long srr1, |
---|
388 | 479 | const struct mce_ierror_table table[], |
---|
389 | 480 | struct mce_error_info *mce_err, uint64_t *addr, |
---|
390 | 481 | uint64_t *phys_addr) |
---|
391 | 482 | { |
---|
392 | | - uint64_t srr1 = regs->msr; |
---|
393 | 483 | int handled = 0; |
---|
394 | 484 | int i; |
---|
395 | 485 | |
---|
.. | .. |
---|
402 | 492 | /* attempt to correct the error */ |
---|
403 | 493 | switch (table[i].error_type) { |
---|
404 | 494 | case MCE_ERROR_TYPE_SLB: |
---|
| 495 | + if (local_paca->in_mce == 1) |
---|
| 496 | + slb_save_contents(local_paca->mce_faulty_slbs); |
---|
405 | 497 | handled = mce_flush(MCE_FLUSH_SLB); |
---|
406 | 498 | break; |
---|
407 | 499 | case MCE_ERROR_TYPE_ERAT: |
---|
.. | .. |
---|
414 | 506 | |
---|
415 | 507 | /* now fill in mce_error_info */ |
---|
416 | 508 | mce_err->error_type = table[i].error_type; |
---|
| 509 | + mce_err->error_class = table[i].error_class; |
---|
417 | 510 | switch (table[i].error_type) { |
---|
418 | 511 | case MCE_ERROR_TYPE_UE: |
---|
419 | 512 | mce_err->u.ue_error_type = table[i].error_subtype; |
---|
.. | .. |
---|
437 | 530 | mce_err->u.link_error_type = table[i].error_subtype; |
---|
438 | 531 | break; |
---|
439 | 532 | } |
---|
| 533 | + mce_err->sync_error = table[i].sync_error; |
---|
440 | 534 | mce_err->severity = table[i].severity; |
---|
441 | 535 | mce_err->initiator = table[i].initiator; |
---|
442 | 536 | if (table[i].nip_valid) { |
---|
443 | 537 | *addr = regs->nip; |
---|
444 | | - if (mce_err->severity == MCE_SEV_ERROR_SYNC && |
---|
| 538 | + if (mce_err->sync_error && |
---|
445 | 539 | table[i].error_type == MCE_ERROR_TYPE_UE) { |
---|
446 | 540 | unsigned long pfn; |
---|
447 | 541 | |
---|
.. | .. |
---|
458 | 552 | } |
---|
459 | 553 | |
---|
460 | 554 | mce_err->error_type = MCE_ERROR_TYPE_UNKNOWN; |
---|
461 | | - mce_err->severity = MCE_SEV_ERROR_SYNC; |
---|
| 555 | + mce_err->error_class = MCE_ECLASS_UNKNOWN; |
---|
| 556 | + mce_err->severity = MCE_SEV_SEVERE; |
---|
462 | 557 | mce_err->initiator = MCE_INITIATOR_CPU; |
---|
| 558 | + mce_err->sync_error = true; |
---|
463 | 559 | |
---|
464 | 560 | return 0; |
---|
465 | 561 | } |
---|
.. | .. |
---|
483 | 579 | /* attempt to correct the error */ |
---|
484 | 580 | switch (table[i].error_type) { |
---|
485 | 581 | case MCE_ERROR_TYPE_SLB: |
---|
| 582 | + if (local_paca->in_mce == 1) |
---|
| 583 | + slb_save_contents(local_paca->mce_faulty_slbs); |
---|
486 | 584 | if (mce_flush(MCE_FLUSH_SLB)) |
---|
487 | 585 | handled = 1; |
---|
488 | 586 | break; |
---|
.. | .. |
---|
506 | 604 | |
---|
507 | 605 | /* now fill in mce_error_info */ |
---|
508 | 606 | mce_err->error_type = table[i].error_type; |
---|
| 607 | + mce_err->error_class = table[i].error_class; |
---|
509 | 608 | switch (table[i].error_type) { |
---|
510 | 609 | case MCE_ERROR_TYPE_UE: |
---|
511 | 610 | mce_err->u.ue_error_type = table[i].error_subtype; |
---|
.. | .. |
---|
529 | 628 | mce_err->u.link_error_type = table[i].error_subtype; |
---|
530 | 629 | break; |
---|
531 | 630 | } |
---|
| 631 | + mce_err->sync_error = table[i].sync_error; |
---|
532 | 632 | mce_err->severity = table[i].severity; |
---|
533 | 633 | mce_err->initiator = table[i].initiator; |
---|
534 | 634 | if (table[i].dar_valid) |
---|
535 | 635 | *addr = regs->dar; |
---|
536 | | - else if (mce_err->severity == MCE_SEV_ERROR_SYNC && |
---|
| 636 | + else if (mce_err->sync_error && |
---|
537 | 637 | table[i].error_type == MCE_ERROR_TYPE_UE) { |
---|
538 | 638 | /* |
---|
539 | 639 | * We do a maximum of 4 nested MCE calls, see |
---|
.. | .. |
---|
550 | 650 | return handled; |
---|
551 | 651 | |
---|
552 | 652 | mce_err->error_type = MCE_ERROR_TYPE_UNKNOWN; |
---|
553 | | - mce_err->severity = MCE_SEV_ERROR_SYNC; |
---|
| 653 | + mce_err->error_class = MCE_ECLASS_UNKNOWN; |
---|
| 654 | + mce_err->severity = MCE_SEV_SEVERE; |
---|
554 | 655 | mce_err->initiator = MCE_INITIATOR_CPU; |
---|
| 656 | + mce_err->sync_error = true; |
---|
555 | 657 | |
---|
556 | 658 | return 0; |
---|
557 | 659 | } |
---|
558 | 660 | |
---|
559 | | -static long mce_handle_ue_error(struct pt_regs *regs) |
---|
| 661 | +static long mce_handle_ue_error(struct pt_regs *regs, |
---|
| 662 | + struct mce_error_info *mce_err) |
---|
560 | 663 | { |
---|
561 | 664 | long handled = 0; |
---|
| 665 | + |
---|
| 666 | + mce_common_process_ue(regs, mce_err); |
---|
| 667 | + if (mce_err->ignore_event) |
---|
| 668 | + return 1; |
---|
562 | 669 | |
---|
563 | 670 | /* |
---|
564 | 671 | * On specific SCOM read via MMIO we may get a machine check |
---|
.. | .. |
---|
575 | 682 | } |
---|
576 | 683 | |
---|
577 | 684 | static long mce_handle_error(struct pt_regs *regs, |
---|
| 685 | + unsigned long srr1, |
---|
578 | 686 | const struct mce_derror_table dtable[], |
---|
579 | 687 | const struct mce_ierror_table itable[]) |
---|
580 | 688 | { |
---|
581 | 689 | struct mce_error_info mce_err = { 0 }; |
---|
582 | 690 | uint64_t addr, phys_addr = ULONG_MAX; |
---|
583 | | - uint64_t srr1 = regs->msr; |
---|
584 | 691 | long handled; |
---|
585 | 692 | |
---|
586 | 693 | if (SRR1_MC_LOADSTORE(srr1)) |
---|
587 | 694 | handled = mce_handle_derror(regs, dtable, &mce_err, &addr, |
---|
588 | 695 | &phys_addr); |
---|
589 | 696 | else |
---|
590 | | - handled = mce_handle_ierror(regs, itable, &mce_err, &addr, |
---|
| 697 | + handled = mce_handle_ierror(regs, srr1, itable, &mce_err, &addr, |
---|
591 | 698 | &phys_addr); |
---|
592 | 699 | |
---|
593 | 700 | if (!handled && mce_err.error_type == MCE_ERROR_TYPE_UE) |
---|
594 | | - handled = mce_handle_ue_error(regs); |
---|
| 701 | + handled = mce_handle_ue_error(regs, &mce_err); |
---|
595 | 702 | |
---|
596 | 703 | save_mce_event(regs, handled, &mce_err, regs->nip, addr, phys_addr); |
---|
597 | 704 | |
---|
.. | .. |
---|
603 | 710 | /* P7 DD1 leaves top bits of DSISR undefined */ |
---|
604 | 711 | regs->dsisr &= 0x0000ffff; |
---|
605 | 712 | |
---|
606 | | - return mce_handle_error(regs, mce_p7_derror_table, mce_p7_ierror_table); |
---|
| 713 | + return mce_handle_error(regs, regs->msr, |
---|
| 714 | + mce_p7_derror_table, mce_p7_ierror_table); |
---|
607 | 715 | } |
---|
608 | 716 | |
---|
609 | 717 | long __machine_check_early_realmode_p8(struct pt_regs *regs) |
---|
610 | 718 | { |
---|
611 | | - return mce_handle_error(regs, mce_p8_derror_table, mce_p8_ierror_table); |
---|
| 719 | + return mce_handle_error(regs, regs->msr, |
---|
| 720 | + mce_p8_derror_table, mce_p8_ierror_table); |
---|
612 | 721 | } |
---|
613 | 722 | |
---|
614 | 723 | long __machine_check_early_realmode_p9(struct pt_regs *regs) |
---|
615 | 724 | { |
---|
| 725 | + unsigned long srr1 = regs->msr; |
---|
| 726 | + |
---|
616 | 727 | /* |
---|
617 | 728 | * On POWER9 DD2.1 and below, it's possible to get a machine check |
---|
618 | 729 | * caused by a paste instruction where only DSISR bit 25 is set. This |
---|
.. | .. |
---|
626 | 737 | if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000) |
---|
627 | 738 | return 1; |
---|
628 | 739 | |
---|
629 | | - return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table); |
---|
| 740 | + /* |
---|
| 741 | + * Async machine check due to bad real address from store or foreign |
---|
| 742 | + * link time out comes with the load/store bit (PPC bit 42) set in |
---|
| 743 | + * SRR1, but the cause comes in SRR1 not DSISR. Clear bit 42 so we're |
---|
| 744 | + * directed to the ierror table so it will find the cause (which |
---|
| 745 | + * describes it correctly as a store error). |
---|
| 746 | + */ |
---|
| 747 | + if (SRR1_MC_LOADSTORE(srr1) && |
---|
| 748 | + ((srr1 & 0x081c0000) == 0x08140000 || |
---|
| 749 | + (srr1 & 0x081c0000) == 0x08180000)) { |
---|
| 750 | + srr1 &= ~PPC_BIT(42); |
---|
| 751 | + } |
---|
| 752 | + |
---|
| 753 | + return mce_handle_error(regs, srr1, |
---|
| 754 | + mce_p9_derror_table, mce_p9_ierror_table); |
---|
| 755 | +} |
---|
| 756 | + |
---|
| 757 | +long __machine_check_early_realmode_p10(struct pt_regs *regs) |
---|
| 758 | +{ |
---|
| 759 | + unsigned long srr1 = regs->msr; |
---|
| 760 | + |
---|
| 761 | + /* |
---|
| 762 | + * Async machine check due to bad real address from store comes with |
---|
| 763 | + * the load/store bit (PPC bit 42) set in SRR1, but the cause comes in |
---|
| 764 | + * SRR1 not DSISR. Clear bit 42 so we're directed to the ierror table |
---|
| 765 | + * so it will find the cause (which describes it correctly as a store |
---|
| 766 | + * error). |
---|
| 767 | + */ |
---|
| 768 | + if (SRR1_MC_LOADSTORE(srr1) && |
---|
| 769 | + (srr1 & 0x081c0000) == 0x08140000) { |
---|
| 770 | + srr1 &= ~PPC_BIT(42); |
---|
| 771 | + } |
---|
| 772 | + |
---|
| 773 | + return mce_handle_error(regs, srr1, |
---|
| 774 | + mce_p10_derror_table, mce_p10_ierror_table); |
---|
630 | 775 | } |
---|