forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-13 9d77db3c730780c8ef5ccd4b66403ff5675cfe4e
kernel/arch/powerpc/boot/dts/fsl/t1040si-post.dtsi
....@@ -425,50 +425,6 @@
425425 /include/ "qoriq-clockgen2.dtsi"
426426 global-utilities@e1000 {
427427 compatible = "fsl,t1040-clockgen", "fsl,qoriq-clockgen-2.0";
428
-
429
- mux0: mux0@0 {
430
- #clock-cells = <0>;
431
- reg = <0x0 4>;
432
- compatible = "fsl,qoriq-core-mux-2.0";
433
- clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
434
- <&pll1 0>, <&pll1 1>, <&pll1 2>;
435
- clock-names = "pll0", "pll0-div2", "pll1-div4",
436
- "pll1", "pll1-div2", "pll1-div4";
437
- clock-output-names = "cmux0";
438
- };
439
-
440
- mux1: mux1@20 {
441
- #clock-cells = <0>;
442
- reg = <0x20 4>;
443
- compatible = "fsl,qoriq-core-mux-2.0";
444
- clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
445
- <&pll1 0>, <&pll1 1>, <&pll1 2>;
446
- clock-names = "pll0", "pll0-div2", "pll1-div4",
447
- "pll1", "pll1-div2", "pll1-div4";
448
- clock-output-names = "cmux1";
449
- };
450
-
451
- mux2: mux2@40 {
452
- #clock-cells = <0>;
453
- reg = <0x40 4>;
454
- compatible = "fsl,qoriq-core-mux-2.0";
455
- clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
456
- <&pll1 0>, <&pll1 1>, <&pll1 2>;
457
- clock-names = "pll0", "pll0-div2", "pll1-div4",
458
- "pll1", "pll1-div2", "pll1-div4";
459
- clock-output-names = "cmux2";
460
- };
461
-
462
- mux3: mux3@60 {
463
- #clock-cells = <0>;
464
- reg = <0x60 4>;
465
- compatible = "fsl,qoriq-core-mux-2.0";
466
- clocks = <&pll0 0>, <&pll0 1>, <&pll0 2>,
467
- <&pll1 0>, <&pll1 1>, <&pll1 2>;
468
- clock-names = "pll0_0", "pll0_1", "pll0_2",
469
- "pll1_0", "pll1_1", "pll1_2";
470
- clock-output-names = "cmux3";
471
- };
472428 };
473429
474430 rcpm: global-utilities@e2000 {
....@@ -672,6 +628,84 @@
672628 status = "disabled";
673629 };
674630 };
631
+
632
+ seville_switch: ethernet-switch@800000 {
633
+ compatible = "mscc,vsc9953-switch";
634
+ reg = <0x800000 0x290000>;
635
+ interrupts = <26 2 0 0>;
636
+ interrupt-names = "xtr";
637
+ little-endian;
638
+ #address-cells = <1>;
639
+ #size-cells = <0>;
640
+ status = "disabled";
641
+
642
+ ports {
643
+ #address-cells = <1>;
644
+ #size-cells = <0>;
645
+
646
+ seville_port0: port@0 {
647
+ reg = <0>;
648
+ status = "disabled";
649
+ };
650
+
651
+ seville_port1: port@1 {
652
+ reg = <1>;
653
+ status = "disabled";
654
+ };
655
+
656
+ seville_port2: port@2 {
657
+ reg = <2>;
658
+ status = "disabled";
659
+ };
660
+
661
+ seville_port3: port@3 {
662
+ reg = <3>;
663
+ status = "disabled";
664
+ };
665
+
666
+ seville_port4: port@4 {
667
+ reg = <4>;
668
+ status = "disabled";
669
+ };
670
+
671
+ seville_port5: port@5 {
672
+ reg = <5>;
673
+ status = "disabled";
674
+ };
675
+
676
+ seville_port6: port@6 {
677
+ reg = <6>;
678
+ status = "disabled";
679
+ };
680
+
681
+ seville_port7: port@7 {
682
+ reg = <7>;
683
+ status = "disabled";
684
+ };
685
+
686
+ seville_port8: port@8 {
687
+ reg = <8>;
688
+ phy-mode = "internal";
689
+ status = "disabled";
690
+
691
+ fixed-link {
692
+ speed = <2500>;
693
+ full-duplex;
694
+ };
695
+ };
696
+
697
+ seville_port9: port@9 {
698
+ reg = <9>;
699
+ phy-mode = "internal";
700
+ status = "disabled";
701
+
702
+ fixed-link {
703
+ speed = <2500>;
704
+ full-duplex;
705
+ };
706
+ };
707
+ };
708
+ };
675709 };
676710
677711 &qe {