.. | .. |
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2 | 2 | /* |
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3 | 3 | * Device Tree Source for AM6 SoC family in Quad core configuration |
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4 | 4 | * |
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5 | | - * Copyright (C) 2016-2018 Texas Instruments Incorporated - http://www.ti.com/ |
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| 5 | + * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/ |
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6 | 6 | */ |
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7 | 7 | |
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8 | 8 | #include "k3-am65.dtsi" |
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.. | .. |
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34 | 34 | }; |
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35 | 35 | |
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36 | 36 | cpu0: cpu@0 { |
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37 | | - compatible = "arm,cortex-a53", "arm,armv8"; |
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| 37 | + compatible = "arm,cortex-a53"; |
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38 | 38 | reg = <0x000>; |
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39 | 39 | device_type = "cpu"; |
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40 | 40 | enable-method = "psci"; |
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.. | .. |
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48 | 48 | }; |
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49 | 49 | |
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50 | 50 | cpu1: cpu@1 { |
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51 | | - compatible = "arm,cortex-a53", "arm,armv8"; |
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| 51 | + compatible = "arm,cortex-a53"; |
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52 | 52 | reg = <0x001>; |
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53 | 53 | device_type = "cpu"; |
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54 | 54 | enable-method = "psci"; |
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.. | .. |
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62 | 62 | }; |
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63 | 63 | |
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64 | 64 | cpu2: cpu@100 { |
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65 | | - compatible = "arm,cortex-a53", "arm,armv8"; |
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| 65 | + compatible = "arm,cortex-a53"; |
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66 | 66 | reg = <0x100>; |
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67 | 67 | device_type = "cpu"; |
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68 | 68 | enable-method = "psci"; |
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.. | .. |
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76 | 76 | }; |
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77 | 77 | |
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78 | 78 | cpu3: cpu@101 { |
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79 | | - compatible = "arm,cortex-a53", "arm,armv8"; |
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| 79 | + compatible = "arm,cortex-a53"; |
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80 | 80 | reg = <0x101>; |
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81 | 81 | device_type = "cpu"; |
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82 | 82 | enable-method = "psci"; |
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